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src/opcodes ChangeLog arm-dis.c arm-opc.h
- To: binutils-cvs at sourceware dot cygnus dot com
- Subject: src/opcodes ChangeLog arm-dis.c arm-opc.h
- From: scottb at sourceware dot cygnus dot com
- Date: 30 May 2000 13:42:11 -0000
CVSROOT: /cvs/src
Module name: src
Branch: binutils-2_10-branch
Changes by: scottb@sourceware.cygnus.com 00/05/30 06:42:11
Modified files:
opcodes : ChangeLog arm-dis.c arm-opc.h
Log message:
2000-05-26 Scott Bambrough <scottb@netwinder.org>
Port of patch to mainline by Nick Clifton <nickc@cygnus.com>:
* arm-opc.h: Use upper case for flags in MSR and MRS
instructions. Allow any bit to be set in the field_mask of
the MSR instruction.
Port of patch to mainline by Nick Clifton <nickc@cygnus.com>:
* arm-dis.c (print_insn_arm): Decode _x and _s bits of
the field_mask of an MSR instruction.
2000-05-26 Scott Bambrough <scottb@netwinder.org>
Port of patch to mainline by Thomas de Lellis <tdel@windriver.com>:
* arm-opc.h: Disassembly of thumb ldsb/ldsh
instructions changed to ldrsb/ldrsh.
Patches:
http://sourceware.cygnus.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&only_with_tag=binutils-2_10-branch&r1=1.106.2.4&r2=1.106.2.5
http://sourceware.cygnus.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&only_with_tag=binutils-2_10-branch&r1=1.15&r2=1.15.2.1
http://sourceware.cygnus.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-opc.h.diff?cvsroot=src&only_with_tag=binutils-2_10-branch&r1=1.3&r2=1.3.2.1