gdb and binutils branch master updated. 86c9573369616e7437481b6e5533aef3a435cdcf

[amodra at sourceware dot org]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "gdb and binutils".

The branch, master has been updated
       via  86c9573369616e7437481b6e5533aef3a435cdcf (commit)
      from  b80eed39e2e813c37cffcb873dc4fdd03381383c (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=86c9573369616e7437481b6e5533aef3a435cdcf

commit 86c9573369616e7437481b6e5533aef3a435cdcf
Author: Alan Modra <amodra@gmail.com>
Date:   Sat Mar 8 13:05:06 2014 +1030

    Better overflow checking for powerpc32 relocations
    
    Similar to the powerpc64 patch, this improves overflow checking in
    elf32-ppc.c.  Many reloc "howto" entries needed fixes, some just
    cosmetic.
    
    The patch also fixes the R_PPC_VLE_SDA21 reloc application code, which
    was horribly broken.  In fact, it may still be broken since Power ISA
    2.07 says e_li behaves as
       RT <- EXTS(li20 1:4 || li20 5:8 || li20 0 || li20 9:19)
    where li20 is a field taken from bits 17..20, 11..15, 21..31 of the
    instruction.  Freescale VLEPEM says differently, and I assume
    correctly, that
       RT <- EXTS(li20 0:3 || li20 4:8 || li20 9:19)
    The VLE_SDA21 relocation description matches this too.
    
    Now the VLE_SDA21 relocation specifies in the case where e_addi16 is
    converted to e_li for symbols in .PPC.EMB.sdata0 or .PPC.EMB.sbss0
    (no base register), that the field is restricted to 16 bits, with the
    sign bit being propagated to the top 4 bits.  I don't see the sense in
    restricting the value like this, so have allowed the full 20 bit
    signed value.  This of course is compatible with the reloc description
    in that values in the 16 bit signed range will result in exactly the
    same insn field as when the reloc description is followed to the
    letter.
    
    	* elf32-ppc.c (ppc_elf_howto_raw): Correct overflow check for
    	many relocations.  Correct bitsize and rightshift too for a number
    	of VLE relocs.  Describe R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO.
    	Correct dst_mask on R_PPC_VLE_SDA21_LO.
    	(ppc_elf_vle_split16): Tidy, delete unnecessary prototype.
    	(ppc_elf_relocate_section): Modify overflow test for 16-bit
    	fields in instructions to signed/unsigned according to whether
    	the field takes a signed or unsigned value.  Tidy vle split16 code.
    	Correct R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO handling.

-----------------------------------------------------------------------

Summary of changes:
 bfd/ChangeLog   |   12 ++
 bfd/elf32-ppc.c |  336 +++++++++++++++++++++++++++++--------------------------
 2 files changed, 189 insertions(+), 159 deletions(-)


hooks/post-receive
-- 
gdb and binutils