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[binutils-gdb] x86: use correct register names
- From: Jan Beulich <jbeulich at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 15 Nov 2017 07:52:45 -0000
- Subject: [binutils-gdb] x86: use correct register names
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=390a67891e4f1ed334e266cf084ba8948da5fcdf
commit 390a67891e4f1ed334e266cf084ba8948da5fcdf
Author: Jan Beulich <jbeulich@novell.com>
Date: Wed Nov 15 08:52:05 2017 +0100
x86: use correct register names
VEX.W may be legitimately set (and is then ignored by the CPU) for
non-64-bit code. Don't print 64-bit register names in such a case, by
utilizing that REX_W would never be set for non-64-bit code, and that
it is being set from VEX.W by generic decoding.
A test for this is going to be introduced in the next patch of this
series.
Diff:
---
gas/ChangeLog | 6 ++++++
gas/testsuite/gas/i386/noextreg.d | 6 ++++++
gas/testsuite/gas/i386/noextreg.s | 15 +++++++++++++++
opcodes/ChangeLog | 5 +++++
opcodes/i386-dis.c | 6 +++---
5 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3624da7..1763778 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,11 @@
2017-11-15 Jan Beulich <jbeulich@suse.com>
+ * testsuite/gas/i386/noextreg.s: Add tests for VEX-encoded GPR
+ insns with VEX.W set.
+ * testsuite/gas/i386/noextreg.d: Adjust expectations.
+
+2017-11-15 Jan Beulich <jbeulich@suse.com>
+
* testsuite/gas/i386/noextreg.{s,d}: New.
* testsuite/gas/i386/i386.exp: Run new test.
diff --git a/gas/testsuite/gas/i386/noextreg.d b/gas/testsuite/gas/i386/noextreg.d
index cb181b1..4b7f45d 100644
--- a/gas/testsuite/gas/i386/noextreg.d
+++ b/gas/testsuite/gas/i386/noextreg.d
@@ -6,6 +6,12 @@
Disassembly of section .text:
0+ <ix86>:
+[ ]*[a-f0-9]+: c4 e2 78 f2 00 andn \(%eax\),%eax,%eax
+[ ]*[a-f0-9]+: c4 e2 f8 f2 00 andn \(%eax\),%eax,%eax
+[ ]*[a-f0-9]+: 8f e9 78 01 20 tzmsk \(%eax\),%eax
+[ ]*[a-f0-9]+: 8f e9 f8 01 20 tzmsk \(%eax\),%eax
+[ ]*[a-f0-9]+: 8f e9 78 12 c0 llwpcb %eax
+[ ]*[a-f0-9]+: 8f e9 f8 12 c0 llwpcb %eax
[ ]*[a-f0-9]+: c4 e3 79 68 00 00 vfmaddps %xmm0,\(%eax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 e3 79 68 00 0f vfmaddps %xmm0,\(%eax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: c3 ret[ ]*
diff --git a/gas/testsuite/gas/i386/noextreg.s b/gas/testsuite/gas/i386/noextreg.s
index 229b994..ba0c6ff 100644
--- a/gas/testsuite/gas/i386/noextreg.s
+++ b/gas/testsuite/gas/i386/noextreg.s
@@ -1,6 +1,21 @@
.intel_syntax noprefix
.text
ix86:
+ andn eax, eax, [eax]
+ .code64
+ andn rax, rax, [rax]
+ .code32
+
+ tzmsk eax, [eax]
+ .code64
+ tzmsk rax, [rax]
+ .code32
+
+ llwpcb eax
+ .code64
+ llwpcb rax
+ .code32
+
vfmaddps xmm0, xmm0, [eax], xmm0
.byte 0xc4, 0xe3, 0x79, 0x68, 0x00, 0x0f # vfmaddps xmm0, xmm0, [eax], xmm0
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 674736b..2cc3594 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
2017-11-15 Jan Beulich <jbeulich@suse.com>
+ * i386-dis.c (OP_VEX, OP_LWPCB_E, OP_LWP_E): Use rex to
+ determine GPR register set.
+
+2017-11-15 Jan Beulich <jbeulich@suse.com>
+
* i386-dis.c (VEXI4_Fixup, VexI4): Delete.
(prefix_table, xop_table, vex_len_table): Remove VexI4 uses.
(OP_EX_VexW): Move setting of vex_w_done. Update codep on 2nd
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 6a5a7f1..78a685e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -17122,7 +17122,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
names = names_xmm;
break;
case dq_mode:
- if (vex.w)
+ if (rex & REX_W)
names = names64;
else
names = names32;
@@ -17758,7 +17758,7 @@ OP_LWPCB_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
MODRM_CHECK;
codep++;
- if (vex.w)
+ if (rex & REX_W)
names = names64;
else
names = names32;
@@ -17776,7 +17776,7 @@ OP_LWP_E (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
const char **names;
- if (vex.w)
+ if (rex & REX_W)
names = names64;
else
names = names32;