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Patch: more pa2.0 instructions
- To: binutils@sourceware.cygnus.com
- Subject: Patch: more pa2.0 instructions
- From: "Jerry Quinn" <jquinn@nortelnetworks.com>
- Date: Thu, 15 Jul 1999 16:40:48 +0000
This patch adds several new pa2.0 instructions and new syntax for others.
Added are 64 bit bb, havg, hshladd, hshradd, popbts, and shrpd. New syntax
includes bvb becoming bb on %sar, and shrpwd replacing shd and vshd.
ChangeLog entry:
Thu Jul 15 12:31:28 EDT 1999 Jerry Quinn <jquinn@nortelnetworks.com>
* include/opcode/hppa.h (pa_opcodes): Add entries for bb, popbts, havg,
hshladd, hshradd, shrpd, and shrpw.
* gas/config/tc-hppa.c (pa_ip): Add cases for '~', '.', '!', '$'. Fix
bug in ?B case.
* opcodes/hppa-dis.c (bb_cond_64_names): New.
(print_insn_hppa): Add cases for '?X', '?B', '!', '$', '~', '.'.
*** pa-prev/include/opcode/hppa.h Tue Jul 13 17:56:38 1999
--- gas-src/include/opcode/hppa.h Thu Jul 15 12:27:37 1999
***************
*** 70,78 ****
In the args field, the following characters are unused:
! ' !"#$%& *+- ./ :;< > @'
! ' M U [\] '
! 'a d {|}~'
Here are all the characters:
--- 70,78 ----
In the args field, the following characters are unused:
! ' "# %& *+- / :;< > @'
! ' LM U [\] '
! 'a d lm q {|}~'
Here are all the characters:
***************
*** 133,144 ****
--- 133,148 ----
p 5 bit shift count at 26 (to support the SHD instruction) encoded as
31-p
+ ~ 6 bit shift count at 20,22:26 encoded as 63-~.
P 5 bit bit position at 26
T 5 bit field length at 31 (encoded as 32-T)
A 13 bit immediate at 18 (to support the BREAK instruction)
+ . 2 bit shift amount at 24:25
^ like b, but describes a control register
+ ! sar (cr11) register
Z System Control Completer (to support LPA, LHA, etc.)
D 26 bit immediate at 31 (to support the DIAG instruction)
+ $ 9 bit immediate at 28 (to support 'popbts')
f 3 bit Special Function Unit identifier at 25
O 20 bit Special Function Unit operation split between 15 bits at 20
***************
*** 291,299 ****
--- 295,307 ----
{ "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10},
{ "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10},
{ "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10},
+ { "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
+ { "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
+ { "bb", 0xc4006000, 0xfc006000, "?Bnx,Q,w", pa20, FLAG_STRICT},
{ "bb", 0xc4004000, 0xfc004000, "?bnx,Q,w", pa10},
{ "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10},
{ "clrbts", 0xe8004005, 0xffffffff, "", pa20},
+ { "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
{ "pushnom", 0xe8004001, 0xffffffff, "", pa20}, /* Same as pushbts %r0 */
{ "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
***************
*** 347,354 ****
--- 355,373 ----
{ "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10},
{ "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10},
+ /* Subword Operation Instructions */
+
+ { "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
+ { "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
+ { "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
+
+
/* Extract and Deposit Instructions */
+ { "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
+ { "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
+ { "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
+ { "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
{ "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10},
{ "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10},
{ "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10},
*** pa-prev/gas/config/tc-hppa.c Mon Jul 12 16:11:39 1999
--- gas-src/gas/config/tc-hppa.c Thu Jul 15 12:19:47 1999
***************
*** 1567,1572 ****
--- 1567,1591 ----
CHECK_FIELD (num, 31, 0, 0);
INSERT_FIELD_AND_CONTINUE (opcode, num, 21);
+ /* Handle %sar or %cr11. No bits get set, we just verify that
+ it is there. */
+ case '!':
+ /* Skip whitespace before reg. */
+ while (*s == ' ' || *s == '\t')
+ s = s + 1;
+
+ if (!strncasecmp(s, "%sar", 4))
+ {
+ s += 4;
+ continue;
+ }
+ else if (!strncasecmp(s, "%cr11", 5))
+ {
+ s += 5;
+ continue;
+ }
+ break;
+
/* Handle a 5 bit register field at 15. */
case 'x':
num = pa_parse_number (&s, 0);
***************
*** 1858,1866 ****
else break;
case 'b': /* bb, bvb */
cmpltr = 0;
! if (*s == ',')
{
! s++;
if (strncmp (s, "<", 1) == 0)
{
cmpltr = 0;
--- 1877,1885 ----
else break;
case 'b': /* bb, bvb */
cmpltr = 0;
! if (*s == ',' || cond_64)
{
! if (!cond_64) s++;
if (strncmp (s, "<", 1) == 0)
{
cmpltr = 0;
***************
*** 2194,2199 ****
--- 2213,2219 ----
default:
abort();
}
+ break;
}
***************
*** 2398,2403 ****
--- 2418,2430 ----
continue;
}
+ /* Handle a 2 bit shift count at 25. */
+ case '.':
+ num = pa_get_absolute_expression (&the_insn, &s);
+ s = expr_end;
+ CHECK_FIELD (num, 3, 1, 0);
+ INSERT_FIELD_AND_CONTINUE (opcode, num, 6);
+
/* Handle a 5 bit shift count at 26. */
case 'p':
num = pa_get_absolute_expression (&the_insn, &s);
***************
*** 2405,2410 ****
--- 2432,2446 ----
CHECK_FIELD (num, 31, 0, 0);
INSERT_FIELD_AND_CONTINUE (opcode, 31 - num, 5);
+ /* Handle a 6 bit shift count at 20,22:26. */
+ case '~':
+ num = pa_get_absolute_expression (&the_insn, &s);
+ s = expr_end;
+ CHECK_FIELD (num, 63, 0, 0);
+ num = 63 - num;
+ opcode |= (num & 0x20) << 6;
+ INSERT_FIELD_AND_CONTINUE (opcode, num & 0x1f, 5);
+
/* Handle a 5 bit bit position at 26. */
case 'P':
num = pa_get_absolute_expression (&the_insn, &s);
***************
*** 2421,2426 ****
--- 2457,2469 ----
s = expr_end;
CHECK_FIELD (num, 31, 0, 0);
INSERT_FIELD_AND_CONTINUE (opcode, num, 21);
+
+ /* Handle a 9 bit immediate at 28. */
+ case '$':
+ num = pa_get_absolute_expression (&the_insn, &s);
+ s = expr_end;
+ CHECK_FIELD (num, 511, 1, 0);
+ INSERT_FIELD_AND_CONTINUE (opcode, num, 3);
/* Handle a 13 bit immediate at 18. */
case 'A':
*** pa-prev/opcodes/hppa-dis.c Mon Jul 12 16:12:00 1999
--- gas-src/opcodes/hppa-dis.c Thu Jul 15 12:19:43 1999
***************
*** 104,109 ****
--- 104,112 ----
static const char shift_cond_64_names[][5] = {
",*", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
};
+ static const char bb_cond_64_names[][5] = {
+ ",*<", ",*>="
+ };
static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"};
static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"};
static const char *const short_bytes_compl_names[] = {
***************
*** 344,349 ****
--- 347,355 ----
case '^':
fput_creg (GET_FIELD (insn, 6, 10), info);
break;
+ case '!':
+ fput_creg (11, info);
+ break;
case 'E':
if (GET_FIELD (insn, 25, 25))
fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
***************
*** 495,500 ****
--- 501,526 ----
if (s[1] != 'n')
(*info->fprintf_func) (info->stream, " ");
break;
+ case 'X':
+ (*info->fprintf_func)
+ (info->stream, "%s",
+ shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
+
+ /* If the next character in args is 'n', it will handle
+ putting out the space. */
+ if (s[1] != 'n')
+ (*info->fprintf_func) (info->stream, " ");
+ break;
+ case 'B':
+ (*info->fprintf_func)
+ (info->stream, "%s",
+ bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
+
+ /* If the next character in args is 'n', it will handle
+ putting out the space. */
+ if (s[1] != 'n')
+ (*info->fprintf_func) (info->stream, " ");
+ break;
}
break;
}
***************
*** 549,558 ****
--- 575,596 ----
of address. */
fput_const (extract_17 (insn), info);
break;
+ case '.':
+ (*info->fprintf_func) (info->stream, "%d",
+ GET_FIELD (insn, 24, 25));
+ break;
case 'p':
(*info->fprintf_func) (info->stream, "%d",
31 - GET_FIELD (insn, 22, 26));
break;
+ case '~':
+ {
+ int num;
+ num = GET_FIELD (insn, 20, 20) << 5;
+ num |= GET_FIELD (insn, 22, 26);
+ (*info->fprintf_func) (info->stream, "%d", 63 - num);
+ break;
+ }
case 'P':
(*info->fprintf_func) (info->stream, "%d",
GET_FIELD (insn, 22, 26));
***************
*** 560,565 ****
--- 598,606 ----
case 'T':
(*info->fprintf_func) (info->stream, "%d",
32 - GET_FIELD (insn, 27, 31));
+ break;
+ case '$':
+ fput_const (GET_FIELD (insn, 20, 28), info);
break;
case 'A':
fput_const (GET_FIELD (insn, 6, 18), info);
--
Jerry Quinn Tel: (514) 761-8737
jquinn@nortelnetworks.com Fax: (514) 761-8505
Speech Recognition Research