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RFA: Patch to opcodes/arm-dis.c and corresponding documentation adjustments.
- To: binutils at sourceware dot cygnus dot com, nickc at cygnus dot com
- Subject: RFA: Patch to opcodes/arm-dis.c and corresponding documentation adjustments.
- From: Fernando Nasser <fnasser at cygnus dot com>
- Date: Mon, 14 Feb 2000 11:34:25 -0500
- Organization: Red Hat , Inc. - Toronto
The following patch is need by gdb so it names registers consistently
with the disassembly and to offer the gdb user all the flavor options
defined in opcodes (without having to update things at two places).
--
Fernando Nasser
Red Hat - Toronto E-Mail: fnasser@cygnus.com
2323 Yonge Street, Suite #300 Tel: 416-482-2661 ext. 311
Toronto, Ontario M4P 2C9 Fax: 416-482-6299
Index: binutils/ChangeLog
===================================================================
RCS file: /cvs/src/src/binutils/ChangeLog,v
retrieving revision 1.114
diff -c -p -r1.114 ChangeLog
*** ChangeLog 2000/02/08 18:38:13 1.114
--- ChangeLog 2000/02/14 16:29:47
***************
*** 1,3 ****
--- 1,8 ----
+ 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
+
+ * binutils.texi: Document the change of flavor name from
atpcs-special
+ to special-atpcs to prevent name conflict in gdb.
+
2000-02-08 Timothy Wall <twall@redhat.com>
* objdump.c (show_line): Fix bug preventing printing of the very
Index: binutils/binutils.texi
===================================================================
RCS file: /cvs/src/src/binutils/binutils.texi,v
retrieving revision 1.19
diff -c -p -r1.19 binutils.texi
*** binutils.texi 2000/02/08 18:38:13 1.19
--- binutils.texi 2000/02/14 16:29:52
*************** Procedure Call Standard, whilst specifyi
*** 1368,1374 ****
just use @samp{r} followed by the register number.
There are also two variants on the APCS register naming scheme enabled
! by @samp{-M reg-names-atpcs} and @samp{-M reg-names-atpcs-special}
which
use the ARM/Thumb Procedure Call Standard naming conventions.
(Eiuther
with the normal register name sor the special register names).
--- 1368,1374 ----
just use @samp{r} followed by the register number.
There are also two variants on the APCS register naming scheme enabled
! by @samp{-M reg-names-atpcs} and @samp{-M reg-names-special-atpcs}
which
use the ARM/Thumb Procedure Call Standard naming conventions.
(Eiuther
with the normal register name sor the special register names).
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.87
diff -c -p -r1.87 ChangeLog
*** ChangeLog 2000/02/10 21:41:11 1.87
--- ChangeLog 2000/02/14 16:29:55
***************
*** 1,3 ****
--- 1,13 ----
+ 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
+
+ * arm-dis.c: Change flavor name from atpcs-special to
+ special-atpcs to prevent name conflict in gdb.
+ (get_arm_regname_num_options, set_arm_regname_option,
+ get_arm_regnames): New functions. API to access the several
+ flavor of register names. Note: Used by gdb.
+ (print_insn_thumb): Use the register name entry from the
currently
+ selected flavor for LR and PC.
+
2000-02-10 Nick Clifton <nickc@cygnus.com>
* mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
Index: opcodes/arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.14
diff -c -p -r1.14 arm-dis.c
*** arm-dis.c 2000/02/07 18:27:19 1.14
--- arm-dis.c 2000/02/14 16:29:55
*************** static arm_regname regnames[] =
*** 66,72 ****
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6",
"sl", "fp", "ip", "sp", "lr", "pc" }},
{ "atpcs", "Select register names used in the ATPCS",
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6",
"v7", "v8", "IP", "SP", "LR", "PC" }},
! { "atpcs-special", "Select special register names used in the
ATPCS",
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB",
"SL", "FP", "IP", "SP", "LR", "PC" }}
};
--- 66,72 ----
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6",
"sl", "fp", "ip", "sp", "lr", "pc" }},
{ "atpcs", "Select register names used in the ATPCS",
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6",
"v7", "v8", "IP", "SP", "LR", "PC" }},
! { "special-atpcs", "Select special register names used in the
ATPCS",
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB",
"SL", "FP", "IP", "SP", "LR", "PC" }}
};
*************** static int print_insn_arm PARAMS ((bf
*** 90,97 ****
--- 90,127 ----
static int print_insn_thumb PARAMS ((bfd_vma, struct disassemble_info
*, long));
static void parse_disassembler_options PARAMS ((char *));
static int print_insn PARAMS ((bfd_vma, struct disassemble_info
*, boolean));
+ int get_arm_regname_num_options (void);
+ int set_arm_regname_option (int option);
+ int get_arm_regnames (int option, const char **setname,
+ const char **setdescription,
+ const char ***register_names);
/* Functions. */
+ int
+ get_arm_regname_num_options (void)
+ {
+ return NUM_ARM_REGNAMES;
+ }
+
+ int
+ set_arm_regname_option (int option)
+ {
+ int old = regname_selected;
+ regname_selected = option;
+ return old;
+ }
+
+ int
+ get_arm_regnames (int option, const char **setname,
+ const char **setdescription,
+ const char ***register_names)
+ {
+ *setname = regnames[option].name;
+ *setdescription = regnames[option].description;
+ *register_names = regnames[option].reg_names;
+ return 16;
+ }
+
static void
arm_decode_shift (given, func, stream)
long given;
*************** print_insn_thumb (pc, info, given)
*** 707,720 ****
if (started)
func (stream, ", ");
started = 1;
! func (stream, "lr");
}
if (domaskpc)
{
if (started)
func (stream, ", ");
! func (stream, "pc");
}
func (stream, "}");
--- 737,750 ----
if (started)
func (stream, ", ");
started = 1;
! func (stream, arm_regnames[14] /* "lr"
*/);
}
if (domaskpc)
{
if (started)
func (stream, ", ");
! func (stream, arm_regnames[15] /* "pc"
*/);
}
func (stream, "}");