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Re: CPSR changes to ARM binutils in the mainline...
- To: Scott Bambrough <scottb at netwinder dot org>
- Subject: Re: CPSR changes to ARM binutils in the mainline...
- From: Richard Earnshaw <rearnsha at arm dot com>
- Date: Tue, 30 May 2000 10:42:45 +0100
- Cc: Philip Blundell <Philip dot Blundell at pobox dot com>, Nick Clifton <nickc at cygnus dot com>, binutils mailing list <binutils at sourceware dot cygnus dot com>
- Cc: rearnsha at arm dot com
- Organization: ARM Ltd.
- Reply-To: rearnsha at arm dot com
> Philip Blundell wrote:
> >
> > My preference (for both branch and trunk) would actually be to issue a warning
> > rather than an error for these sorts of instructions. This is more consistent
> > with how the assembler handles other syntactically correct but invalid
> > instructions.
>
> The instructions it refuses to compile are not syntactically correct AFAIK. I
> think earlier assemblers were to lax.
No, to quote from the (old) ARM7 data sheet:
"No attempt shall be made to write an 8 bit immediate value into the whole
PSR since such an operation cannot preserve the reserved bits."
So it is syntactically correct, but semantically invalid.
R.
[ Note that at the time of the ARM7 Data sheet, there were just two
methods for writing the CPSR -- CPSR_flg and CPSR_all. Later processors
split the flags out further to give access to the 4 separate parts of the
CPSR. ]