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Re: PATCH: i860 re-work
- To: jle at cygnus dot com
- Subject: Re: PATCH: i860 re-work
- From: Nick Clifton <nickc at cygnus dot com>
- Date: Fri, 28 Jul 2000 13:53:53 -0700
- CC: binutils at sourceware dot cygnus dot com
Hi Jason,
: 20000-07-22 Jason Eckhardt <jle@cygnus.com>
:
: bfd:
: * bfd/cpu-i860.c: Added comments.
:
: * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
: bfd_elf32_i860_little_vec.
: (TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
: (ELF_MAXPAGESIZE): Changed to 4096.
:
: * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
: new target.
: (bfd_target_vector): Added bfd_elf32_i860_little_vec.
:
: * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
: config for little endian elf32 i860.
: (targ_defvec): Define for the new config above
: as "bfd_elf32_i860_little_vec".
: (targ_selvecs): Define for the new config above
: as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"
:
: * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
: of new target vec.
:
: * bfd/configure: Regenerated.
:
: opcodes:
: * opcodes/i860-dis.c: New file.
: (print_insn_i860): New function.
: (print_br_address): New function.
: (sign_extend): New function.
: (BITWISE_OP): New macro.
: (I860_REG_PREFIX): New macro.
: (grnames, frnames, crnames): New structures.
:
: * opcodes/disassemble.c (ARCH_i860): Define.
: (disassembler): Add check for bfd_arch_i860 to set disassemble
: function to print_insn_i860.
:
: * opcodes/Makefile.in (CFILES): Added i860-dis.c.
: (ALL_MACHINES): Added i860-dis.lo.
: (i860-dis.lo): New dependences.
:
: * opcodes/configure.in: New bits for bfd_i860_arch.
:
: * opcodes/configure: Regenerated.
:
: include:
: * include/dis-asm.h (print_insn_i860): Add prototype.
:
: * include/elf/i860.h: New file.
: (elf_i860_reloc_type): Defined ELF32 i860 relocations.
:
: * include/opcode/i860.h (btne, bte, bla): Changed these opcodes
: to use sbroff ('r') instead of split16 ('s').
: (J, K, L, M): New operand types for 16-bit aligned fields.
: (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
: use I, J, K, L, M instead of just I.
: (T, U): New operand types for split 16-bit aligned fields.
: (st.x): Changed these opcodes to use S, T, U instead of just S.
: (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
: exist on the i860.
: (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
: (pfeq.ss, pfeq.dd): New opcodes.
: (st.s): Fixed incorrect mask bits.
: (fmlow): Fixed incorrect mask bits.
: (fzchkl, pfzchkl): Fixed incorrect mask bits.
: (faddz, pfaddz): Fixed incorrect mask bits.
: (form, pform): Fixed incorrect mask bits.
: (pfld.l): Fixed incorrect mask bits.
: (fst.q): Fixed incorrect mask bits.
: (all floating point opcodes): Fixed incorrect mask bits for
: handling of dual bit.
Approved.
Incidentally, since you are putting so much work into this port, would
you like to named as the official binutils maintainer for i860 stuff ?
Cheers
Nick