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[patch] new PowerPC lightweight sync instruction
- To: Geoff Keating <geoffk at redhat dot com>
- Subject: [patch] new PowerPC lightweight sync instruction
- From: David Edelsohn <dje at watson dot ibm dot com>
- Date: Thu, 28 Dec 2000 17:02:46 -0500
- cc: binutils at sources dot redhat dot com
The PowerPC architecture used in IBM chips has expanded the sync
instruction into two variants: lightweight sync and heavyweight sync. The
original sync instruction is the new heavyweight sync and lightweight sync
is a strict subset of the heavyweight sync functionality. This allows the
programmer to specify a less expensive operation on high-end systems when
the full sync functionality is not necessary.
The basic "sync" mnemonic now utilizes an operand. "sync" without
an operand now becomes a extended mnemonic for heavyweight sync.
Processors without the lwsync instruction will not decode the L field and
will perform a heavyweight sync. Everything is backward compatible.
sync = sync 0
lwsync = sync 1
The following patch to opcodes impliments this new functionality.
David
2000-12-28 David Edelsohn <edelsohn@gnu.org>
* ppc-opc.c (XSYNC, XSYNC_MASK): New macros.
(powerpc_opcodes): Add lwsync extended mnemonic of lightweight
sync. Add optional L field to sync instruction.
Index: ppc-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
retrieving revision 1.9
diff -c -p -r1.9 ppc-opc.c
*** ppc-opc.c 2000/08/31 06:48:49 1.9
--- ppc-opc.c 2000/12/28 21:24:32
*************** extract_tbr (insn, invalid)
*** 1198,1203 ****
--- 1198,1209 ----
#define XTLB(op, xop, sh) (X ((op), (xop)) | ((((unsigned long)(sh)) & 0x1f) << 11))
#define XTLB_MASK (X_MASK | SH_MASK)
+ /* An X form sync instruction. */
+ #define XSYNC(op, xop, l) (XCMPL ((op), (xop), (l)))
+
+ /* An X form sync instruction with everything filled in except the L field. */
+ #define XSYNC_MASK (0xffdfffff)
+
/* An XFL form instruction. */
#define XFL(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1) | (((unsigned long)(rc)) & 1))
#define XFL_MASK (XFL (0x3f, 0x3ff, 1) | (((unsigned long)1) << 25) | (((unsigned long)1) << 16))
*************** const struct powerpc_opcode powerpc_opco
*** 3083,3089 ****
{ "lswi", X(31,597), X_MASK, PPCCOM, { RT, RA, NB } },
{ "lsi", X(31,597), X_MASK, PWRCOM, { RT, RA, NB } },
! { "sync", X(31,598), 0xffffffff, PPCCOM, { 0 } },
{ "dcs", X(31,598), 0xffffffff, PWRCOM, { 0 } },
{ "lfdx", X(31,599), X_MASK, COM, { FRT, RA, RB } },
--- 3089,3096 ----
{ "lswi", X(31,597), X_MASK, PPCCOM, { RT, RA, NB } },
{ "lsi", X(31,597), X_MASK, PWRCOM, { RT, RA, NB } },
! { "lwsync", XSYNC(31,598,1), 0xffffffff, PPCONLY, { 0 } },
! { "sync", X(31,598), XSYNC_MASK, PPCCOM, { L } },
{ "dcs", X(31,598), 0xffffffff, PWRCOM, { 0 } },
{ "lfdx", X(31,599), X_MASK, COM, { FRT, RA, RB } },