Re: Writing addend into instructions

[Torbjorn Granlund <tege at swox dot com>]

Andrew Haley <aph@redhat.com> writes:

  Torbjorn Granlund writes:
   > Andrew Haley <aph@redhat.com> writes:
   > 
   >    > Hmm.  A toolchain that bases a relocation on such a value surely will
   >    > not work.  Consider a typical RISC sethi/oris/ldah type instruction.
   >    > If you put an addend that is smaller than a full address into its
   >    > (say) 16-bit field, and then let that take part of a relocation, you
   >    > lose carry.
   >   
   >   Certainly, but the relocation might be to somwhere known to be on the
   >   same page, in which case there needn't be any high part.  I'm not
   >   saying that it's common, but there might be uses for it.
   >   
   > You probably mean "needn't be any low part".
  
  There needn't be any high part to carry into.
  
I don't understand.

For any relocation whose result does not include the least significant
bit, we will have the carry problem unless the full addend is
represented separately from the relocation field.

Every RISC have such relocations, of course.

-- 
Torbjörn