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PATCH: More mips3264 support
- To: binutils at sources dot redhat dot com
- Subject: PATCH: More mips3264 support
- From: Eric Christopher <echristo at redhat dot com>
- Date: 21 Jul 2001 12:12:08 +0000
- Cc: bje at redhat dot com
This adds a few things that I need to put mips3264 support into the
compiler. It basically contains a few additional instructions and
support for options to the linker and assembler.
I figure I'll put this up for Nick's approval since someone should look
at my changes :)
I'm also importing the current config.sub from gcc and adding support
for the configure target. Though I'm not sure what the proper procedure
for this is - I'm sure Ben will tell me.
-eric
--
Look out behind you!
src/ChangeLog
2001-07-19 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* config.sub: Import from gcc. Add support for mipsisa32.
src/opcodes/ChangeLog
2001-07-19 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* mips-opc.c: Add support for dmfc1, dmtc1, dmtc2, additional modes
for mfc1 and mtc1.
* mips-dis.c: Add support for bfd_mach_mipsisa32 and
bfd_mach_mipsisa64.
src/ld/ChangeLog
2001-07-19 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* ldmain.c (get_emulation): Add support for -mips32 and -mips64.
src/bfd/ChangeLog
2001-07-19 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* bfd/archures.c: Add mipsisa32 and mipsisa64.
* bfd/cpu-mips.c: Ditto.
* bfd/elf32-mips.c (_bfd_mips_elf_final_write_processing): Ditto.
src/gas/ChangeLog
2001-07-19 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* config/tc-mips.c (mips_cpu_info): Add support for mipsisa32,
5kc, and 20kc.
2001-07-19 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com>
* mips-opc.c: Add support for dmfc1, dmtc1, dmtc2, additional modes
for mfc1 and mtc1.
* mips-dis.c: Add support for bfd_mach_mipsisa32 and
bfd_mach_mipsisa64.
Index: config.sub
===================================================================
RCS file: /cvs/src/src/config.sub,v
retrieving revision 1.20
diff -u -p -w -r1.20 config.sub
--- config.sub 2001/03/22 11:09:20 1.20
+++ config.sub 2001/07/21 10:14:04
@@ -3,7 +3,7 @@
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
# Free Software Foundation, Inc.
-timestamp='2001-03-19'
+timestamp='2001-07-19'
# This file is (in principle) common to ALL GNU software.
# The presence of a machine in this file suggests that SOME GNU software
@@ -117,7 +117,7 @@ esac
# Here we must recognize all the valid KERNEL-OS combinations.
maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
case $maybe_os in
- nto-qnx* | linux-gnu* | storm-chaos* | os2-emx*)
+ nto-qnx* | linux-gnu* | storm-chaos* | os2-emx* | windows32-*)
os=-$maybe_os
basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
;;
@@ -157,6 +157,14 @@ case $os in
os=-vxworks
basic_machine=$1
;;
+ -chorusos*)
+ os=-chorusos
+ basic_machine=$1
+ ;;
+ -chorusrdb)
+ os=-chorusrdb
+ basic_machine=$1
+ ;;
-hiux*)
os=-hiuxwe2
;;
@@ -230,10 +238,12 @@ case $basic_machine in
| mips16 | mips64 | mipsel | mips64el \
| mips64orion | mips64orionel | mipstx39 | mipstx39el \
| mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \
- | mips64vr5000 | miprs64vr5000el | mcore | s390 | s390x \
- | sparc | sparclet | sparclite | sparc64 | sparcv9 | v850 | c4x \
+ | mips64vr5000 | mips64vr5000el | mipsisa32 | mipsisa32el \
+ | mcore | s390 | s390x \
+ | sparc | sparclet | sparclite | sparc64 | sparcv9 | sparcv9b \
+ | v850 | c4x \
| thumb | d10v | d30v | fr30 | avr | openrisc | tic80 \
- | pj | pjl | h8500)
+ | pj | pjl | h8500 | z8k)
basic_machine=$basic_machine-unknown
;;
m6811 | m68hc11 | m6812 | m68hc12)
@@ -241,13 +251,13 @@ case $basic_machine in
basic_machine=$basic_machine-unknown
os=-none
;;
- m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | z8k | v70 | w65)
+ m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k)
;;
# We use `pc' rather than `unknown'
# because (1) that's what they normally are, and
# (2) the word "unknown" tends to confuse beginning users.
- i[234567]86 | x86_64)
+ i*86 | x86_64)
basic_machine=$basic_machine-pc
;;
# Object if more than one company name word.
@@ -257,7 +267,7 @@ case $basic_machine in
;;
# Recognize the basic CPU types with company name.
# FIXME: clean up the formatting here.
- vax-* | tahoe-* | i[234567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \
+ vax-* | tahoe-* | i*86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \
| m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | c[123]* \
| arm-* | armbe-* | armle-* | armv*-* | strongarm-* | xscale-* \
| mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \
@@ -270,11 +280,12 @@ case $basic_machine in
| alphaev6[78]-* \
| we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \
| clipper-* | orion-* \
- | sparclite-* | pdp10-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \
- | sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \
+ | sparclite-* | pdp10-* | pdp11-* | sh-* | sh[34]-* | sh[34]eb-* \
+ | powerpc-* | powerpcle-* | sparc64-* | sparcv9-* | sparcv9b-* | sparc86x-* \
+ | mips16-* | mips64-* | mipsel-* \
| mips64el-* | mips64orion-* | mips64orionel-* \
| mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \
- | mipstx39-* | mipstx39el-* | mcore-* \
+ | mipstx39-* | mipstx39el-* | mipsisa32-* | mipsisa32el-* | mcore-* \
| f30[01]-* | f700-* | s390-* | s390x-* | sv1-* | t3e-* \
| [cjt]90-* \
| m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \
@@ -506,19 +517,19 @@ case $basic_machine in
basic_machine=i370-ibm
;;
# I'm not sure what "Sysv32" means. Should this be sysv3.2?
- i[34567]86v32)
+ i*86v32)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-sysv32
;;
- i[34567]86v4*)
+ i*86v4*)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-sysv4
;;
- i[34567]86v)
+ i*86v)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-sysv
;;
- i[34567]86sol2)
+ i*86sol2)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-solaris2
;;
@@ -879,6 +890,10 @@ case $basic_machine in
basic_machine=hppa1.1-winbond
os=-proelf
;;
+ windows32)
+ basic_machine=i386-pc
+ os=-windows32-msvcrt
+ ;;
xmp)
basic_machine=xmp-cray
os=-unicos
@@ -935,7 +950,7 @@ case $basic_machine in
sh3 | sh4)
basic_machine=sh-unknown
;;
- sparc | sparcv9)
+ sparc | sparcv9 | sparcv9b)
basic_machine=sparc-sun
;;
cydra)
@@ -957,6 +972,9 @@ case $basic_machine in
basic_machine=c4x-none
os=-coff
;;
+ *-unknown)
+ # Make sure to match an already-canonicalized machine name.
+ ;;
*)
echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
exit 1
@@ -1013,6 +1031,7 @@ case $os in
| -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
| -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
| -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
+ | -chorusos* | -chorusrdb* \
| -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
| -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \
| -interix* | -uwin* | -rhapsody* | -darwin* | -opened* \
@@ -1022,7 +1041,7 @@ case $os in
;;
-qnx*)
case $basic_machine in
- x86-* | i[34567]86-*)
+ x86-* | i*86-*)
;;
*)
os=-nto$os
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.36
diff -u -p -w -r1.36 archures.c
--- archures.c 2001/05/23 17:26:35 1.36
+++ archures.c 2001/07/21 10:14:06
@@ -142,6 +142,8 @@ DESCRIPTION
.#define bfd_mach_mips5 5
.#define bfd_mach_mips64 64
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
+.#define bfd_mach_mipsisa32 99032
+.#define bfd_mach_mipsisa64 99064
. bfd_arch_i386, {* Intel 386 *}
.#define bfd_mach_i386_i386 0
.#define bfd_mach_i386_i8086 1
Index: bfd/cpu-mips.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-mips.c,v
retrieving revision 1.9
diff -u -p -w -r1.9 cpu-mips.c
--- cpu-mips.c 2001/05/23 17:26:35 1.9
+++ cpu-mips.c 2001/07/21 10:14:06
@@ -61,6 +61,8 @@ enum
I_mips32_4k,
I_mips5,
I_mips64,
+ I_mipsisa32,
+ I_mipsisa64,
I_sb1,
};
@@ -89,6 +91,8 @@ static const bfd_arch_info_type arch_inf
N (64, 64, bfd_mach_mips5, "mips:mips5", false, NN(I_mips5)),
N (64, 64, bfd_mach_mips64, "mips:mips64", false, NN(I_mips64)),
N (64, 64, bfd_mach_mips_sb1, "mips:sb1", false, 0),
+ N (32, 32, bfd_mach_mipsisa32, "mips:isa32", false, NN(I_mipsisa32)),
+ N (64, 64, bfd_mach_mipsisa64, "mips:isa64", false, NN(I_mipsisa64)),
};
/* The default architecture is mips:3000, but with a machine number of
Index: bfd/elf32-mips.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-mips.c,v
retrieving revision 1.103
diff -u -p -w -r1.103 elf32-mips.c
--- elf32-mips.c 2001/07/04 07:15:20 1.103
+++ elf32-mips.c 2001/07/21 10:14:15
@@ -2422,6 +2422,13 @@ _bfd_mips_elf_final_write_processing (ab
case bfd_mach_mips_sb1:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
break;
+
+ case bfd_mach_mipsisa32:
+ val = E_MIPS_ARCH_32;
+ break;
+
+ case bfd_mach_mipsisa64:
+ val = E_MIPS_ARCH_64;
}
elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.51
diff -u -p -w -r1.51 tc-mips.c
--- tc-mips.c 2001/07/04 12:32:07 1.51
+++ tc-mips.c 2001/07/21 10:14:26
@@ -12074,6 +12074,7 @@ static const struct mips_cpu_info mips_c
/* MIPS32 ISA */
{ "MIPS32", 1, ISA_MIPS32, CPU_MIPS32, },
{ "Generic-MIPS32", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "mipsisa32", 0, ISA_MIPS32, CPU_MIPS32, },
#if 1
/* XXX for now, MIPS64 -> MIPS3 because of history */
@@ -12084,6 +12085,10 @@ static const struct mips_cpu_info mips_c
#endif
{ "mips64isa", 1, ISA_MIPS64, CPU_MIPS64 },
{ "Generic-MIPS64", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "5kc", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "5Kc", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "20kc", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "20Kc", 0, ISA_MIPS64, CPU_MIPS64, },
/* R2000 CPU */
{ "R2000", 0, ISA_MIPS1, CPU_R2000, },
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.15
diff -u -p -w -r1.15 mips.h
--- mips.h 2001/05/23 17:26:39 1.15
+++ mips.h 2001/07/21 10:14:27
@@ -228,6 +228,7 @@ struct mips_opcode
"<>(),"
"ABCDEFGHIJLMNPRSTUVW"
"abcdfhijklopqrstuvwxz"
+
*/
/* These are the bits which may be set in the pinfo field of an
Index: ld/ldmain.c
===================================================================
RCS file: /cvs/src/src/ld/ldmain.c,v
retrieving revision 1.25
diff -u -p -w -r1.25 ldmain.c
--- ldmain.c 2001/07/11 19:50:56 1.25
+++ ldmain.c 2001/07/21 10:14:28
@@ -511,6 +511,8 @@ get_emulation (argc, argv)
else if (strcmp (argv[i], "-mips1") == 0
|| strcmp (argv[i], "-mips2") == 0
|| strcmp (argv[i], "-mips3") == 0
+ || strcmp (argv[i], "-mips32") == 0
+ || strcmp (argv[i], "-mips64") == 0
|| strcmp (argv[i], "-mips4") == 0
|| strcmp (argv[i], "-mips5") == 0)
{
Index: opcodes/mips-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-dis.c,v
retrieving revision 1.16
diff -u -p -w -r1.16 mips-dis.c
--- mips-dis.c 2001/05/23 17:26:40 1.16
+++ mips-dis.c 2001/07/21 10:14:35
@@ -388,6 +388,15 @@ mips_isa_type (mach, isa, cputype)
*cputype = CPU_SB1;
*isa = ISA_MIPS64;
break;
+ case bfd_mach_mipsisa32:
+ * cputype = CPU_MIPS32;
+ * isa = ISA_MIPS32;
+ break;
+ case bfd_mach_mipsisa64:
+ * cputype = CPU_MIPS64;
+ * isa = ISA_MIPS64;
+ break;
+
default:
*cputype = CPU_R3000;
*isa = ISA_MIPS3;
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.22
diff -u -p -w -r1.22 mips-opc.c
--- mips-opc.c 2001/06/22 21:10:01 1.22
+++ mips-opc.c 2001/07/21 10:14:35
@@ -401,14 +401,18 @@ const struct mips_opcode mips_builtin_op
{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 },
{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 },
+{"dmfc1", "t,S,H", 0x44200000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, I64},
{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
+{"dmtc1", "t,S,H", 0x44a00000, 0xffe007f8, COD|RD_t|WR_S|FP_S, I64},
{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, I3 },
{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, I64 },
+{"dmfc2", "t,S,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, I64},
{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I3 },
{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I64 },
+{"dmtc2", "t,S,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_S|FP_S, I64},
{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, I3 },
{"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, I64 },
{"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I3 },
@@ -563,6 +567,8 @@ const struct mips_opcode mips_builtin_op
{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
+{"mfc1", "t,S,H", 0x44000000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, I32},
+{"mfc1", "t,G,H", 0x44000000, 0xffe007f8, LCD|WR_t|RD_S|FP_S, I32},
{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 },
{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
@@ -600,6 +606,8 @@ const struct mips_opcode mips_builtin_op
{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
+{"mtc1", "t,S,H", 0x44800000, 0xffe007f8, COD|RD_t|WR_S|FP_S, I32 },
+{"mtc1", "t,G,H", 0x44800000, 0xffe007f8, COD|RD_t|WR_S|FP_S, I32 },
{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 },
{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },