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d10v: don't silently turn @-r# into @-sp
- From: Alexandre Oliva <aoliva at redhat dot com>
- To: binutils at sources dot redhat dot com
- Date: 29 Nov 2001 15:07:00 -0200
- Subject: d10v: don't silently turn @-r# into @-sp
- Organization: GCC Team, Red Hat
d10v only accepts pre-decrement of sp. However, its assembler
silently accepts other register names as operands of st and st2w, but
the insn opcode has all of the RSRC bits set, such that we end up
getting @-sp regardless of the register name given, instead of
rejecting the illegal operands. This patch fixes this bug. Ok to
install?
Index: include/opcode/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* d10v.h (OPERAND_SP): New macro.
Index: include/opcode/d10v.h
===================================================================
RCS file: /cvs/src/src/include/opcode/d10v.h,v
retrieving revision 1.5
diff -u -p -r1.5 d10v.h
--- include/opcode/d10v.h 2001/08/26 11:47:39 1.5
+++ include/opcode/d10v.h 2001/11/29 17:02:38
@@ -181,6 +181,9 @@ extern const struct d10v_operand d10v_op
/* needed for rac/rachi */
#define RESTRICTED_NUM3 (0x80000)
+/* Pre-decrement is only supported for SP. */
+#define OPERAND_SP (0x100000)
+
/* Structure to hold information about predefined registers. */
struct pd_reg
{
Index: opcodes/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP.
(RSRC_SP): New macro.
(d10v_operands): Add it.
(d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP.
Index: opcodes/d10v-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/d10v-opc.c,v
retrieving revision 1.6
diff -u -p -r1.6 d10v-opc.c
--- opcodes/d10v-opc.c 2001/03/13 22:58:34 1.6
+++ opcodes/d10v-opc.c 2001/11/29 17:02:39
@@ -69,7 +69,7 @@ const struct pd_reg d10v_predefined_regi
{ "r13", NULL, OPERAND_GPR+13 },
{ "r14", NULL, OPERAND_GPR+14 },
{ "r14-r15", NULL, OPERAND_GPR+14 },
- { "r15", "sp", OPERAND_GPR+15 },
+ { "r15", "sp", OPERAND_SP|OPERAND_GPR+15 },
{ "r2", NULL, OPERAND_GPR+2 },
{ "r2-r3", NULL, OPERAND_GPR+2 },
{ "r3", NULL, OPERAND_GPR+3 },
@@ -85,7 +85,7 @@ const struct pd_reg d10v_predefined_regi
{ "rpt_c", NULL, OPERAND_CONTROL+7 },
{ "rpt_e", NULL, OPERAND_CONTROL+9 },
{ "rpt_s", NULL, OPERAND_CONTROL+8 },
- { "sp", NULL, OPERAND_GPR+15 },
+ { "sp", NULL, OPERAND_SP|OPERAND_GPR+15 },
};
int
@@ -100,7 +100,9 @@ const struct d10v_operand d10v_operands[
{ 0, 0, 0 },
#define RSRC (UNUSED + 1)
{ 4, 1, OPERAND_GPR|OPERAND_REG },
-#define RDST (RSRC + 1)
+#define RSRC_SP (RSRC + 1)
+ { 4, 1, OPERAND_SP|OPERAND_GPR|OPERAND_REG },
+#define RDST (RSRC_SP + 1)
{ 4, 5, OPERAND_DEST|OPERAND_GPR|OPERAND_REG },
#define ASRC (RDST + 1)
{ 1, 4, OPERAND_ACC0|OPERAND_ACC1|OPERAND_REG },
@@ -311,13 +313,13 @@ const struct d10v_opcode d10v_opcodes[]
{ "srx", SHORT_2, 1, IU, PAR|RF0, 0x4609, 0x7e1f, { RDST } },
{ "st", LONG_L, 1, MU, SEQ, 0x34000000, 0x3f000000, { RSRC2, ATPAR, NUM16, RSRC } },
{ "st", SHORT_2, 1, MU, PAR|WMEM, 0x6800, 0x7e01, { RSRC2, ATSIGN, RSRC } },
- { "st", SHORT_2, 1, MU, PAR|WMEM, 0x6c1f, 0x7e1f, { RSRC2, ATMINUS, RSRC } },
+ { "st", SHORT_2, 1, MU, PAR|WMEM, 0x6c1f, 0x7e1f, { RSRC2, ATMINUS, RSRC_SP } },
{ "st", SHORT_2, 1, MU, PAR|WMEM, 0x6801, 0x7e01, { RSRC2, ATSIGN, RSRC, PLUS } },
{ "st", SHORT_2, 1, MU, PAR|WMEM, 0x6c01, 0x7e01, { RSRC2, ATSIGN, RSRC, MINUS } },
{ "st", LONG_L, 1, MU, SEQ, 0x36010000, 0x3f0f0000, { RSRC2, ATSIGN, NUM16 } },
{ "st2w", LONG_L, 1, MU, SEQ, 0x35000000, 0x3f100000, { RSRC2E, ATPAR, NUM16, RSRC } },
{ "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6a00, 0x7e21, { RSRC2E, ATSIGN, RSRC } },
- { "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6e1f, 0x7e3f, { RSRC2E, ATMINUS, RSRC } },
+ { "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6e1f, 0x7e3f, { RSRC2E, ATMINUS, RSRC_SP } },
{ "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6a01, 0x7e21, { RSRC2E, ATSIGN, RSRC, PLUS } },
{ "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6e01, 0x7e21, { RSRC2E, ATSIGN, RSRC, MINUS } },
{ "st2w", LONG_L, 1, MU, SEQ, 0x37010000, 0x3f1f0000, { RSRC2E, ATSIGN, NUM16 } },
Index: gas/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* config/tc-d10v.c (find_opcode): Reject non-SP operand if
flags requires SP.
Index: gas/config/tc-d10v.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-d10v.c,v
retrieving revision 1.19
diff -u -p -r1.19 tc-d10v.c
--- gas/config/tc-d10v.c 2001/11/15 21:28:55 1.19
+++ gas/config/tc-d10v.c 2001/11/29 17:02:39
@@ -1276,7 +1276,8 @@ find_opcode (opcode, myops)
if (X_op != O_register
|| (num & ~flags
& (OPERAND_GPR | OPERAND_ACC0 | OPERAND_ACC1
- | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL)))
+ | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL))
+ || ((flags & OPERAND_SP) && ! (num & OPERAND_SP)))
{
as_bad (_("bad opcode or operands"));
return 0;
@@ -1385,7 +1386,8 @@ find_opcode (opcode, myops)
|| (num & ~flags
& (OPERAND_GPR | OPERAND_ACC0 | OPERAND_ACC1
| OPERAND_FFLAG | OPERAND_CFLAG
- | OPERAND_CONTROL)))
+ | OPERAND_CONTROL))
+ || ((flags & OPERAND_SP) && ! (num & OPERAND_SP)))
{
match = 0;
break;
--
Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist *Please* write to mailing lists, not to me