Re: [PATCH] MIPS gas: 64 bit aware rol/ror macros

[cgd at broadcom dot com]

At Tue, 14 May 2002 06:16:34 +0000 (UTC), "Thiemo Seufer" wrote:
> And immediate rotate macros aren't mentioned there at all. I don't
> know how reliable SMR is WRT.

I noted the absence of the immediate versions, but I don't recall what
I thought of that at the time.  (I don't recall whether the pseudo
code actually says the third argument must be a register, or whether
it just takes its value...)  However, it's a bit immaterial since it
does look like there are at least one or two real implementations to
pattern pseudo-ops on.

There are some bits of the style of SMR that I don't like.  I think
this is one example.  8-)


> I thought about using drol/dror, but why should someone expect to have
> a 32 bit "rotate" of a 64 bit register? It looks like the la/dla
> weirdness.

oh, that one's easy:

	lw	$2, addr
	ror	$3, $2, 1

what is bit 31 of $3?

choices are:

	bit 0 of $2

	bit 32 of $2, a.k.a. the sign-extension of bit 31 of $2?

The former is what one would get if one ran the code on a machine w/
32-bit registers.  I.e., it allows upward compatibility.  Also, even
on a 64-bit system it's a useful operation in its own right.

The latter is ... almost certainly not the expected result, especially
to somebody familiar with the rest of the shift instructions.  8-)


> IOW, what would you expect as the result from a 32 bit rotate of
> a 64 bit register,

see above.


> especially if the 64 bit value isn't a 32 bit
> sign extended one?

if the 64-bit value isn't a signe extended one, i'd say the result
should be unpredictable -- just like the result of instructions like
addiu, sra, and srl are unpredictable when used on a 64-bit value
which isn't a sign-extended 32-bit value.  (do _not_ take sll as an
example, it's a very special case.  8-)

If i remember them properly, I think the expansions given in SMR are
Just Fine.  8-)



chris