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Re: new port for Xtensa processors (bfd files)


Hi Bob,

> >     3. Change the annotation on the files so that they are no longer
> >        generated files but master source files.
> 
> I have no problem with this.  I've applied the following patches to
> change the comments about the files being automatically generated.

Great - thanks very much.

> It would still be nice if changes to the interfaces are minimized
> and preferably done in consultation with Tensilica.

Well I doubt very much if the interfaces will be changed, and
certainly not needlessly.

Making the changes in consultation with Tensilica is not really an
option, since that would imply some kind of ownership by Tensilica.
But making the changes in consultation with the maintainer for the
Xtensa port is certainly reasonable, and if that maintainer just
happens to work for Tensilica....


On a different note - there is a problem with the linker tests you
contributed.  They are being run for non-Xtensa ports.  eg from a
recent run of the x86 linux native:

  Running /sources/FSF/ld/testsuite/ld-xtensa/coalesce.exp ...
  /builds/FSF/native/ld/../gas/as-new   -o tmpdir/coalesce1.o /sources/FSF/ld/testsuite/ld-xtensa/coalesce1.s
  /sources/FSF/ld/testsuite/ld-xtensa/coalesce1.s: Assembler messages:
  /sources/FSF/ld/testsuite/ld-xtensa/coalesce1.s:11: Error: no such instruction: `entry a5,16'

You need to add a target test at the start of your *.exp scripts.  eg:

  if ![istarget xtensa-*-*] {
      return
  }

Cheers
        Nick




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