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Re: [PATCH] Add sh4-nommu-nofpu architecture


> Surely both the table in opcodes/sh-opc.h and the table in
> include/elf/sh.h should describe exactly the same thing. I mean, the
> linker is trying to decide which is the most generic instruction
> set/architecture in exactly the same way as the linker. It does it based
> on a series of files rather than a series of opcodes, but what else is
> different?
> 
> That being the case, wouldn't it be better to unify them?  As I see it,
> the only reason it was done differently in sh.h is that there was an
> easier way to do it (based on the value of the magic number). Since that
> technique is now invalid, and there doesn't seem to be any way to fix
> it, is there any reason not to glue the two together? 'opcodes' and
> 'include' are always distributed together are they not?
> 
> I'm not sure where it might live exactly but here's a quick mock-up:
> 
> #define arch_sh1     0x0001
> #define arch_sh2     0x0002
> #define arch_sh3     0x0004
> #define arch_sh3e    0x0008
> #define arch_sh4     0x0010
> #define arch_sh2e    0x0020
> #define arch_sh4a    0x0040
> #define arch_sh_dsp  0x0100
> #define arch_sh3_dsp 0x0200
> #define arch_sh4al_dsp 0x0400
> #define arch_sh4_nofpu 0x1000
> #define arch_sh4a_nofpu 0x2000
> #define arch_sh4_nommu_nofpu 0x4000  /* no mmu nor fpu */
> 
> #define arch_sh1_up  (arch_sh1 | arch_sh2_up)
> #define arch_sh2_up  (arch_sh2 | arch_sh2e_up | arch_sh3_up |
> arch_sh_dsp)
> #define arch_sh2e_up (arch_sh2e | arch_sh3e_up)
> #define arch_sh3_up  (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \
>                       | arch_sh4_nommu_nofpu_up)
> #define arch_sh3e_up (arch_sh3e | arch_sh4_up)
> #define arch_sh4_up  (arch_sh4 | arch_sh4a_up)
> #define arch_sh4a_up (arch_sh4a)
> 
> #define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up)
> #define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up)
> #define arch_sh4al_dsp_up (arch_sh4al_dsp)
> 
> #define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu |
> arch_sh4_nofp_up)
> 
> #define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up |
> arch_sh4a_nofp_up)
> #define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up |
> arch_sh4al_dsp_up)
> 
> #define arch_sh_any_with_mmu (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up
> \
>         | arch_sh4_nofp_up)  /* arch _sh3_up omitting
> arch_sh4_nommu_nofpu */
> 
> #define ARCH_HAS_DSP(a) (((a) & arch_sh_dsp_up) != 0)
> #define ARCH_HAS_FPU(a) (((a) & arch_sh2e_up) != 0)

P.S.: We can combine this with my previous proposal to save bits:

#define arch_sh1_base	0x0001
#define arch_sh2_base	0x0002
#define arch_sh3_base	0x0004
#define arch_sh4_base	0x0008
#define arch_sh4a_base	0x0010
#define arch_sh_no_mmu	0x04000000
#define arch_sh_has_mmu 0x08000000
#define arch_sh_no_fpu	0x10000000 /* neither FPU nor DSP */
#define arch_sh_sp_fpu	0x20000000 /* single precision FPU */
#define arch_sh_dp_fpu	0x40000000 /* double precision FPU */
#define arch_sh_has_dsp	0x80000000

#define arch_sh_base_mask 0x0000001f
#define arch_sh_mmu_mask  0x0c000000
#define arch_sh_co_mask   0xf0000000

#define arch_sh1	(arch_sh1_base|arch_sh_no_mmu|arch_sh_no_fpu)
#define arch_sh2	(arch_sh2_base|arch_sh_no_mmu|arch_sh_no_fpu)
#define arch_sh2e	(arch_sh2_base|arch_sh_no_mmu|arch_sh_sp_fpu)
#define arch_sh_dsp	(arch_sh2_base|arch_sh_no_mmu|arch_sh_has_dsp)
#define arch_sh3	(arch_sh3_base|arch_sh_has_mmu|arch_sh_no_fpu)
#define arch_sh3e	(arch_sh3_base|arch_sh_has_mmu|arch_sh_sp_fpu)
#define arch_sh3_dsp	(arch_sh3_base|arch_sh_has_mmu|arch_sh_has_dsp)
#define arch_sh4	(arch_sh4_base|arch_sh_has_mmu|arch_sh_dp_fpu)
#define arch_sh4a	(arch_sh4a_base|arch_sh_has_mmu|arch_sh_dp_fpu)
#define arch_sh4al_dsp	(arch_sh4a_base|arch_sh_has_mmu|arch_sh_has_dsp)
#define arch_sh4_nofpu	(arch_sh4_base|arch_sh_has_mmu|arch_sh_no_fpu)
#define arch_sh4a_nofpu	(arch_sh4a_base|arch_sh_has_mmu|arch_sh_no_fpu)
#define arch_sh4_nommu_nofpu (arch_sh4_base|arch_sh_no_mmu|arch_sh_no_fpu)

#define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2))
#define SH_VALID_ARCH_SET(SET) \
  (((SET) & arch_sh_base_mask) \
   && ((SET) & arch_sh_mmu_mask) \
   && ((SET) & arch_sh_co_mask))

in bfd/elf32-sh.c, we can define this table & function:

static flagword sh_ef_archset_table[] = { EF_SH_I_TABLE };

int
sh_find_elf_flags ()
{
  int flags;

  flags = sizeof (sh_ef_archset_table) / sizeof (sh_ef_archset_table[0]) - 1;
  while (flags > EF_SH_UNKNOWN && sh_ef_archset_table[flags] != arch_set)
    flags--;
  return flags;
}

Both of these are then used in sh_elf_merge_private_data, and sh_find_elf_flags
can also be used in gas/config/tc-sh.c:sh_elf_final_processing .
I suppose we can declare sh_find_elf_flags in include/elf/sh.h .

The arch_sh*_up values are defined as before.  merging is done by
ANDing them together.  If the result is zero in one of the fields
defined by arch_sh_base_mask, arch_sh_mmu_mask or arch_sh_co_mask,
we have a conflict.  Otherwise, we should find an exact match in
EF_SH_TABLE.  I leave it to Andrew to prove or disprove that statement.

#define arch_sh1_up  (arch_sh1 | arch_sh2_up)
#define arch_sh2_up  (arch_sh2 | arch_sh2e_up | arch_sh3_up | arch_sh_dsp)
#define arch_sh2e_up (arch_sh2e | arch_sh3e_up)
#define arch_sh3_up  (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \
		      | arch_sh4_nommu_nofpu_up)
#define arch_sh3e_up (arch_sh3e | arch_sh4_up)
#define arch_sh4_up  (arch_sh4 | arch_sh4a_up)
#define arch_sh4a_up (arch_sh4a)

#define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up)
#define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up)
#define arch_sh4al_dsp_up (arch_sh4al_dsp)

#define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up)

#define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up)
#define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up)


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