This is the mail archive of the
binutils@sources.redhat.com
mailing list for the binutils project.
Thumb32 assembler (18/69)
- From: Zack Weinberg <zack at codesourcery dot com>
- To: binutils <binutils at sourceware dot org>
- Date: Tue, 26 Apr 2005 02:54:16 -0700
- Subject: Thumb32 assembler (18/69)
Convert the iwmmxt all-register-operand instructions to
parse_operands, allowing much of check_iwmmxt_insn to be deleted.
zw
* config/tc-arm.c (iwmmxt_insn_type): Remove check_rd, check_wr,
check_wrwr, check_wrwrwcg, check_tbcst, check_tmovmsk, check_tmia,
check_tmcrr, check_tmrrc, check_tmcr, check_tmrc.
(check_iwmmxt_insn): Remove cases for above constants.
(do_iwmmxt_tandc): Rename do_iwmmxt_tandorc. Use parse_operands, not
check_iwmmxt_insn.
(do_iwmmxt_torc): Delete.
(insns): Use do_iwmmxt_tandorc for tandcb, tandch, tandcw, torcb,
torch, torcw.
(do_iwmmxt_tbcst, do_iwmmxt_tmcr, do_iwmmxt_tmcrr, do_iwmmxt_tmia)
(do_iwmmxt_tmovmsk, do_iwmmxt_tmrc, do_iwmmxt_tmrrc, do_iwmmxt_wmov)
(do_iwmmxt_wrwr, do_iwmmxt_wrwrwr, do_iwmmxt_wrwrwcg, do_iwmmxt_wzero):
Use parse_operands, not check_iwmmxt_insn.
===================================================================
Index: gas/config/tc-arm.c
--- gas/config/tc-arm.c (revision 19)
+++ gas/config/tc-arm.c (revision 20)
@@ -340,18 +340,6 @@
enum iwmmxt_insn_type
{
- check_rd,
- check_wr,
- check_wrwr,
- check_wrwrwr,
- check_wrwrwcg,
- check_tbcst,
- check_tmovmsk,
- check_tmia,
- check_tmcrr,
- check_tmrrc,
- check_tmcr,
- check_tmrc,
check_tinsr,
check_textrc,
check_waligni,
@@ -7876,96 +7864,6 @@
inst.error = BAD_ARGS;
switch (insn_type)
{
- case check_rd:
- if ((reg = reg_required_here (&str, 12, REG_TYPE_RN)) == FAIL)
- return FAIL;
- break;
-
- case check_wr:
- if ((reg_required_here (&str, 0, REG_TYPE_MMXWR)) == FAIL)
- return FAIL;
- break;
-
- case check_wrwr:
- if ((reg_required_here (&str, 12, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_MMXWR) == FAIL))
- return FAIL;
- break;
-
- case check_wrwrwr:
- if ((reg_required_here (&str, 12, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 0, REG_TYPE_MMXWR) == FAIL))
- return FAIL;
- break;
-
- case check_wrwrwcg:
- if ((reg_required_here (&str, 12, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 0, REG_TYPE_MMXWCG) == FAIL))
- return FAIL;
- break;
-
- case check_tbcst:
- if ((reg_required_here (&str, 16, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 12, REG_TYPE_RN) == FAIL))
- return FAIL;
- break;
-
- case check_tmovmsk:
- if ((reg_required_here (&str, 12, REG_TYPE_RN) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_MMXWR) == FAIL))
- return FAIL;
- break;
-
- case check_tmia:
- if ((reg_required_here (&str, 5, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 0, REG_TYPE_RN) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 12, REG_TYPE_RN) == FAIL))
- return FAIL;
- break;
-
- case check_tmcrr:
- if ((reg_required_here (&str, 0, REG_TYPE_MMXWR) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 12, REG_TYPE_RN) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_RN) == FAIL))
- return FAIL;
- break;
-
- case check_tmrrc:
- if ((reg_required_here (&str, 12, REG_TYPE_RN) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_RN) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 0, REG_TYPE_MMXWR) == FAIL))
- return FAIL;
- break;
-
- case check_tmcr:
- if ((reg_required_here (&str, 16, REG_TYPE_MMXWC) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 12, REG_TYPE_RN) == FAIL))
- return FAIL;
- break;
-
- case check_tmrc:
- if ((reg_required_here (&str, 12, REG_TYPE_RN) == FAIL
- || skip_past_comma (&str) == FAIL
- || reg_required_here (&str, 16, REG_TYPE_MMXWC) == FAIL))
- return FAIL;
- break;
-
case check_tinsr:
if ((reg_required_here (&str, 16, REG_TYPE_MMXWR) == FAIL
|| skip_past_comma (&str) == FAIL
@@ -8025,20 +7923,27 @@
}
static void
-do_iwmmxt_tandc (char * str)
+do_iwmmxt_tandorc (char * str)
{
- int reg;
+ if (parse_operands (str, OPERANDS1(RR)))
+ return;
+ if (inst.operands[0].reg != REG_PC)
+ {
+ inst.error = _("only r15 allowed here");
+ return;
+ }
- reg = check_iwmmxt_insn (str, check_rd, 0);
-
- if (reg != REG_PC && !inst.error)
- inst.error = _("only r15 allowed here");
+ inst.instruction |= (inst.operands[0].reg << 12);
}
static void
do_iwmmxt_tbcst (char * str)
{
- check_iwmmxt_insn (str, check_tbcst, 0);
+ if (parse_operands (str, OPERANDS2(RR,RIWR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
}
static void
@@ -8080,46 +7985,68 @@
static void
do_iwmmxt_tmcr (char * str)
{
- check_iwmmxt_insn (str, check_tmcr, 0);
+ if (parse_operands (str, OPERANDS2(RIWC,RR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 16);
+ inst.instruction |= (inst.operands[1].reg << 12);
}
static void
do_iwmmxt_tmcrr (char * str)
{
- check_iwmmxt_insn (str, check_tmcrr, 0);
+ if (parse_operands (str, OPERANDS3(RIWR,RR,RR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 0);
+ inst.instruction |= (inst.operands[1].reg << 12);
+ inst.instruction |= (inst.operands[2].reg << 16);
}
static void
do_iwmmxt_tmia (char * str)
{
- check_iwmmxt_insn (str, check_tmia, 0);
+ if (parse_operands (str, OPERANDS3(RIWR,RR,RR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 5);
+ inst.instruction |= (inst.operands[1].reg << 0);
+ inst.instruction |= (inst.operands[2].reg << 12);
}
static void
do_iwmmxt_tmovmsk (char * str)
{
- check_iwmmxt_insn (str, check_tmovmsk, 0);
+ if (parse_operands (str, OPERANDS2(RR,RIWR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
+
}
static void
do_iwmmxt_tmrc (char * str)
{
- check_iwmmxt_insn (str, check_tmrc, 0);
+ if (parse_operands (str, OPERANDS2(RR,RIWC)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
}
static void
do_iwmmxt_tmrrc (char * str)
{
- check_iwmmxt_insn (str, check_tmrrc, 0);
+ if (parse_operands (str, OPERANDS3(RR,RR,RIWR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
+ inst.instruction |= (inst.operands[2].reg << 0);
}
static void
-do_iwmmxt_torc (char * str)
-{
- check_iwmmxt_insn (str, check_rd, 0);
-}
-
-static void
do_iwmmxt_waligni (char * str)
{
unsigned long number;
@@ -8134,10 +8061,13 @@
static void
do_iwmmxt_wmov (char * str)
{
- if (check_iwmmxt_insn (str, check_wrwr, 0) == (unsigned long) FAIL)
+ if (parse_operands (str, OPERANDS2(RIWR,RIWR)))
return;
- inst.instruction |= ((inst.instruction >> 16) & 0xf);
+ /* WMOV rD, rN is an alias for WOR rD, rN, rN. */
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
+ inst.instruction |= (inst.operands[1].reg << 0);
}
static void
@@ -8186,19 +8116,33 @@
static void
do_iwmmxt_wrwr (char * str)
{
- check_iwmmxt_insn (str, check_wrwr, 0);
+ if (parse_operands (str, OPERANDS2(RIWR,RIWR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
}
static void
do_iwmmxt_wrwrwcg (char * str)
{
- check_iwmmxt_insn (str, check_wrwrwcg, 0);
+ if (parse_operands (str, OPERANDS3(RIWR,RIWR,RIWG)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
+ inst.instruction |= (inst.operands[2].reg << 0);
}
static void
do_iwmmxt_wrwrwr (char * str)
{
- check_iwmmxt_insn (str, check_wrwrwr, 0);
+ if (parse_operands (str, OPERANDS3(RIWR,RIWR,RIWR)))
+ return;
+
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[1].reg << 16);
+ inst.instruction |= (inst.operands[2].reg << 0);
}
static void
@@ -8216,13 +8160,13 @@
static void
do_iwmmxt_wzero (char * str)
{
- if (check_iwmmxt_insn (str, check_wr, 0) == (unsigned long) FAIL)
+ if (parse_operands (str, OPERANDS1(RIWR)))
return;
- /* WZERO reg is an alias for WANDN reg, reg, reg.
- Copy Rm field to Rd and Rn. */
- inst.instruction |= ((inst.instruction & 0xf) << 12);
- inst.instruction |= ((inst.instruction & 0xf) << 16);
+ /* WZERO reg is an alias for WANDN reg, reg, reg. */
+ inst.instruction |= (inst.operands[0].reg << 0);
+ inst.instruction |= (inst.operands[0].reg << 12);
+ inst.instruction |= (inst.operands[0].reg << 16);
}
/* Cirrus Maverick instructions. Simple 2-, 3-, and 4-register
@@ -10055,9 +9999,9 @@
{"mra", 0xec500000, 3, ARM_CEXT_XSCALE, do_xsc_mra},
/* Intel Wireless MMX technology instructions. */
- {"tandcb", 0xee130130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
- {"tandch", 0xee530130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
- {"tandcw", 0xee930130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
+ {"tandcb", 0xee130130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandorc},
+ {"tandch", 0xee530130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandorc},
+ {"tandcw", 0xee930130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandorc},
{"tbcstb", 0xee400010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
{"tbcsth", 0xee400050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
{"tbcstw", 0xee400090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
@@ -10086,9 +10030,9 @@
{"tmovmskw", 0xee900030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
{"tmrc", 0xee100110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmrc},
{"tmrrc", 0xec500000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmrrc},
- {"torcb", 0xee130150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
- {"torch", 0xee530150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
- {"torcw", 0xee930150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
+ {"torcb", 0xee130150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tandorc},
+ {"torch", 0xee530150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tandorc},
+ {"torcw", 0xee930150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tandorc},
{"waccb", 0xee0001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
{"wacch", 0xee4001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
{"waccw", 0xee8001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},