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[commit] x86 Intel mode disassembler adjustments


Operand sizes weren't displayed in 16-bit mode at all, and were
incorrect
in some 64-bit cases. Additionally consolidating code a little.

Built and tested on i686-pc-linux-gnu and x86_64-unknown-linux-gnu.

Jan

opcodes/
2005-08-26  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (intel_operand_size): New, broken out from OP_E
for
	re-use.
	(OP_E): Call intel_operand_size, move call site out of mode
	dependent code.
	(OP_OFF): Call intel_operand_size if suffix_always. Remove
	ATTRIBUTE_UNUSED from parameters.
	(OP_OFF64): Likewise.
	(OP_ESreg): Call intel_operand_size.
	(OP_DSreg): Likewise.
	(OP_DIR): Use colon rather than semicolon as separator of far
	jump/call operands.

gas/testsuite/
2005-08-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.d: Adjust.

---
/home/jbeulich/src/binutils/mainline/2005-08-23/gas/testsuite/gas/i386/intelok.d	2005-05-24
10:55:14.000000000 +0200
+++ 2005-08-23/gas/testsuite/gas/i386/intelok.d	2005-08-24
08:57:12.000000000 +0200
@@ -126,7 +126,7 @@ Disassembly of section .text:
 [ 	]*[0-9a-f]+:	8b 00[ 	]+mov[ 	]+eax,(DWORD PTR )?\[eax\]
 [ 	]*[0-9a-f]+:	8b 04 08[ 	]+mov[ 	]+eax,(DWORD PTR
)?\[eax\+ecx\]
 [ 	]*[0-9a-f]+:	8b 04 08[ 	]+mov[ 	]+eax,(DWORD PTR
)?\[eax\+ecx\]
-[ 	]*[0-9a-f]+:	26 8b 00[ 	]+mov[ 	]+eax,es:(DWORD PTR
)?\[eax\]
+[ 	]*[0-9a-f]+:	26 8b 00[ 	]+mov[ 	]+eax,(DWORD PTR
)?es:\[eax\]
 [ 	]*[0-9a-f]+:	6a 01[ 	]+push[ 	]+0x1
 [ 	]*[0-9a-f]+:	6a ff[ 	]+push[ 	]+0xffffffff
 [ 	]*[0-9a-f]+:	6a fe[ 	]+push[ 	]+0xfffffffe
---
/home/jbeulich/src/binutils/mainline/2005-08-23/opcodes/i386-dis.c	2005-07-26
08:27:16.000000000 +0200
+++ 2005-08-23/opcodes/i386-dis.c	2005-08-24 12:26:17.590948792
+0200
@@ -3123,6 +3134,67 @@ print_operand_value (char *buf, int hex,
 }
 
 static void
+intel_operand_size (int bytemode, int sizeflag)
+{
+  switch (bytemode)
+    {
+    case b_mode:
+      oappend ("BYTE PTR ");
+      break;
+    case w_mode:
+    case dqw_mode:
+      oappend ("WORD PTR ");
+      break;
+    case branch_v_mode:
+      if (mode_64bit && (sizeflag & DFLAG))
+	{
+	  oappend ("QWORD PTR ");
+	  used_prefixes |= (prefixes & PREFIX_DATA);
+	  break;
+	}
+      /* FALLTHRU */
+    case v_mode:
+    case dq_mode:
+      USED_REX (REX_MODE64);
+      if (rex & REX_MODE64)
+	oappend ("QWORD PTR ");
+      else if ((sizeflag & DFLAG) || bytemode == dq_mode)
+	oappend ("DWORD PTR ");
+      else
+	oappend ("WORD PTR ");
+      used_prefixes |= (prefixes & PREFIX_DATA);
+      break;
+    case d_mode:
+      oappend ("DWORD PTR ");
+      break;
+    case q_mode:
+      oappend ("QWORD PTR ");
+      break;
+    case m_mode:
+      if (mode_64bit)
+	oappend ("QWORD PTR ");
+      else
+	oappend ("DWORD PTR ");
+      break;
+    case f_mode:
+      if (sizeflag & DFLAG)
+	oappend ("FWORD PTR ");
+      else
+	oappend ("DWORD PTR ");
+      used_prefixes |= (prefixes & PREFIX_DATA);
+      break;
+    case t_mode:
+      oappend ("TBYTE PTR ");
+      break;
+    case x_mode:
+      oappend ("XMMWORD PTR ");
+      break;
+    default:
+      break;
+    }
+}
+
+static void
 OP_E (int bytemode, int sizeflag)
 {
   bfd_vma disp;
@@ -3196,6 +3265,8 @@ OP_E (int bytemode, int sizeflag)
     }
 
   disp = 0;
+  if (intel_syntax)
+    intel_operand_size (bytemode, sizeflag);
   append_seg ();
 
   if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
@@ -3262,60 +3333,6 @@ OP_E (int bytemode, int sizeflag)
 
       if (havebase || (havesib && (index != 4 || scale != 0)))
 	{
-	  if (intel_syntax)
-	    {
-	      switch (bytemode)
-		{
-		case b_mode:
-		  oappend ("BYTE PTR ");
-		  break;
-		case w_mode:
-		case dqw_mode:
-		  oappend ("WORD PTR ");
-		  break;
-		case branch_v_mode:
-		case v_mode:
-		case dq_mode:
-		  USED_REX (REX_MODE64);
-		  if (rex & REX_MODE64)
-		    oappend ("QWORD PTR ");
-		  else if ((sizeflag & DFLAG) || bytemode == dq_mode)
-		    oappend ("DWORD PTR ");
-		  else
-		    oappend ("WORD PTR ");
-		  used_prefixes |= (prefixes & PREFIX_DATA);
-		  break;
-		case d_mode:
-		  oappend ("DWORD PTR ");
-		  break;
-		case q_mode:
-		  oappend ("QWORD PTR ");
-		  break;
-		case m_mode:
-		  if (mode_64bit)
-		    oappend ("QWORD PTR ");
-		  else
-		    oappend ("DWORD PTR ");
-		  break;
-		case f_mode:
-		  if (sizeflag & DFLAG)
-		    {
-		      used_prefixes |= (prefixes & PREFIX_DATA);
-		      oappend ("FWORD PTR ");
-		    }
-		  else
-		    oappend ("DWORD PTR ");
-		  break;
-		case t_mode:
-		  oappend ("TBYTE PTR ");
-		  break;
-		case x_mode:
-		  oappend ("XMMWORD PTR ");
-		  break;
-		default:
-		  break;
-		}
-	    }
 	  *obufp++ = open_char;
 	  if (intel_syntax && riprel)
 	    oappend ("rip + ");
@@ -3908,17 +3925,19 @@ OP_DIR (int dummy ATTRIBUTE_UNUSED, int 
     }
   used_prefixes |= (prefixes & PREFIX_DATA);
   if (intel_syntax)
-    sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
+    sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
   else
     sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
   oappend (scratchbuf);
 }
 
 static void
-OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
+OP_OFF (int bytemode, int sizeflag)
 {
   bfd_vma off;
 
+  if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+    intel_operand_size (bytemode, sizeflag);
   append_seg ();
 
   if ((sizeflag & AFLAG) || mode_64bit)
@@ -3940,7 +3959,7 @@ OP_OFF (int bytemode ATTRIBUTE_UNUSED, i
 }
 
 static void
-OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag
ATTRIBUTE_UNUSED)
+OP_OFF64 (int bytemode, int sizeflag)
 {
   bfd_vma off;
 
@@ -3950,6 +3969,8 @@ OP_OFF64 (int bytemode ATTRIBUTE_UNUSED,
       return;
     }
 
+  if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+    intel_operand_size (bytemode, sizeflag);
   append_seg ();
 
   off = get64 ();
@@ -3994,22 +4015,7 @@ static void
 OP_ESreg (int code, int sizeflag)
 {
   if (intel_syntax)
-    {
-      if (codep[-1] & 1)
-	{
-	  USED_REX (REX_MODE64);
-	  used_prefixes |= (prefixes & PREFIX_DATA);
-	  if (rex & REX_MODE64)
-	    oappend ("QWORD PTR ");
-	  else if ((sizeflag & DFLAG))
-	    oappend ("DWORD PTR ");
-	  else
-	    oappend ("WORD PTR ");
-	}
-      else
-	oappend ("BYTE PTR ");
-    }
-
+    intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
   oappend ("%es:" + intel_syntax);
   ptr_reg (code, sizeflag);
 }
@@ -4018,22 +4024,10 @@ static void
 OP_DSreg (int code, int sizeflag)
 {
   if (intel_syntax)
-    {
-      if (codep[-1] != 0xd7 && (codep[-1] & 1))
-	{
-	  USED_REX (REX_MODE64);
-	  used_prefixes |= (prefixes & PREFIX_DATA);
-	  if (rex & REX_MODE64)
-	    oappend ("QWORD PTR ");
-	  else if ((sizeflag & DFLAG))
-	    oappend ("DWORD PTR ");
-	  else
-	    oappend ("WORD PTR ");
-	}
-      else
-	oappend ("BYTE PTR ");
-    }
-
+    intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
+			? v_mode
+			: b_mode,
+			sizeflag);
   if ((prefixes
        & (PREFIX_CS
 	  | PREFIX_DS

Attachment: binutils-mainline-x86-intel-disasm.patch
Description: Binary data


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