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Hello, Here is a patch to add coff-z80 support to bfd. Arnold Metselaar ChangeLog: * Makefile.am: Add rules for coff-z80 and cpu-z80. * Makefile.in: Regenerated. * Archures.c: Add bfd_arch_z80 and support for it. * bfd-in2.h: Regenerated. * coffcode.h(coff_set_arch_mach_hook): Add case Z80MAGIC. * coffcode.h(coff_set_flags): Add case bfd_arch_z80. * config.bfd: Add z80coff_vec. * configure.in: Add z80coff_vec. * configure: Regenerated. * libbfd.h: Regenerated. * reloc.c: Add BFD_RELOC_Z80_DISP8 * targets.c: Add z80coff_vec. * coff-z80.c: New file * cpu-z80.c: New file * ../include/coff/internal.h: Add relocation number for Z80 * ../include/coff/z80.h: New file
Index: Makefile.am =================================================================== RCS file: /cvs/src/src/bfd/Makefile.am,v retrieving revision 1.164 diff -u -p -r1.164 Makefile.am --- Makefile.am 30 Sep 2005 18:38:49 -0000 1.164 +++ Makefile.am 21 Oct 2005 14:43:50 -0000 @@ -111,6 +111,7 @@ ALL_MACHINES = \ cpu-w65.lo \ cpu-xstormy16.lo \ cpu-xtensa.lo \ + cpu-z80.lo \ cpu-z8k.lo ALL_MACHINES_CFILES = \ @@ -171,6 +172,7 @@ ALL_MACHINES_CFILES = \ cpu-w65.c \ cpu-xstormy16.c \ cpu-xtensa.c \ + cpu-z80.c \ cpu-z8k.c # The .o files needed by all of the 32 bit vectors that are configured into @@ -214,6 +216,7 @@ BFD32_BACKENDS = \ coff-u68k.lo \ coff-we32k.lo \ coff-w65.lo \ + coff-z80.lo \ coff-z8k.lo \ cofflink.lo \ dwarf1.lo \ @@ -384,6 +387,7 @@ BFD32_BACKENDS_CFILES = \ coff-u68k.c \ coff-we32k.c \ coff-w65.c \ + coff-z80.c \ coff-z8k.c \ cofflink.c \ dwarf1.c \ @@ -1086,6 +1090,8 @@ cpu-xtensa.lo: cpu-xtensa.c ./bfd.h ./co $(INCDIR)/hashtab.h cpu-z8k.lo: cpu-z8k.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ $(INCDIR)/hashtab.h +cpu-z80.lo: cpu-z80.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ + $(INCDIR)/hashtab.h aout-adobe.lo: aout-adobe.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ $(INCDIR)/hashtab.h $(INCDIR)/aout/adobe.h $(INCDIR)/aout/stab_gnu.h \ $(INCDIR)/aout/stab.def libaout.h $(INCDIR)/bfdlink.h @@ -1245,6 +1251,10 @@ coff-z8k.lo: coff-z8k.c ./bfd.h ./config $(INCDIR)/hashtab.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/z8k.h \ $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \ libcoff.h coffcode.h coffswap.h +coff-z80.lo: coff-z80.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ + $(INCDIR)/hashtab.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/z80.h \ + $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \ + libcoff.h coffcode.h coffswap.h cofflink.lo: cofflink.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ $(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h $(INCDIR)/coff/internal.h \ libcoff.h $(INCDIR)/safe-ctype.h Index: Makefile.in =================================================================== RCS file: /cvs/src/src/bfd/Makefile.in,v retrieving revision 1.180 diff -u -p -r1.180 Makefile.in --- Makefile.in 30 Sep 2005 18:38:50 -0000 1.180 +++ Makefile.in 21 Oct 2005 14:43:53 -0000 @@ -348,6 +348,7 @@ ALL_MACHINES = \ cpu-w65.lo \ cpu-xstormy16.lo \ cpu-xtensa.lo \ + cpu-z80.lo \ cpu-z8k.lo ALL_MACHINES_CFILES = \ @@ -408,6 +409,7 @@ ALL_MACHINES_CFILES = \ cpu-w65.c \ cpu-xstormy16.c \ cpu-xtensa.c \ + cpu-z80.c \ cpu-z8k.c @@ -452,6 +454,7 @@ BFD32_BACKENDS = \ coff-u68k.lo \ coff-we32k.lo \ coff-w65.lo \ + coff-z80.lo \ coff-z8k.lo \ cofflink.lo \ dwarf1.lo \ @@ -622,6 +625,7 @@ BFD32_BACKENDS_CFILES = \ coff-u68k.c \ coff-we32k.c \ coff-w65.c \ + coff-z80.c \ coff-z8k.c \ cofflink.c \ dwarf1.c \ @@ -1653,6 +1657,8 @@ cpu-xtensa.lo: cpu-xtensa.c ./bfd.h ./co $(INCDIR)/hashtab.h cpu-z8k.lo: cpu-z8k.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ $(INCDIR)/hashtab.h +cpu-z80.lo: cpu-z80.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ + $(INCDIR)/hashtab.h aout-adobe.lo: aout-adobe.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ $(INCDIR)/hashtab.h $(INCDIR)/aout/adobe.h $(INCDIR)/aout/stab_gnu.h \ $(INCDIR)/aout/stab.def libaout.h $(INCDIR)/bfdlink.h @@ -1812,6 +1818,10 @@ coff-z8k.lo: coff-z8k.c ./bfd.h ./config $(INCDIR)/hashtab.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/z8k.h \ $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \ libcoff.h coffcode.h coffswap.h +coff-z80.lo: coff-z80.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ + $(INCDIR)/hashtab.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/z80.h \ + $(INCDIR)/coff/external.h $(INCDIR)/coff/internal.h \ + libcoff.h coffcode.h coffswap.h cofflink.lo: cofflink.c ./bfd.h ./config.h $(INCDIR)/filenames.h \ $(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h $(INCDIR)/coff/internal.h \ libcoff.h $(INCDIR)/safe-ctype.h Index: archures.c =================================================================== RCS file: /cvs/src/src/bfd/archures.c,v retrieving revision 1.110 diff -u -p -r1.110 archures.c --- archures.c 30 Sep 2005 15:36:35 -0000 1.110 +++ archures.c 21 Oct 2005 14:43:55 -0000 @@ -365,6 +365,11 @@ DESCRIPTION . bfd_arch_maxq, {* Dallas MAXQ 10/20 *} .#define bfd_mach_maxq10 10 .#define bfd_mach_maxq20 20 +. bfd_arch_z80, +.#define bfd_mach_z80strict 1 {* no undocumented opcodes *} +.#define bfd_mach_z80 3 {* with ixl, ixh, iyl, and iyh *} +.#define bfd_mach_z80full 7 {* all undocumented instructions *} +.#define bfd_mach_r800 11 {* R800: successor with multiplication *} . bfd_arch_last . }; */ @@ -462,6 +467,7 @@ extern const bfd_arch_info_type bfd_w65_ extern const bfd_arch_info_type bfd_xstormy16_arch; extern const bfd_arch_info_type bfd_xtensa_arch; extern const bfd_arch_info_type bfd_z8k_arch; +extern const bfd_arch_info_type bfd_z80_arch; static const bfd_arch_info_type * const bfd_archures_list[] = { @@ -525,6 +531,7 @@ static const bfd_arch_info_type * const &bfd_xstormy16_arch, &bfd_xtensa_arch, &bfd_z8k_arch, + &bfd_z80_arch, #endif 0 }; Index: bfd-in2.h =================================================================== RCS file: /cvs/src/src/bfd/bfd-in2.h,v retrieving revision 1.368 diff -u -p -r1.368 bfd-in2.h --- bfd-in2.h 15 Oct 2005 14:57:54 -0000 1.368 +++ bfd-in2.h 21 Oct 2005 14:44:01 -0000 @@ -1953,6 +1953,11 @@ enum bfd_architecture bfd_arch_maxq, /* Dallas MAXQ 10/20 */ #define bfd_mach_maxq10 10 #define bfd_mach_maxq20 20 + bfd_arch_z80, +#define bfd_mach_z80strict 1 /* no undocumented opcodes */ +#define bfd_mach_z80 3 /* with ixl, ixh, iyl, and iyh */ +#define bfd_mach_z80full 7 /* all undocumented instructions */ +#define bfd_mach_r800 11 /* R800: successor with multiplication */ bfd_arch_last }; @@ -4058,6 +4063,9 @@ internally by the linker after analysis BFD_RELOC_XTENSA_ASM_EXPAND. */ BFD_RELOC_XTENSA_ASM_SIMPLIFY, +/* 8 bit signed offset in (ix+d) or (iy+d). */ + BFD_RELOC_Z80_DISP8, + /* DJNZ offset. */ BFD_RELOC_Z8K_DISP7, Index: coffcode.h =================================================================== RCS file: /cvs/src/src/bfd/coffcode.h,v retrieving revision 1.129 diff -u -p -r1.129 coffcode.h --- coffcode.h 18 Aug 2005 03:48:26 -0000 1.129 +++ coffcode.h 21 Oct 2005 14:44:07 -0000 @@ -1971,6 +1971,23 @@ coff_set_arch_mach_hook (bfd *abfd, void } break; #endif +#ifdef Z80MAGIC + case Z80MAGIC: + arch = bfd_arch_z80; + switch (internal_f->f_flags & F_MACHMASK) + { + case 0: + case bfd_mach_z80strict << 12: + case bfd_mach_z80 << 12: + case bfd_mach_z80full << 12: + case bfd_mach_r800 << 12: + machine = ((unsigned)internal_f->f_flags & F_MACHMASK) >> 12; + break; + default: + return FALSE; + } + break; +#endif #ifdef I860 case I860MAGIC: arch = bfd_arch_i860; @@ -2567,6 +2584,23 @@ coff_set_flags (bfd * abfd, } return TRUE; #endif +#ifdef Z80MAGIC + case bfd_arch_z80: + *magicp = Z80MAGIC; + switch (bfd_get_mach (abfd)) + { + case 0: + case bfd_mach_z80strict: + case bfd_mach_z80: + case bfd_mach_z80full: + case bfd_mach_r800: + *flagsp = bfd_get_mach (abfd) << 12; + break; + default: + return FALSE; + } + return TRUE; +#endif #ifdef I960ROMAGIC case bfd_arch_i960: Index: config.bfd =================================================================== RCS file: /cvs/src/src/bfd/config.bfd,v retrieving revision 1.198 diff -u -p -r1.198 config.bfd --- config.bfd 30 Sep 2005 15:36:37 -0000 1.198 +++ config.bfd 21 Oct 2005 14:44:09 -0000 @@ -102,6 +102,7 @@ x86_64) targ_archs=bfd_i386_arch ;; xscale*) targ_archs=bfd_arm_arch ;; xtensa*) targ_archs=bfd_xtensa_arch ;; z8k*) targ_archs=bfd_z8k_arch ;; +z80|r800) targ_archs=bfd_z80_arch ;; am33_2.0) targ_archs=bfd_mn10300_arch ;; *) targ_archs=bfd_${targ_cpu}_arch ;; esac @@ -1371,6 +1372,11 @@ case "${targ}" in targ_underscore=yes ;; + z80-*-*) + targ_defvec=z80coff_vec + targ_underscore=no + ;; + *-*-ieee*) targ_defvec=ieee_vec ;; Index: configure =================================================================== RCS file: /cvs/src/src/bfd/configure,v retrieving revision 1.223 diff -u -p -r1.223 configure --- configure 30 Sep 2005 15:36:38 -0000 1.223 +++ configure 21 Oct 2005 14:44:26 -0000 @@ -13190,6 +13190,7 @@ do vms_vax_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo" ;; w65_vec) tb="$tb coff-w65.lo reloc16.lo" ;; we32kcoff_vec) tb="$tb coff-we32k.lo" ;; + z80coff_vec) tb="$tb coff-z80.lo reloc16.lo" ;; z8kcoff_vec) tb="$tb coff-z8k.lo reloc16.lo cofflink.lo" ;; # These appear out of order in targets.c Index: configure.in =================================================================== RCS file: /cvs/src/src/bfd/configure.in,v retrieving revision 1.195 diff -u -p -r1.195 configure.in --- configure.in 30 Sep 2005 15:36:40 -0000 1.195 +++ configure.in 21 Oct 2005 14:44:28 -0000 @@ -811,6 +811,7 @@ do vms_vax_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo" ;; w65_vec) tb="$tb coff-w65.lo reloc16.lo" ;; we32kcoff_vec) tb="$tb coff-we32k.lo" ;; + z80coff_vec) tb="$tb coff-z80.lo reloc16.lo" ;; z8kcoff_vec) tb="$tb coff-z8k.lo reloc16.lo cofflink.lo" ;; # These appear out of order in targets.c Index: libbfd.h =================================================================== RCS file: /cvs/src/src/bfd/libbfd.h,v retrieving revision 1.159 diff -u -p -r1.159 libbfd.h --- libbfd.h 15 Oct 2005 14:57:55 -0000 1.159 +++ libbfd.h 21 Oct 2005 14:44:30 -0000 @@ -1827,6 +1827,7 @@ static const char *const bfd_reloc_code_ "BFD_RELOC_XTENSA_OP2", "BFD_RELOC_XTENSA_ASM_EXPAND", "BFD_RELOC_XTENSA_ASM_SIMPLIFY", + "BFD_RELOC_Z80_DISP8", "BFD_RELOC_Z8K_DISP7", "BFD_RELOC_Z8K_CALLR", "BFD_RELOC_Z8K_IMM4L", Index: reloc.c =================================================================== RCS file: /cvs/src/src/bfd/reloc.c,v retrieving revision 1.140 diff -u -p -r1.140 reloc.c --- reloc.c 5 Oct 2005 21:24:23 -0000 1.140 +++ reloc.c 21 Oct 2005 14:44:35 -0000 @@ -4573,6 +4573,10 @@ ENUMDOC assembler-expanded instructions. This is commonly used internally by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND. +ENUM + BFD_RELOC_Z80_DISP8 +ENUMDOC + 8 bit signed offset in (ix+d) or (iy+d). ENUM BFD_RELOC_Z8K_DISP7 Index: targets.c =================================================================== RCS file: /cvs/src/src/bfd/targets.c,v retrieving revision 1.137 diff -u -p -r1.137 targets.c --- targets.c 15 Oct 2005 14:57:55 -0000 1.137 +++ targets.c 21 Oct 2005 14:44:36 -0000 @@ -775,6 +775,7 @@ extern const bfd_target vms_alpha_vec; extern const bfd_target vms_vax_vec; extern const bfd_target w65_vec; extern const bfd_target we32kcoff_vec; +extern const bfd_target z80coff_vec; extern const bfd_target z8kcoff_vec; /* These are always included. */ @@ -1127,6 +1128,7 @@ static const bfd_target * const _bfd_tar &vms_vax_vec, &w65_vec, &we32kcoff_vec, + &z80coff_vec, &z8kcoff_vec, &bfd_elf32_am33lin_vec, #endif /* not SELECT_VECS */
Attachment:
addz80.bfd.tgz
Description: application/tgz
Index: coff/internal.h =================================================================== RCS file: /cvs/src/src/include/coff/internal.h,v retrieving revision 1.16 diff -u -p -r1.16 internal.h --- coff/internal.h 10 May 2005 10:21:09 -0000 1.16 +++ coff/internal.h 21 Oct 2005 15:52:30 -0000 @@ -714,6 +714,9 @@ struct internal_reloc #define R_SEG 0x10 /* set if in segmented mode */ #define R_IMM4H 0x24 /* high nibble */ #define R_DISP7 0x25 /* djnz displacement */ +/* Z80 modes */ +#define R_OFF8 0x32 /* 8 bit signed abs, for (i[xy]+d) */ +/* R_JR, R_IMM8, R_IMM16, R_IMM32 - as for Z8k */ /* H8500 modes */
/* coff information for Zilog Z80 Copyright 2005 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define L_LNNO_SIZE 4 #include "coff/external.h" /* z80 backend does not use dots in section names */ #undef _TEXT #define _TEXT "text" #undef _DATA #define _DATA "data" #undef _BSS #define _BSS "bss" /* Type of cpu is stored in flags */ #define F_MACHMASK 0xF000 #define Z80MAGIC 0x805A #define Z80BADMAG(x) (((x).f_magic != Z80MAGIC)) /********************** RELOCATION DIRECTIVES **********************/ /* this format actually has more bits than we need */ struct external_reloc { char r_vaddr[4]; char r_symndx[4]; char r_offset[4]; char r_type[2]; char r_stuff[2]; }; #define RELOC struct external_reloc #define RELSZ 16
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