New port to Cell SPU

[Alan Modra <amodra at bigpond dot net dot au>]

This implements binutils support for the Sony/Toshiba/IBM Synergistic
Processor Unit.  One feature of this port is a built-in linker overlay
manager:  The linker will automatically insert call stubs and provide
the run-time management code on detecting overlays.  I decided to embed
the overlay manager code in the linker executable to avoid installation,
distribution and versioning problems with a separate .o file, but this
approach does cause some difficulty in the build process.  Initially,
the overlay manager code was just a commented array of machine opcodes
in elf32-spu.c, but someone raised the point that this didn't really
comply with the spirit of the GNU project in distributing source code.
ie. It wasn't convenient to modify.  You had to assemble spu_ovl.S,
objdump, and edit elf32-spu.c without introducing typos or relocating
the wrong addresses.  So now we embed a complete object file into the
SPU linker, and "open" it using a little BFD magic.  The only problem
is that unless you are building spu-gas, you can't actually create
the object file during a binutils build.  People using --enable-targets
need a pre-assembled spu_ovl.o if they select spu, so we need to
distribute spu_ovl.o with binutils or make builing --enable-targets=all
a two-step process with a --target=spu build being done first.  I chose
the simpler option of putting the file into CVS, and rebuild only
for --enable-maintainer mode.

bfd/
	* cpu-spu.c: New file.
	* elf32-spu.c: New file.
	* elf32-spu.h: New file.
	* archures.c: Add SPU support.
	* config.bfd: Likewise.
	* configure.in: Likewise.
	* reloc.c: Likewise.
	* targets.c: Likewise.
	* Makefile.am: Likewise.  Run "make dep-am".
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.

binutils/
	* readelf.c: Add SPU support.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

gas/
	* config/tc-spu.c: New file.
	* config/tc-spu.h: New file.
	* configure.tgt: Add SPU support.
	* Makefile.am: Likewise.  Run "make dep-am".
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.

include/
	* dis-asm.h (print_insn_spu): Declare.
include/elf/
	* common.h (EM_SPU): Define.
	* spu.h: New file.
include/opcode/
	* spu-insns.h: New file.
	* spu.h: New file.

ld/
	* emulparams/elf32_spu.sh: New file.
	* emultempl/spu_inc.s: New file.
	* emultempl/spu_ovl.S: New file.
	* emultempl/spu_ovl.o: New file.
	* emultempl/spuelf.em: New file.
	* Makefile.am: Add SPU support.
	* configure.tgt: Likewise.
	* ldlang.c (load_symbols): Make global.
	* ldlang.h (load_symbols): Declare.
	* scripttempl/elf.sc (OTHER_BSS_SECTIONS): Add.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-spu/ovl.d: New file.
	* ld-spu/ovl.lnk: New file.
	* ld-spu/ovl.s: New file.
	* ld-spu/spu.exp: New file.
	* ld-elf/sec64k.exp: Tweak ld options for SPU.
	* ld-scripts/empty-orphan.exp: Likewise.
	* ld-scripts/phdrs.exp: Likewise.
	* ld-scripts/phdrs2.exp: Likewise.

opcodes/
	* spu-dis.c: New file.
	* spu-opc.c: New file.
	* configure.in: Add SPU support.
	* disassemble.c: Likewise.
	* Makefile.am: Likewise.  Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.

-- 
Alan Modra
IBM OzLabs - Linux Technology Centre

Index: bfd/Makefile.am
===================================================================
RCS file: /cvs/src/src/bfd/Makefile.am,v
retrieving revision 1.182
diff -u -p -r1.182 Makefile.am
--- bfd/Makefile.am	20 Sep 2006 11:35:07 -0000	1.182
+++ bfd/Makefile.am	24 Oct 2006 23:55:48 -0000
@@ -106,6 +106,7 @@ ALL_MACHINES = \
 	cpu-score.lo \
 	cpu-sh.lo \
 	cpu-sparc.lo \
+	cpu-spu.lo \
 	cpu-tic30.lo \
 	cpu-tic4x.lo \
 	cpu-tic54x.lo \
@@ -169,6 +170,7 @@ ALL_MACHINES_CFILES = \
 	cpu-score.c \
 	cpu-sh.c \
 	cpu-sparc.c \
+	cpu-spu.c \
 	cpu-tic30.c \
 	cpu-tic4x.c \
 	cpu-tic54x.c \
@@ -280,6 +282,7 @@ BFD32_BACKENDS = \
 	elf32-sh64-com.lo \
 	elfxx-sparc.lo \
 	elf32-sparc.lo \
+	elf32-spu.lo \
 	elf32-v850.lo \
 	elf32-vax.lo \
 	elf32-xstormy16.lo \
@@ -455,6 +458,7 @@ BFD32_BACKENDS_CFILES = \
 	elf32-sh-symbian.c \
 	elfxx-sparc.c \
 	elf32-sparc.c \
+	elf32-spu.c \
 	elf32-v850.c \
 	elf32-vax.c \
 	elf32-xstormy16.c \
@@ -1074,11 +1078,12 @@ cpu-pj.lo: cpu-pj.c $(INCDIR)/filenames.
 cpu-powerpc.lo: cpu-powerpc.c $(INCDIR)/filenames.h \
   $(INCDIR)/hashtab.h
 cpu-rs6000.lo: cpu-rs6000.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
-cpu-score.lo: cpu-score.c $(INCDIR)/filenames.h
 cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-score.lo: cpu-score.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
   $(srcdir)/../opcodes/sh-opc.h
 cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
+cpu-spu.lo: cpu-spu.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
 cpu-tic54x.lo: cpu-tic54x.c $(INCDIR)/filenames.h $(INCDIR)/hashtab.h
@@ -1453,14 +1458,15 @@ elf32-sh64-com.lo: elf32-sh64-com.c $(IN
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
   $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h elf32-sh64.h \
   $(srcdir)/../opcodes/sh64-opc.h
-elf32-score.lo: elf32-score.c $(INCDIR)/filenames.h \
-  elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
-  $(INCDIR)/elf/external.h $(INCDIR)/elf/score.h \
-  $(INCDIR)/elf/reloc-macros.h elf32-target.h
 elf32-s390.lo: elf32-s390.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
   $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/s390.h \
   $(INCDIR)/elf/reloc-macros.h elf32-target.h
+elf32-score.lo: elf32-score.c $(INCDIR)/filenames.h \
+  $(INCDIR)/hashtab.h $(INCDIR)/libiberty.h elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h \
+  elf32-target.h
 elf32-sh.lo: elf32-sh.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
   $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elf-vxworks.h \
@@ -1482,6 +1488,10 @@ elf32-sparc.lo: elf32-sparc.c $(INCDIR)/
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
   $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/sparc.h \
   elfxx-sparc.h elf-vxworks.h elf32-target.h
+elf32-spu.lo: elf32-spu.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
+  $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
+  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/spu.h \
+  $(INCDIR)/elf/reloc-macros.h elf32-spu.h elf32-target.h
 elf32-v850.lo: elf32-v850.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
   $(INCDIR)/hashtab.h elf-bfd.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/v850.h \
@@ -1845,6 +1855,21 @@ nlm32-alpha.lo: nlm32-alpha.c $(INCDIR)/
 nlm64.lo: nlm64.c nlmcode.h $(INCDIR)/filenames.h $(INCDIR)/hashtab.h \
   libnlm.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
   $(INCDIR)/nlm/external.h
+coff-x86_64.lo: coff-x86_64.c $(INCDIR)/filenames.h \
+  $(INCDIR)/hashtab.h $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/pe.h libcoff.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h coffcode.h \
+  coffswap.h
+pe-x86_64.lo: pe-x86_64.c $(INCDIR)/filenames.h coff-x86_64.c \
+  $(INCDIR)/hashtab.h $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/pe.h libcoff.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h coffcode.h \
+  peicode.h libpei.h
+pei-x86_64.lo: pei-x86_64.c $(INCDIR)/filenames.h coff-x86_64.c \
+  $(INCDIR)/hashtab.h $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/pe.h libcoff.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/libiberty.h coffcode.h \
+  peicode.h libpei.h
 aix386-core.lo: aix386-core.c $(INCDIR)/filenames.h \
   $(INCDIR)/hashtab.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \
   $(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.119
diff -u -p -r1.119 archures.c
--- bfd/archures.c	26 Sep 2006 12:04:43 -0000	1.119
+++ bfd/archures.c	24 Oct 2006 23:52:19 -0000
@@ -136,6 +136,8 @@ DESCRIPTION
 .{* Nonzero if MACH is a 64 bit sparc architecture.  *}
 .#define bfd_mach_sparc_64bit_p(mach) \
 .  ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+.  bfd_arch_spu,       {* PowerPC SPU *}
+.#define bfd_mach_spu		256 
 .  bfd_arch_mips,      {* MIPS Rxxxx *}
 .#define bfd_mach_mips3000		3000
 .#define bfd_mach_mips3900		3900
@@ -471,6 +473,7 @@ extern const bfd_arch_info_type bfd_s390
 extern const bfd_arch_info_type bfd_score_arch;
 extern const bfd_arch_info_type bfd_sh_arch;
 extern const bfd_arch_info_type bfd_sparc_arch;
+extern const bfd_arch_info_type bfd_spu_arch;
 extern const bfd_arch_info_type bfd_tic30_arch;
 extern const bfd_arch_info_type bfd_tic4x_arch;
 extern const bfd_arch_info_type bfd_tic54x_arch;
@@ -537,6 +540,7 @@ static const bfd_arch_info_type * const 
     &bfd_score_arch,
     &bfd_sh_arch,
     &bfd_sparc_arch,
+    &bfd_spu_arch,
     &bfd_tic30_arch,
     &bfd_tic4x_arch,
     &bfd_tic54x_arch,
Index: bfd/config.bfd
===================================================================
RCS file: /cvs/src/src/bfd/config.bfd,v
retrieving revision 1.216
diff -u -p -r1.216 config.bfd
--- bfd/config.bfd	18 Oct 2006 23:58:51 -0000	1.216
+++ bfd/config.bfd	24 Oct 2006 23:52:23 -0000
@@ -95,6 +95,7 @@ rs6000)		 targ_archs="bfd_rs6000_arch bf
 s390*)		 targ_archs=bfd_s390_arch ;;
 sh*)		 targ_archs=bfd_sh_arch ;;
 sparc*)		 targ_archs=bfd_sparc_arch ;;
+spu*)            targ_archs=bfd_spu_arch ;;
 strongarm*)	 targ_archs=bfd_arm_arch ;;
 thumb*)		 targ_archs=bfd_arm_arch ;;
 v850*)		 targ_archs=bfd_v850_arch ;;
@@ -1382,6 +1383,11 @@ case "${targ}" in
     targ_underscore=yes
     ;;
 
+  spu-*-elf)
+    targ_defvec=bfd_elf32_spu_vec
+    targ_selvecs="bfd_elf32_powerpc_vec bfd_elf64_powerpc_vec"
+    ;;
+
 #if HAVE_host_aout_vec
   tahoe-*-*)
     targ_defvec=host_aout_vec
Index: bfd/configure.in
===================================================================
RCS file: /cvs/src/src/bfd/configure.in,v
retrieving revision 1.215
diff -u -p -r1.215 configure.in
--- bfd/configure.in	18 Oct 2006 23:58:51 -0000	1.215
+++ bfd/configure.in	24 Oct 2006 23:52:29 -0000
@@ -685,6 +685,7 @@ do
     bfd_elf32_shvxworks_vec)	tb="$tb elf32-sh.lo elf-vxworks.lo elf32.lo $elf coff-sh.lo" ;;
     bfd_elf32_sparc_vec)	tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
     bfd_elf32_sparc_vxworks_vec) tb="$tb elf32-sparc.lo elfxx-sparc.lo elf-vxworks.lo elf32.lo $elf" ;;
+    bfd_elf32_spu_vec)		tb="$tb elf32-spu.lo elf32.lo $elf" ;;
     bfd_elf32_tradbigmips_vec)  tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
     bfd_elf32_tradlittlemips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo" ;;
     bfd_elf32_us_cris_vec)	tb="$tb elf32-cris.lo elf32.lo $elf" ;;
Index: bfd/cpu-spu.c
===================================================================
RCS file: bfd/cpu-spu.c
diff -N bfd/cpu-spu.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ bfd/cpu-spu.c	24 Oct 2006 23:52:29 -0000
@@ -0,0 +1,54 @@
+/* Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+
+static const bfd_arch_info_type *
+spu_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
+{
+  BFD_ASSERT (a->arch == bfd_arch_spu);
+  switch (b->arch)
+    {
+    default:
+      return NULL;
+    case bfd_arch_spu:
+      return bfd_default_compatible (a, b);
+    }
+  /*NOTREACHED*/
+}
+
+const bfd_arch_info_type bfd_spu_arch[] =
+{
+  {
+    32,	/* 32 bits in a word */
+    32,	/* 32 bits in an address */
+    8,	/* 8 bits in a byte */
+    bfd_arch_spu,	/* architecture */
+    bfd_mach_spu,	/* machine */
+    "spu",		/* architecture name */
+    "spu:256K",		/* printable name */
+    3,			/* aligned power */
+    TRUE, 		/* the default machine for the architecture */
+    spu_compatible,	/* the spu is only compatible with itself, see above */
+    bfd_default_scan,
+    0,			/* next -- there are none! */
+  }
+};
Index: bfd/elf32-spu.c
===================================================================
RCS file: bfd/elf32-spu.c
diff -N bfd/elf32-spu.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ bfd/elf32-spu.c	24 Oct 2006 23:52:31 -0000
@@ -0,0 +1,1749 @@
+/* SPU specific support for 32-bit ELF
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "bfdlink.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/spu.h"
+#include "elf32-spu.h"
+
+/* We use RELA style relocs.  Don't define USE_REL.  */
+
+static bfd_reloc_status_type spu_elf_rel9 (bfd *, arelent *, asymbol *,
+					   void *, asection *,
+					   bfd *, char **);
+
+/* Values of type 'enum elf_spu_reloc_type' are used to index this
+   array, so it must be declared in the order of that type.  */
+
+static reloc_howto_type elf_howto_table[] = {
+  HOWTO (R_SPU_NONE,       0, 0,  0, FALSE,  0, complain_overflow_dont,
+	 bfd_elf_generic_reloc, "SPU_NONE",
+	 FALSE, 0, 0x00000000, FALSE),
+  HOWTO (R_SPU_ADDR10,     4, 2, 10, FALSE, 14, complain_overflow_bitfield,
+	 bfd_elf_generic_reloc, "SPU_ADDR10",
+	 FALSE, 0, 0x00ffc000, FALSE),
+  HOWTO (R_SPU_ADDR16,     2, 2, 16, FALSE,  7, complain_overflow_bitfield,
+	 bfd_elf_generic_reloc, "SPU_ADDR16",
+	 FALSE, 0, 0x007fff80, FALSE),
+  HOWTO (R_SPU_ADDR16_HI, 16, 2, 16, FALSE,  7, complain_overflow_bitfield,
+	 bfd_elf_generic_reloc, "SPU_ADDR16_HI",
+	 FALSE, 0, 0x007fff80, FALSE),
+  HOWTO (R_SPU_ADDR16_LO,  0, 2, 16, FALSE,  7, complain_overflow_dont,
+	 bfd_elf_generic_reloc, "SPU_ADDR16_LO",
+	 FALSE, 0, 0x007fff80, FALSE),
+  HOWTO (R_SPU_ADDR18,     0, 2, 18, FALSE,  7, complain_overflow_bitfield,
+	 bfd_elf_generic_reloc, "SPU_ADDR18",
+	 FALSE, 0, 0x01ffff80, FALSE),
+  HOWTO (R_SPU_ADDR32,   0, 2, 32, FALSE,  0, complain_overflow_dont,
+	 bfd_elf_generic_reloc, "SPU_ADDR32",
+	 FALSE, 0, 0xffffffff, FALSE),
+  HOWTO (R_SPU_REL16,      2, 2, 16,  TRUE,  7, complain_overflow_bitfield,
+	 bfd_elf_generic_reloc, "SPU_REL16",
+	 FALSE, 0, 0x007fff80, TRUE),
+  HOWTO (R_SPU_ADDR7,      0, 2,  7, FALSE, 14, complain_overflow_dont,
+	 bfd_elf_generic_reloc, "SPU_ADDR7",
+	 FALSE, 0, 0x001fc000, FALSE),
+  HOWTO (R_SPU_REL9,       2, 2,  9,  TRUE,  0, complain_overflow_signed,
+	 spu_elf_rel9,          "SPU_REL9",
+	 FALSE, 0, 0x0180007f, TRUE),
+  HOWTO (R_SPU_REL9I,      2, 2,  9,  TRUE,  0, complain_overflow_signed,
+	 spu_elf_rel9,          "SPU_REL9I",
+	 FALSE, 0, 0x0000c07f, TRUE),
+  HOWTO (R_SPU_ADDR10I,    0, 2, 10, FALSE, 14, complain_overflow_signed,
+	 bfd_elf_generic_reloc, "SPU_ADDR10I",
+	 FALSE, 0, 0x00ffc000, FALSE),
+  HOWTO (R_SPU_ADDR16I,    0, 2, 16, FALSE,  7, complain_overflow_signed,
+	 bfd_elf_generic_reloc, "SPU_ADDR16I",
+	 FALSE, 0, 0x007fff80, FALSE),
+  HOWTO (R_SPU_REL32,   0, 2, 32, TRUE,  0, complain_overflow_dont,
+	 bfd_elf_generic_reloc, "SPU_REL32",
+	 FALSE, 0, 0xffffffff, TRUE),
+};
+
+static struct bfd_elf_special_section const spu_elf_special_sections[] = {
+  { ".toe", 4, 0, SHT_NOBITS, SHF_ALLOC },
+  { NULL, 0, 0, 0, 0 }
+};
+
+static enum elf_spu_reloc_type
+spu_elf_bfd_to_reloc_type (bfd_reloc_code_real_type code)
+{
+  switch (code)
+    {
+    default:
+      return R_SPU_NONE;
+    case BFD_RELOC_SPU_IMM10W:
+      return R_SPU_ADDR10;
+    case BFD_RELOC_SPU_IMM16W:
+      return R_SPU_ADDR16;
+    case BFD_RELOC_SPU_LO16:
+      return R_SPU_ADDR16_LO;
+    case BFD_RELOC_SPU_HI16:
+      return R_SPU_ADDR16_HI;
+    case BFD_RELOC_SPU_IMM18:
+      return R_SPU_ADDR18;
+    case BFD_RELOC_SPU_PCREL16:
+      return R_SPU_REL16;
+    case BFD_RELOC_SPU_IMM7:
+      return R_SPU_ADDR7;
+    case BFD_RELOC_SPU_IMM8:
+      return R_SPU_NONE;
+    case BFD_RELOC_SPU_PCREL9a:
+      return R_SPU_REL9;
+    case BFD_RELOC_SPU_PCREL9b:
+      return R_SPU_REL9I;
+    case BFD_RELOC_SPU_IMM10:
+      return R_SPU_ADDR10I;
+    case BFD_RELOC_SPU_IMM16:
+      return R_SPU_ADDR16I;
+    case BFD_RELOC_32:
+      return R_SPU_ADDR32;
+    case BFD_RELOC_32_PCREL:
+      return R_SPU_REL32;
+    }
+}
+
+static void
+spu_elf_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
+		       arelent *cache_ptr,
+		       Elf_Internal_Rela *dst)
+{
+  enum elf_spu_reloc_type r_type;
+
+  r_type = (enum elf_spu_reloc_type) ELF32_R_TYPE (dst->r_info);
+  BFD_ASSERT (r_type < R_SPU_max);
+  cache_ptr->howto = &elf_howto_table[(int) r_type];
+}
+
+static reloc_howto_type *
+spu_elf_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+			   bfd_reloc_code_real_type code)
+{
+  return elf_howto_table + spu_elf_bfd_to_reloc_type (code);
+}
+
+/* Apply R_SPU_REL9 and R_SPU_REL9I relocs.  */
+
+static bfd_reloc_status_type
+spu_elf_rel9 (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
+	      void *data, asection *input_section,
+	      bfd *output_bfd, char **error_message)
+{
+  bfd_size_type octets;
+  bfd_vma val;
+  long insn;
+
+  /* If this is a relocatable link (output_bfd test tells us), just
+     call the generic function.  Any adjustment will be done at final
+     link time.  */
+  if (output_bfd != NULL)
+    return bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data,
+				  input_section, output_bfd, error_message);
+
+  if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
+    return bfd_reloc_outofrange;
+  octets = reloc_entry->address * bfd_octets_per_byte (abfd);
+
+  /* Get symbol value.  */
+  val = 0;
+  if (!bfd_is_com_section (symbol->section))
+    val = symbol->value;
+  if (symbol->section->output_section)
+    val += symbol->section->output_section->vma;
+
+  val += reloc_entry->addend;
+
+  /* Make it pc-relative.  */
+  val -= input_section->output_section->vma + input_section->output_offset;
+
+  val >>= 2;
+  if (val + 256 >= 512)
+    return bfd_reloc_overflow;
+
+  insn = bfd_get_32 (abfd, (bfd_byte *) data + octets);
+
+  /* Move two high bits of value to REL9I and REL9 position.
+     The mask will take care of selecting the right field.  */
+  val = (val & 0x7f) | ((val & 0x180) << 7) | ((val & 0x180) << 16);
+  insn &= ~reloc_entry->howto->dst_mask;
+  insn |= val & reloc_entry->howto->dst_mask;
+  bfd_put_32 (abfd, insn, (bfd_byte *) data + octets);
+  return bfd_reloc_ok;
+}
+
+static bfd_boolean
+spu_elf_new_section_hook (bfd *abfd, asection *sec)
+{
+  if (!sec->used_by_bfd)
+    {
+      struct _spu_elf_section_data *sdata;
+
+      sdata = bfd_zalloc (abfd, sizeof (*sdata));
+      if (sdata == NULL)
+	return FALSE;
+      sec->used_by_bfd = sdata;
+    }
+
+  return _bfd_elf_new_section_hook (abfd, sec);
+}
+
+/* Specially mark defined symbols named _EAR_* with BSF_KEEP so that
+   strip --strip-unneeded will not remove them.  */
+
+static void
+spu_elf_backend_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, asymbol *sym)
+{
+  if (sym->name != NULL
+      && sym->section != bfd_abs_section_ptr
+      && strncmp (sym->name, "_EAR_", 5) == 0)
+    sym->flags |= BSF_KEEP;
+}
+
+/* SPU ELF linker hash table.  */
+
+struct spu_link_hash_table
+{
+  struct elf_link_hash_table elf;
+
+  /* The stub hash table.  */
+  struct bfd_hash_table stub_hash_table;
+
+  /* Shortcuts to overlay sections.  */
+  asection *stub;
+  asection *ovtab;
+
+  struct elf_link_hash_entry *ovly_load;
+
+  /* An array of two output sections per overlay region, chosen such that
+     the first section vma is the overlay buffer vma (ie. the section has
+     the lowest vma in the group that occupy the region), and the second
+     section vma+size specifies the end of the region.  We keep pointers
+     to sections like this because section vmas may change when laying
+     them out.  */
+  asection **ovl_region;
+
+  /* Number of overlay buffers.  */
+  unsigned int num_buf;
+
+  /* Total number of overlays.  */
+  unsigned int num_overlays;
+
+  /* Set if we should emit symbols for stubs.  */
+  unsigned int emit_stub_syms:1;
+
+  /* Set if we want stubs on calls out of overlay regions to
+     non-overlay regions.  */
+  unsigned int non_overlay_stubs : 1;
+
+  /* Set on error.  */
+  unsigned int stub_overflow : 1;
+};
+
+#define spu_hash_table(p) \
+  ((struct spu_link_hash_table *) ((p)->hash))
+
+struct spu_stub_hash_entry
+{
+  struct bfd_hash_entry root;
+
+  /* Destination of this stub.  */
+  asection *target_section;
+  bfd_vma target_off;
+
+  /* Offset of entry in stub section.  */
+  bfd_vma off;
+
+  /* Offset from this stub to stub that loads the overlay index.  */
+  bfd_vma delta;
+};
+
+/* Create an entry in a spu stub hash table.  */
+
+static struct bfd_hash_entry *
+stub_hash_newfunc (struct bfd_hash_entry *entry,
+		   struct bfd_hash_table *table,
+		   const char *string)
+{
+  /* Allocate the structure if it has not already been allocated by a
+     subclass.  */
+  if (entry == NULL)
+    {
+      entry = bfd_hash_allocate (table, sizeof (struct spu_stub_hash_entry));
+      if (entry == NULL)
+	return entry;
+    }
+
+  /* Call the allocation method of the superclass.  */
+  entry = bfd_hash_newfunc (entry, table, string);
+  if (entry != NULL)
+    {
+      struct spu_stub_hash_entry *sh = (struct spu_stub_hash_entry *) entry;
+
+      sh->target_section = NULL;
+      sh->target_off = 0;
+      sh->off = 0;
+      sh->delta = 0;
+    }
+
+  return entry;
+}
+
+/* Create a spu ELF linker hash table.  */
+
+static struct bfd_link_hash_table *
+spu_elf_link_hash_table_create (bfd *abfd)
+{
+  struct spu_link_hash_table *htab;
+
+  htab = bfd_malloc (sizeof (*htab));
+  if (htab == NULL)
+    return NULL;
+
+  if (!_bfd_elf_link_hash_table_init (&htab->elf, abfd,
+				      _bfd_elf_link_hash_newfunc,
+				      sizeof (struct elf_link_hash_entry)))
+    {
+      free (htab);
+      return NULL;
+    }
+
+  /* Init the stub hash table too.  */
+  if (!bfd_hash_table_init (&htab->stub_hash_table, stub_hash_newfunc,
+			    sizeof (struct spu_stub_hash_entry)))
+    return NULL;
+
+  memset (&htab->stub, 0,
+	  sizeof (*htab) - offsetof (struct spu_link_hash_table, stub));
+
+  return &htab->elf.root;
+}
+
+/* Free the derived linker hash table.  */
+
+static void
+spu_elf_link_hash_table_free (struct bfd_link_hash_table *hash)
+{
+  struct spu_link_hash_table *ret = (struct spu_link_hash_table *) hash;
+
+  bfd_hash_table_free (&ret->stub_hash_table);
+  _bfd_generic_link_hash_table_free (hash);
+}
+
+/* Find the symbol for the given R_SYMNDX in IBFD and set *HP and *SYMP
+   to (hash, NULL) for global symbols, and (NULL, sym) for locals.  Set
+   *SYMSECP to the symbol's section.  *LOCSYMSP caches local syms.  */
+
+static bfd_boolean
+get_sym_h (struct elf_link_hash_entry **hp,
+	   Elf_Internal_Sym **symp,
+	   asection **symsecp,
+	   Elf_Internal_Sym **locsymsp,
+	   unsigned long r_symndx,
+	   bfd *ibfd)
+{
+  Elf_Internal_Shdr *symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
+
+  if (r_symndx >= symtab_hdr->sh_info)
+    {
+      struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (ibfd);
+      struct elf_link_hash_entry *h;
+
+      h = sym_hashes[r_symndx - symtab_hdr->sh_info];
+      while (h->root.type == bfd_link_hash_indirect
+	     || h->root.type == bfd_link_hash_warning)
+	h = (struct elf_link_hash_entry *) h->root.u.i.link;
+
+      if (hp != NULL)
+	*hp = h;
+
+      if (symp != NULL)
+	*symp = NULL;
+
+      if (symsecp != NULL)
+	{
+	  asection *symsec = NULL;
+	  if (h->root.type == bfd_link_hash_defined
+	      || h->root.type == bfd_link_hash_defweak)
+	    symsec = h->root.u.def.section;
+	  *symsecp = symsec;
+	}
+    }
+  else
+    {
+      Elf_Internal_Sym *sym;
+      Elf_Internal_Sym *locsyms = *locsymsp;
+
+      if (locsyms == NULL)
+	{
+	  locsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
+	  if (locsyms == NULL)
+	    locsyms = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
+					    symtab_hdr->sh_info,
+					    0, NULL, NULL, NULL);
+	  if (locsyms == NULL)
+	    return FALSE;
+	  *locsymsp = locsyms;
+	}
+      sym = locsyms + r_symndx;
+
+      if (hp != NULL)
+	*hp = NULL;
+
+      if (symp != NULL)
+	*symp = sym;
+
+      if (symsecp != NULL)
+	{
+	  asection *symsec = NULL;
+	  if ((sym->st_shndx != SHN_UNDEF
+	       && sym->st_shndx < SHN_LORESERVE)
+	      || sym->st_shndx > SHN_HIRESERVE)
+	    symsec = bfd_section_from_elf_index (ibfd, sym->st_shndx);
+	  *symsecp = symsec;
+	}
+    }
+  return TRUE;
+}
+
+/* Build a name for an entry in the stub hash table.  The input section
+   id isn't really necessary but we add that in for consistency with
+   ppc32 and ppc64 stub names.  We can't use a local symbol name
+   because ld -r might generate duplicate local symbols.  */
+
+static char *
+spu_stub_name (const asection *input_sec,
+	       const asection *sym_sec,
+	       const struct elf_link_hash_entry *h,
+	       const Elf_Internal_Rela *rel)
+{
+  char *stub_name;
+  bfd_size_type len;
+
+  if (h)
+    {
+      len = 8 + 1 + strlen (h->root.root.string) + 1 + 8 + 1;
+      stub_name = bfd_malloc (len);
+      if (stub_name == NULL)
+	return stub_name;
+
+      sprintf (stub_name, "%08x.%s+%x",
+	       input_sec->id & 0xffffffff,
+	       h->root.root.string,
+	       (int) rel->r_addend & 0xffffffff);
+      len -= 8;
+    }
+  else
+    {
+      len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1;
+      stub_name = bfd_malloc (len);
+      if (stub_name == NULL)
+	return stub_name;
+
+      sprintf (stub_name, "%08x.%x:%x+%x",
+	       input_sec->id & 0xffffffff,
+	       sym_sec->id & 0xffffffff,
+	       (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
+	       (int) rel->r_addend & 0xffffffff);
+      len = strlen (stub_name);
+    }
+
+  if (stub_name[len - 2] == '+'
+      && stub_name[len - 1] == '0'
+      && stub_name[len] == 0)
+    stub_name[len - 2] = 0;
+
+  return stub_name;
+}
+
+/* Create the note section if not already present.  This is done early so
+   that the linker maps the sections to the right place in the output.  */
+
+bfd_boolean
+spu_elf_create_sections (bfd *output_bfd, struct bfd_link_info *info)
+{
+  bfd *ibfd;
+
+  for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->next)
+    if (bfd_get_section_by_name (ibfd, SPU_PTNOTE_SPUNAME) != NULL)
+      break;
+
+  if (ibfd == NULL)
+    {
+      /* Make SPU_PTNOTE_SPUNAME section.  */
+      asection *s;
+      size_t name_len;
+      size_t size;
+      bfd_byte *data;
+      flagword flags;
+
+      ibfd = info->input_bfds;
+      flags = SEC_LOAD | SEC_READONLY | SEC_HAS_CONTENTS | SEC_IN_MEMORY;
+      s = bfd_make_section_anyway_with_flags (ibfd, SPU_PTNOTE_SPUNAME, flags);
+      if (s == NULL
+	  || !bfd_set_section_alignment (ibfd, s, 4))
+	return FALSE;
+
+      name_len = strlen (bfd_get_filename (output_bfd)) + 1;
+      size = 12 + ((sizeof (SPU_PLUGIN_NAME) + 3) & -4);
+      size += (name_len + 3) & -4;
+
+      if (!bfd_set_section_size (ibfd, s, size))
+	return FALSE;
+
+      data = bfd_zalloc (ibfd, size);
+      if (data == NULL)
+	return FALSE;
+
+      bfd_put_32 (ibfd, sizeof (SPU_PLUGIN_NAME), data + 0);
+      bfd_put_32 (ibfd, name_len, data + 4);
+      bfd_put_32 (ibfd, 1, data + 8);
+      memcpy (data + 12, SPU_PLUGIN_NAME, sizeof (SPU_PLUGIN_NAME));
+      memcpy (data + 12 + ((sizeof (SPU_PLUGIN_NAME) + 3) & -4),
+	      bfd_get_filename (output_bfd), name_len);
+      s->contents = data;
+    }
+
+  return TRUE;
+}
+
+/* Return the section that should be marked against GC for a given
+   relocation.  */
+
+static asection *
+spu_elf_gc_mark_hook (asection *sec,
+		      struct bfd_link_info *info ATTRIBUTE_UNUSED,
+		      Elf_Internal_Rela *rel ATTRIBUTE_UNUSED,
+		      struct elf_link_hash_entry *h,
+		      Elf_Internal_Sym *sym)
+{
+  if (h != NULL)
+    {
+      switch (h->root.type)
+	{
+	case bfd_link_hash_defined:
+	case bfd_link_hash_defweak:
+	  return h->root.u.def.section;
+
+	case bfd_link_hash_common:
+	  return h->root.u.c.p->section;
+
+	default:
+	  break;
+	}
+    }
+  else
+    return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
+
+  return NULL;
+}
+
+/* qsort predicate to sort sections by vma.  */
+
+static int
+sort_sections (const void *a, const void *b)
+{
+  const asection *const *s1 = a;
+  const asection *const *s2 = b;
+  bfd_signed_vma delta = (*s1)->vma - (*s2)->vma;
+
+  if (delta != 0)
+    return delta < 0 ? -1 : 1;
+
+  return (*s1)->index - (*s2)->index;
+}
+
+/* Identify overlays in the output bfd, and number them.  */
+
+bfd_boolean
+spu_elf_find_overlays (bfd *output_bfd, struct bfd_link_info *info)
+{
+  struct spu_link_hash_table *htab = spu_hash_table (info);
+  asection **alloc_sec;
+  unsigned int i, n, ovl_index, num_buf;
+  asection *s;
+  bfd_vma ovl_end;
+
+  if (output_bfd->section_count < 2)
+    return FALSE;
+
+  alloc_sec = bfd_malloc (output_bfd->section_count * sizeof (*alloc_sec));
+  if (alloc_sec == NULL)
+    return FALSE;
+
+  /* Pick out all the alloced sections.  */
+  for (n = 0, s = output_bfd->sections; s != NULL; s = s->next)
+    if ((s->flags & SEC_ALLOC) != 0
+	&& (s->flags & (SEC_LOAD | SEC_THREAD_LOCAL)) != SEC_THREAD_LOCAL
+	&& s->size != 0)
+      alloc_sec[n++] = s;
+
+  if (n == 0)
+    {
+      free (alloc_sec);
+      return FALSE;
+    }
+
+  /* Sort them by vma.  */
+  qsort (alloc_sec, n, sizeof (*alloc_sec), sort_sections);
+
+  /* Look for overlapping vmas.  Any with overlap must be overlays.
+     Count them.  Also count the number of overlay regions and for
+     each region save a section from that region with the lowest vma
+     and another section with the highest end vma.  */
+  ovl_end = alloc_sec[0]->vma + alloc_sec[0]->size;
+  for (ovl_index = 0, num_buf = 0, i = 1; i < n; i++)
+    {
+      s = alloc_sec[i];
+      if (s->vma < ovl_end)
+	{
+	  asection *s0 = alloc_sec[i - 1];
+
+	  if (spu_elf_section_data (s0)->ovl_index == 0)
+	    {
+	      spu_elf_section_data (s0)->ovl_index = ++ovl_index;
+	      alloc_sec[num_buf * 2] = s0;
+	      alloc_sec[num_buf * 2 + 1] = s0;
+	      num_buf++;
+	    }
+	  spu_elf_section_data (s)->ovl_index = ++ovl_index;
+	  if (ovl_end < s->vma + s->size)
+	    {
+	      ovl_end = s->vma + s->size;
+	      alloc_sec[num_buf * 2 - 1] = s;
+	    }
+	}
+      else
+	ovl_end = s->vma + s->size;
+    }
+
+  htab->num_overlays = ovl_index;
+  htab->num_buf = num_buf;
+  if (ovl_index == 0)
+    {
+      free (alloc_sec);
+      return FALSE;
+    }
+
+  alloc_sec = bfd_realloc (alloc_sec, num_buf * 2 * sizeof (*alloc_sec));
+  if (alloc_sec == NULL)
+    return FALSE;
+
+  htab->ovl_region = alloc_sec;
+  return TRUE;
+}
+
+/* One of these per stub.  */
+#define SIZEOF_STUB1 8
+#define ILA_79	0x4200004f		/* ila $79,function_address */
+#define BR	0x32000000		/* br stub2 */
+
+/* One of these per overlay.  */
+#define SIZEOF_STUB2 8
+#define ILA_78	0x4200004e		/* ila $78,overlay_number */
+					/* br __ovly_load */
+#define NOP	0x40200000
+
+/* Return true for all relative and absolute branch and hint instructions.
+   bra   00110000 0..
+   brasl 00110001 0..
+   br    00110010 0..
+   brsl  00110011 0..
+   brz   00100000 0..
+   brnz  00100001 0..
+   brhz  00100010 0..
+   brhnz 00100011 0..
+   hbra  0001000..
+   hbrr  0001001..  */
+
+static bfd_boolean
+is_branch (const unsigned char *insn)
+{
+  return (((insn[0] & 0xec) == 0x20 && (insn[1] & 0x80) == 0)
+	  || (insn[0] & 0xfc) == 0x10);
+}
+
+struct stubarr {
+  struct spu_stub_hash_entry **sh;
+  unsigned int count;
+};
+
+/* Called via bfd_hash_traverse to set up pointers to all symbols
+   in the stub hash table.  */
+
+static bfd_boolean
+populate_stubs (struct bfd_hash_entry *bh, void *inf)
+{
+  struct stubarr *stubs = inf;
+
+  stubs->sh[--stubs->count] = (struct spu_stub_hash_entry *) bh;
+  return TRUE;
+}
+
+/* qsort predicate to sort stubs by overlay number.  */
+
+static int
+sort_stubs (const void *a, const void *b)
+{
+  const struct spu_stub_hash_entry *const *sa = a;
+  const struct spu_stub_hash_entry *const *sb = b;
+  int i;
+  bfd_signed_vma d;
+
+  i = spu_elf_section_data ((*sa)->target_section->output_section)->ovl_index;
+  i -= spu_elf_section_data ((*sb)->target_section->output_section)->ovl_index;
+  if (i != 0)
+    return i;
+
+  d = ((*sa)->target_section->output_section->vma
+       + (*sa)->target_section->output_offset
+       + (*sa)->target_off
+       - (*sb)->target_section->output_section->vma
+       - (*sb)->target_section->output_offset
+       - (*sb)->target_off);
+  if (d != 0)
+    return d < 0 ? -1 : 1;
+
+  /* Two functions at the same address.  Aliases perhaps.  */
+  i = strcmp ((*sb)->root.string, (*sa)->root.string);
+  BFD_ASSERT (i != 0);
+  return i;
+}
+
+/* Allocate space for overlay call and return stubs.  */
+
+bfd_boolean
+spu_elf_size_stubs (bfd *output_bfd,
+		    struct bfd_link_info *info,
+		    int non_overlay_stubs,
+		    asection **stub,
+		    asection **ovtab,
+		    asection **toe)
+{
+  struct spu_link_hash_table *htab = spu_hash_table (info);
+  bfd *ibfd;
+  struct stubarr stubs;
+  unsigned i, group;
+  flagword flags;
+
+  htab->non_overlay_stubs = non_overlay_stubs;
+  stubs.count = 0;
+  for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
+    {
+      extern const bfd_target bfd_elf32_spu_vec;
+      Elf_Internal_Shdr *symtab_hdr;
+      asection *section;
+      Elf_Internal_Sym *local_syms = NULL;
+
+      if (ibfd->xvec != &bfd_elf32_spu_vec)
+	continue;
+
+      /* We'll need the symbol table in a second.  */
+      symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
+      if (symtab_hdr->sh_info == 0)
+	continue;
+
+      /* Walk over each section attached to the input bfd.  */
+      for (section = ibfd->sections; section != NULL; section = section->next)
+	{
+	  Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
+
+	  /* If there aren't any relocs, then there's nothing more to do.  */
+	  if ((section->flags & SEC_RELOC) == 0
+	      || (section->flags & SEC_ALLOC) == 0
+	      || (section->flags & SEC_LOAD) == 0
+	      || section->reloc_count == 0)
+	    continue;
+
+	  /* If this section is a link-once section that will be
+	     discarded, then don't create any stubs.  */
+	  if (section->output_section == NULL
+	      || section->output_section->owner != output_bfd)
+	    continue;
+
+	  /* Get the relocs.  */
+	  internal_relocs
+	    = _bfd_elf_link_read_relocs (ibfd, section, NULL, NULL,
+					 info->keep_memory);
+	  if (internal_relocs == NULL)
+	    goto error_ret_free_local;
+
+	  /* Now examine each relocation.  */
+	  irela = internal_relocs;
+	  irelaend = irela + section->reloc_count;
+	  for (; irela < irelaend; irela++)
+	    {
+	      enum elf_spu_reloc_type r_type;
+	      unsigned int r_indx;
+	      asection *sym_sec;
+	      Elf_Internal_Sym *sym;
+	      struct elf_link_hash_entry *h;
+	      char *stub_name;
+	      struct spu_stub_hash_entry *sh;
+	      unsigned int sym_type;
+	      enum _insn_type { non_branch, branch, call } insn_type;
+
+	      r_type = ELF32_R_TYPE (irela->r_info);
+	      r_indx = ELF32_R_SYM (irela->r_info);
+
+	      if (r_type >= R_SPU_max)
+		{
+		  bfd_set_error (bfd_error_bad_value);
+		  goto error_ret_free_internal;
+		}
+
+	      /* Determine the reloc target section.  */
+	      if (!get_sym_h (&h, &sym, &sym_sec, &local_syms, r_indx, ibfd))
+		goto error_ret_free_internal;
+
+	      if (sym_sec == NULL
+		  || sym_sec->output_section == NULL
+		  || sym_sec->output_section->owner != output_bfd)
+		continue;
+
+	      /* Ensure no stubs for user supplied overlay manager syms.  */
+	      if (h != NULL
+		  && (strcmp (h->root.root.string, "__ovly_load") == 0
+		      || strcmp (h->root.root.string, "__ovly_return") == 0))
+		continue;
+
+	      insn_type = non_branch;
+	      if (r_type == R_SPU_REL16
+		  || r_type == R_SPU_ADDR16)
+		{
+		  unsigned char insn[4];
+
+		  if (!bfd_get_section_contents (ibfd, section, insn,
+						 irela->r_offset, 4))
+		    goto error_ret_free_internal;
+
+		  if (is_branch (insn))
+		    {
+		      insn_type = branch;
+		      if ((insn[0] & 0xfd) == 0x31)
+			insn_type = call;
+		    }
+		}
+
+	      /* We are only interested in function symbols.  */
+	      if (h != NULL)
+		sym_type = h->type;
+	      else
+		sym_type = ELF_ST_TYPE (sym->st_info);
+	      if (sym_type != STT_FUNC)
+		{
+		  /* It's common for people to write assembly and forget
+		     to give function symbols the right type.  Handle
+		     calls to such symbols, but warn so that (hopefully)
+		     people will fix their code.  We need the symbol
+		     type to be correct to distinguish function pointer
+		     initialisation from other pointer initialisation.  */
+		  if (insn_type == call)
+		    {
+		      const char *sym_name;
+
+		      if (h != NULL)
+			sym_name = h->root.root.string;
+		      else
+			sym_name = bfd_elf_sym_name (sym_sec->owner,
+						     symtab_hdr,
+						     sym,
+						     sym_sec);
+
+		      (*_bfd_error_handler) (_("warning: call to non-function"
+					       " symbol %s defined in %B"),
+					     sym_name, sym_sec->owner);
+		    }
+		  else
+		    continue;
+		}
+
+	      /* Usually, non-overlay sections don't need stubs.  */
+	      if (!spu_elf_section_data (sym_sec->output_section)->ovl_index
+		  && !non_overlay_stubs)
+		continue;
+
+	      /* We need a reference from some other section before
+		 we consider that a symbol might need an overlay stub.  */
+	      if (spu_elf_section_data (sym_sec->output_section)->ovl_index
+		  == spu_elf_section_data (section->output_section)->ovl_index)
+		{
+		  /* Or we need this to *not* be a branch.  ie. We are
+		     possibly taking the address of a function and
+		     passing it out somehow.  */
+		  if (insn_type != non_branch)
+		    continue;
+		}
+
+	      stub_name = spu_stub_name (section, sym_sec, h, irela);
+	      if (stub_name == NULL)
+		goto error_ret_free_internal;
+
+	      sh = (struct spu_stub_hash_entry *)
+		bfd_hash_lookup (&htab->stub_hash_table, stub_name,
+				 TRUE, FALSE);
+	      if (sh == NULL)
+		{
+		  free (stub_name);
+		error_ret_free_internal:
+		  if (elf_section_data (section)->relocs != internal_relocs)
+		    free (internal_relocs);
+		error_ret_free_local:
+		  if (local_syms != NULL
+		      && (symtab_hdr->contents
+			  != (unsigned char *) local_syms))
+		    free (local_syms);
+		  return FALSE;
+		}
+
+	      /* If this entry isn't new, we already have a stub.  */
+	      if (sh->target_section != NULL)
+		{
+		  free (stub_name);
+		  continue;
+		}
+
+	      sh->target_section = sym_sec;
+	      if (h != NULL)
+		sh->target_off = h->root.u.def.value;
+	      else
+		sh->target_off = sym->st_value;
+	      sh->target_off += irela->r_addend;
+
+	      stubs.count += 1;
+	    }
+
+	  /* We're done with the internal relocs, free them.  */
+	  if (elf_section_data (section)->relocs != internal_relocs)
+	    free (internal_relocs);
+	}
+
+      if (local_syms != NULL
+	  && symtab_hdr->contents != (unsigned char *) local_syms)
+	{
+	  if (!info->keep_memory)
+	    free (local_syms);
+	  else
+	    symtab_hdr->contents = (unsigned char *) local_syms;
+	}
+    }
+
+  *stub = NULL;
+  if (stubs.count == 0)
+    return TRUE;
+
+  ibfd = info->input_bfds;
+  flags = (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY
+	   | SEC_HAS_CONTENTS | SEC_IN_MEMORY);
+  htab->stub = bfd_make_section_anyway_with_flags (ibfd, ".stub", flags);
+  *stub = htab->stub;
+  if (htab->stub == NULL
+      || !bfd_set_section_alignment (ibfd, htab->stub, 2))
+    return FALSE;
+
+  flags = (SEC_ALLOC | SEC_LOAD
+	   | SEC_HAS_CONTENTS | SEC_IN_MEMORY);
+  htab->ovtab = bfd_make_section_anyway_with_flags (ibfd, ".ovtab", flags);
+  *ovtab = htab->ovtab;
+  if (htab->ovtab == NULL
+      || !bfd_set_section_alignment (ibfd, htab->stub, 4))
+    return FALSE;
+
+  *toe = bfd_make_section_anyway_with_flags (ibfd, ".toe", SEC_ALLOC);
+  if (*toe == NULL
+      || !bfd_set_section_alignment (ibfd, *toe, 4))
+    return FALSE;
+  (*toe)->size = 16;
+
+  /* Retrieve all the stubs and sort.  */
+  stubs.sh = bfd_malloc (stubs.count * sizeof (*stubs.sh));
+  if (stubs.sh == NULL)
+    return FALSE;
+  i = stubs.count;
+  bfd_hash_traverse (&htab->stub_hash_table, populate_stubs, &stubs);
+  BFD_ASSERT (stubs.count == 0);
+
+  stubs.count = i;
+  qsort (stubs.sh, stubs.count, sizeof (*stubs.sh), sort_stubs);
+
+  /* Now that the stubs are sorted, place them in the stub section.
+     Stubs are grouped per overlay
+     .	    ila $79,func1
+     .	    br 1f
+     .	    ila $79,func2
+     .	    br 1f
+     .
+     .
+     .	    ila $79,funcn
+     .	    nop
+     .	1:
+     .	    ila $78,ovl_index
+     .	    br __ovly_load  */
+
+  group = 0;
+  for (i = 0; i < stubs.count; i++)
+    {
+      if (spu_elf_section_data (stubs.sh[group]->target_section
+				->output_section)->ovl_index
+	  != spu_elf_section_data (stubs.sh[i]->target_section
+				   ->output_section)->ovl_index)
+	{
+	  htab->stub->size += SIZEOF_STUB2;
+	  for (; group != i; group++)
+	    stubs.sh[group]->delta
+	      = stubs.sh[i - 1]->off - stubs.sh[group]->off;
+	}
+      if (group == i
+	  || ((stubs.sh[i - 1]->target_section->output_section->vma
+	       + stubs.sh[i - 1]->target_section->output_offset
+	       + stubs.sh[i - 1]->target_off)
+	      != (stubs.sh[i]->target_section->output_section->vma
+		  + stubs.sh[i]->target_section->output_offset
+		  + stubs.sh[i]->target_off)))
+	{
+	  stubs.sh[i]->off = htab->stub->size;
+	  htab->stub->size += SIZEOF_STUB1;
+	}
+      else
+	stubs.sh[i]->off = stubs.sh[i - 1]->off;
+    }
+  if (group != i)
+    htab->stub->size += SIZEOF_STUB2;
+  for (; group != i; group++)
+    stubs.sh[group]->delta = stubs.sh[i - 1]->off - stubs.sh[group]->off;
+
+ /* htab->ovtab consists of two arrays.
+    .	struct {
+    .	  u32 vma;
+    .	  u32 size;
+    .	  u32 file_off;
+    .	  u32 buf;
+    .	} _ovly_table[];
+    .
+    .	struct {
+    .	  u32 mapped;
+    .	} _ovly_buf_table[];  */
+
+  htab->ovtab->alignment_power = 4;
+  htab->ovtab->size = htab->num_overlays * 16 + htab->num_buf * 4;
+
+  return TRUE;
+}
+
+/* Functions to handle embedded spu_ovl.o object.  */
+
+static void *
+ovl_mgr_open (struct bfd *nbfd ATTRIBUTE_UNUSED, void *stream)
+{
+  return stream;
+}
+
+static file_ptr
+ovl_mgr_pread (struct bfd *abfd ATTRIBUTE_UNUSED,
+	       void *stream,
+	       void *buf,
+	       file_ptr nbytes,
+	       file_ptr offset)
+{
+  struct _ovl_stream *os;
+  size_t count;
+  size_t max;
+
+  os = (struct _ovl_stream *) stream;
+  max = (char *) os->end - (char *) os->start;
+
+  if ((ufile_ptr) offset >= max)
+    return 0;
+
+  count = nbytes;
+  if (count > max - offset)
+    count = max - offset;
+
+  memcpy (buf, (char *) os->start + offset, count);
+  return count;
+}
+
+bfd_boolean
+spu_elf_open_builtin_lib (bfd **ovl_bfd, const struct _ovl_stream *stream)
+{
+  *ovl_bfd = bfd_openr_iovec ("builtin ovl_mgr",
+			      "elf32-spu",
+			      ovl_mgr_open,
+			      (void *) stream,
+			      ovl_mgr_pread,
+			      NULL);
+  return *ovl_bfd != NULL;
+}
+
+/* Fill in the ila and br for a stub.  On the last stub for a group,
+   write the stub that sets the overlay number too.  */
+
+static bfd_boolean
+write_one_stub (struct bfd_hash_entry *bh, void *inf)
+{
+  struct spu_stub_hash_entry *ent = (struct spu_stub_hash_entry *) bh;
+  struct spu_link_hash_table *htab = inf;
+  asection *sec = htab->stub;
+  asection *s = ent->target_section;
+  unsigned int ovl;
+  bfd_vma val;
+
+  val = ent->target_off + s->output_offset + s->output_section->vma;
+  bfd_put_32 (sec->owner, ILA_79 + ((val << 7) & 0x01ffff80),
+	      sec->contents + ent->off);
+  val = ent->delta + 4;
+  bfd_put_32 (sec->owner, BR + ((val << 5) & 0x007fff80),
+	      sec->contents + ent->off + 4);
+
+  /* If this is the last stub of this group, write stub2.  */
+  if (ent->delta == 0)
+    {
+      bfd_put_32 (sec->owner, NOP,
+		  sec->contents + ent->off + 4);
+
+      ovl = spu_elf_section_data (s->output_section)->ovl_index;
+      bfd_put_32 (sec->owner, ILA_78 + ((ovl << 7) & 0x01ffff80),
+		  sec->contents + ent->off + 8);
+
+      val = (htab->ovly_load->root.u.def.section->output_section->vma
+	     + htab->ovly_load->root.u.def.section->output_offset
+	     + htab->ovly_load->root.u.def.value
+	     - (sec->output_section->vma
+		+ sec->output_offset
+		+ ent->off + 12));
+
+      if (val + 0x20000 >= 0x40000)
+	htab->stub_overflow = TRUE;
+
+      bfd_put_32 (sec->owner, BR + ((val << 5) & 0x007fff80),
+		  sec->contents + ent->off + 12);
+    }
+
+  if (htab->emit_stub_syms)
+    {
+      struct elf_link_hash_entry *h;
+      size_t len1, len2;
+      char *name;
+
+      len1 = sizeof ("ovl_call.") - 1;
+      len2 = strlen (ent->root.string);
+      name = bfd_malloc (len1 + len2 + 1);
+      if (name == NULL)
+	return FALSE;
+      memcpy (name, ent->root.string, 9);
+      memcpy (name + 9, "ovl_call.", len1);
+      memcpy (name + 9 + len1, ent->root.string + 9, len2 - 9 + 1);
+      h = elf_link_hash_lookup (&htab->elf, name, TRUE, FALSE, FALSE);
+      if (h == NULL)
+	return FALSE;
+      if (h->root.type == bfd_link_hash_new)
+	{
+	  h->root.type = bfd_link_hash_defined;
+	  h->root.u.def.section = sec;
+	  h->root.u.def.value = ent->off;
+	  h->size = (ent->delta == 0
+		     ? SIZEOF_STUB1 + SIZEOF_STUB2 : SIZEOF_STUB1);
+	  h->type = STT_FUNC;
+	  h->ref_regular = 1;
+	  h->def_regular = 1;
+	  h->ref_regular_nonweak = 1;
+	  h->forced_local = 1;
+	  h->non_elf = 0;
+	}
+    }
+
+  return TRUE;
+}
+
+/* Define an STT_OBJECT symbol.  */
+
+static struct elf_link_hash_entry *
+define_ovtab_symbol (struct spu_link_hash_table *htab, const char *name)
+{
+  struct elf_link_hash_entry *h;
+
+  h = elf_link_hash_lookup (&htab->elf, name, TRUE, FALSE, FALSE);
+  if (h == NULL)
+    return NULL;
+
+  if (h->root.type != bfd_link_hash_defined
+      || !h->def_regular)
+    {
+      h->root.type = bfd_link_hash_defined;
+      h->root.u.def.section = htab->ovtab;
+      h->type = STT_OBJECT;
+      h->ref_regular = 1;
+      h->def_regular = 1;
+      h->ref_regular_nonweak = 1;
+      h->non_elf = 0;
+    }
+  else
+    {
+      (*_bfd_error_handler) (_("%B is not allowed to define %s"),
+			     h->root.u.def.section->owner,
+			     h->root.root.string);
+      bfd_set_error (bfd_error_bad_value);
+      return NULL;
+    }
+
+  return h;
+}
+
+/* Fill in all stubs and the overlay tables.  */
+
+bfd_boolean
+spu_elf_build_stubs (struct bfd_link_info *info, int emit_syms, asection *toe)
+{
+  struct spu_link_hash_table *htab = spu_hash_table (info);
+  struct elf_link_hash_entry *h;
+  bfd_byte *p;
+  asection *s;
+  bfd *obfd;
+  unsigned int i;
+
+  htab->emit_stub_syms = emit_syms;
+  htab->stub->contents = bfd_zalloc (htab->stub->owner, htab->stub->size);
+  if (htab->stub->contents == NULL)
+    return FALSE;
+
+  h = elf_link_hash_lookup (&htab->elf, "__ovly_load", FALSE, FALSE, FALSE);
+  htab->ovly_load = h;
+  BFD_ASSERT (h != NULL
+	      && (h->root.type == bfd_link_hash_defined
+		  || h->root.type == bfd_link_hash_defweak)
+	      && h->def_regular);
+
+  s = h->root.u.def.section->output_section;
+  if (spu_elf_section_data (s)->ovl_index)
+    {
+      (*_bfd_error_handler) (_("%s in overlay section"),
+			     h->root.u.def.section->owner);
+      bfd_set_error (bfd_error_bad_value);
+      return FALSE;
+    }
+
+  /* Write out all the stubs.  */
+  bfd_hash_traverse (&htab->stub_hash_table, write_one_stub, htab);
+
+  if (htab->stub_overflow)
+    {
+      (*_bfd_error_handler) (_("overlay stub relocation overflow"));
+      bfd_set_error (bfd_error_bad_value);
+      return FALSE;
+    }
+
+  htab->ovtab->contents = bfd_zalloc (htab->ovtab->owner, htab->ovtab->size);
+  if (htab->ovtab->contents == NULL)
+    return FALSE;
+
+  /* Write out _ovly_table.  */
+  p = htab->ovtab->contents;
+  obfd = htab->ovtab->output_section->owner;
+  for (s = obfd->sections; s != NULL; s = s->next)
+    {
+      unsigned int ovl_index = spu_elf_section_data (s)->ovl_index;
+
+      if (ovl_index != 0)
+	{
+	  unsigned int lo, hi, mid;
+	  unsigned long off = (ovl_index - 1) * 16;
+	  bfd_put_32 (htab->ovtab->owner, s->vma, p + off);
+	  bfd_put_32 (htab->ovtab->owner, (s->size + 15) & -16, p + off + 4);
+	  /* file_off written later in spu_elf_modify_program_headers.  */
+
+	  lo = 0;
+	  hi = htab->num_buf;
+	  while (lo < hi)
+	    {
+	      mid = (lo + hi) >> 1;
+	      if (htab->ovl_region[2 * mid + 1]->vma
+		  + htab->ovl_region[2 * mid + 1]->size <= s->vma)
+		lo = mid + 1;
+	      else if (htab->ovl_region[2 * mid]->vma > s->vma)
+		hi = mid;
+	      else
+		{
+		  bfd_put_32 (htab->ovtab->owner, mid + 1, p + off + 12);
+		  break;
+		}
+	    }
+	  BFD_ASSERT (lo < hi);
+	}
+    }
+
+  /* Write out _ovly_buf_table.  */
+  p = htab->ovtab->contents + htab->num_overlays * 16;
+  for (i = 0; i < htab->num_buf; i++)
+    {
+      bfd_put_32 (htab->ovtab->owner, 0, p);
+      p += 4;
+    }
+
+  h = define_ovtab_symbol (htab, "_ovly_table");
+  if (h == NULL)
+    return FALSE;
+  h->root.u.def.value = 0;
+  h->size = htab->num_overlays * 16;
+
+  h = define_ovtab_symbol (htab, "_ovly_table_end");
+  if (h == NULL)
+    return FALSE;
+  h->root.u.def.value = htab->num_overlays * 16;
+  h->size = 0;
+
+  h = define_ovtab_symbol (htab, "_ovly_buf_table");
+  if (h == NULL)
+    return FALSE;
+  h->root.u.def.value = htab->num_overlays * 16;
+  h->size = htab->num_buf * 4;
+
+  h = define_ovtab_symbol (htab, "_ovly_buf_table_end");
+  if (h == NULL)
+    return FALSE;
+  h->root.u.def.value = htab->num_overlays * 16 + htab->num_buf * 4;
+  h->size = 0;
+
+  h = define_ovtab_symbol (htab, "_EAR_");
+  if (h == NULL)
+    return FALSE;
+  h->root.u.def.section = toe;
+  h->root.u.def.value = 0;
+  h->size = 16;
+
+  return TRUE;
+}
+
+/* Apply RELOCS to CONTENTS of INPUT_SECTION from INPUT_BFD.  */
+
+static bfd_boolean
+spu_elf_relocate_section (bfd *output_bfd,
+			  struct bfd_link_info *info,
+			  bfd *input_bfd,
+			  asection *input_section,
+			  bfd_byte *contents,
+			  Elf_Internal_Rela *relocs,
+			  Elf_Internal_Sym *local_syms,
+			  asection **local_sections)
+{
+  Elf_Internal_Shdr *symtab_hdr;
+  struct elf_link_hash_entry **sym_hashes;
+  Elf_Internal_Rela *rel, *relend;
+  struct spu_link_hash_table *htab;
+  bfd_boolean ret = TRUE;
+
+  if (info->relocatable)
+    return TRUE;
+
+  htab = spu_hash_table (info);
+  symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+  sym_hashes = (struct elf_link_hash_entry **) (elf_sym_hashes (input_bfd));
+
+  rel = relocs;
+  relend = relocs + input_section->reloc_count;
+  for (; rel < relend; rel++)
+    {
+      int r_type;
+      reloc_howto_type *howto;
+      unsigned long r_symndx;
+      Elf_Internal_Sym *sym;
+      asection *sec;
+      struct elf_link_hash_entry *h;
+      const char *sym_name;
+      bfd_vma relocation;
+      bfd_vma addend;
+      bfd_reloc_status_type r;
+      bfd_boolean unresolved_reloc;
+      bfd_boolean warned;
+
+      r_symndx = ELF32_R_SYM (rel->r_info);
+      r_type = ELF32_R_TYPE (rel->r_info);
+      howto = elf_howto_table + r_type;
+      unresolved_reloc = FALSE;
+      warned = FALSE;
+
+      h = NULL;
+      sym = NULL;
+      sec = NULL;
+      if (r_symndx < symtab_hdr->sh_info)
+	{
+	  sym = local_syms + r_symndx;
+	  sec = local_sections[r_symndx];
+	  sym_name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, sec);
+	  relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+	}
+      else
+	{
+	  RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+				   r_symndx, symtab_hdr, sym_hashes,
+				   h, sec, relocation,
+				   unresolved_reloc, warned);
+	  sym_name = h->root.root.string;
+	}
+
+      if (unresolved_reloc)
+	{
+	  (*_bfd_error_handler)
+	    (_("%B(%s+0x%lx): unresolvable %s relocation against symbol `%s'"),
+	     input_bfd,
+	     bfd_get_section_name (input_bfd, input_section),
+	     (long) rel->r_offset,
+	     howto->name,
+	     sym_name);
+	  ret = FALSE;
+	}
+
+      /* If this symbol is in an overlay area, we may need to relocate
+	 to the overlay stub.  */
+      addend = rel->r_addend;
+      if (sec != NULL
+	  && sec->output_section != NULL
+	  && sec->output_section->owner == output_bfd
+	  && (spu_elf_section_data (sec->output_section)->ovl_index != 0
+	      || htab->non_overlay_stubs)
+	  && !(sec == input_section
+	       && is_branch (contents + rel->r_offset)))
+	{
+	  char *stub_name;
+	  struct spu_stub_hash_entry *sh;
+
+	  stub_name = spu_stub_name (input_section, sec, h, rel);
+	  if (stub_name == NULL)
+	    return FALSE;
+
+	  sh = (struct spu_stub_hash_entry *)
+	    bfd_hash_lookup (&htab->stub_hash_table, stub_name, FALSE, FALSE);
+	  if (sh != NULL)
+	    {
+	      relocation = (htab->stub->output_section->vma
+			    + htab->stub->output_offset
+			    + sh->off);
+	      addend = 0;
+	    }
+	  free (stub_name);
+	}
+
+      r = _bfd_final_link_relocate (howto,
+				    input_bfd,
+				    input_section,
+				    contents,
+				    rel->r_offset, relocation, addend);
+
+      if (r != bfd_reloc_ok)
+	{
+	  const char *msg = (const char *) 0;
+
+	  switch (r)
+	    {
+	    case bfd_reloc_overflow:
+	      if (!((*info->callbacks->reloc_overflow)
+		    (info, (h ? &h->root : NULL), sym_name, howto->name,
+		     (bfd_vma) 0, input_bfd, input_section, rel->r_offset)))
+		return FALSE;
+	      break;
+
+	    case bfd_reloc_undefined:
+	      if (!((*info->callbacks->undefined_symbol)
+		    (info, sym_name, input_bfd, input_section,
+		     rel->r_offset, TRUE)))
+		return FALSE;
+	      break;
+
+	    case bfd_reloc_outofrange:
+	      msg = _("internal error: out of range error");
+	      goto common_error;
+
+	    case bfd_reloc_notsupported:
+	      msg = _("internal error: unsupported relocation error");
+	      goto common_error;
+
+	    case bfd_reloc_dangerous:
+	      msg = _("internal error: dangerous error");
+	      goto common_error;
+
+	    default:
+	      msg = _("internal error: unknown error");
+	      /* fall through */
+
+	    common_error:
+	      if (!((*info->callbacks->warning)
+		    (info, msg, sym_name, input_bfd, input_section,
+		     rel->r_offset)))
+		return FALSE;
+	      break;
+	    }
+	}
+    }
+
+  return ret;
+}
+
+static int spu_plugin = 0;
+
+void
+spu_elf_plugin (int val)
+{
+  spu_plugin = val;
+}
+
+/* Set ELF header e_type for plugins.  */
+
+static void
+spu_elf_post_process_headers (bfd *abfd,
+			      struct bfd_link_info *info ATTRIBUTE_UNUSED)
+{
+  if (spu_plugin)
+    {
+      Elf_Internal_Ehdr *i_ehdrp = elf_elfheader (abfd);
+
+      i_ehdrp->e_type = ET_DYN;
+    }
+}
+
+/* We may add an extra PT_LOAD segment for .toe.  We also need extra
+   segments for overlays.  */
+
+static int
+spu_elf_additional_program_headers (bfd *abfd, struct bfd_link_info *info)
+{
+  struct spu_link_hash_table *htab = spu_hash_table (info);
+  int extra = htab->num_overlays;
+  asection *sec;
+
+  if (extra)
+    ++extra;
+
+  sec = bfd_get_section_by_name (abfd, ".toe");
+  if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
+    ++extra;
+
+  return extra;
+}
+
+/* Remove .toe section from other PT_LOAD segments and put it in
+   a segment of its own.  Put overlays in separate segments too.  */
+
+static bfd_boolean
+spu_elf_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
+{
+  asection *toe, *s;
+  struct elf_segment_map *m;
+  unsigned int i;
+
+  if (info == NULL)
+    return TRUE;
+
+  toe = bfd_get_section_by_name (abfd, ".toe");
+  for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
+    if (m->p_type == PT_LOAD && m->count > 1)
+      for (i = 0; i < m->count; i++)
+	if ((s = m->sections[i]) == toe
+	    || spu_elf_section_data (s)->ovl_index != 0)
+	  {
+	    struct elf_segment_map *m2;
+	    bfd_vma amt;
+
+	    if (i + 1 < m->count)
+	      {
+		amt = sizeof (struct elf_segment_map);
+		amt += (m->count - (i + 2)) * sizeof (m->sections[0]);
+		m2 = bfd_zalloc (abfd, amt);
+		if (m2 == NULL)
+		  return FALSE;
+		m2->count = m->count - (i + 1);
+		memcpy (m2->sections, m->sections + i + 1,
+			m2->count * sizeof (m->sections[0]));
+		m2->p_type = PT_LOAD;
+		m2->next = m->next;
+		m->next = m2;
+	      }
+	    m->count = 1;
+	    if (i != 0)
+	      {
+		m->count = i;
+		amt = sizeof (struct elf_segment_map);
+		m2 = bfd_zalloc (abfd, amt);
+		if (m2 == NULL)
+		  return FALSE;
+		m2->p_type = PT_LOAD;
+		m2->count = 1;
+		m2->sections[0] = s;
+		m2->next = m->next;
+		m->next = m2;
+	      }
+	    break;
+	  }
+
+  return TRUE;
+}
+
+/* Check that all loadable section VMAs lie in the range
+   LO .. HI inclusive.  */
+
+asection *
+spu_elf_check_vma (bfd *abfd, bfd_vma lo, bfd_vma hi)
+{
+  struct elf_segment_map *m;
+  unsigned int i;
+
+  for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
+    if (m->p_type == PT_LOAD)
+      for (i = 0; i < m->count; i++)
+	if (m->sections[i]->size != 0
+	    && (m->sections[i]->vma < lo
+		|| m->sections[i]->vma > hi
+		|| m->sections[i]->vma + m->sections[i]->size - 1 > hi))
+	  return m->sections[i];
+
+  return NULL;
+}
+
+/* Tweak phdrs before writing them out.  */
+
+static int
+spu_elf_modify_program_headers (bfd *abfd, struct bfd_link_info *info)
+{
+  const struct elf_backend_data *bed;
+  struct elf_obj_tdata *tdata;
+  Elf_Internal_Phdr *phdr, *last;
+  struct spu_link_hash_table *htab;
+  unsigned int count;
+  unsigned int i;
+
+  if (info == NULL)
+    return TRUE;
+
+  bed = get_elf_backend_data (abfd);
+  tdata = elf_tdata (abfd);
+  phdr = tdata->phdr;
+  count = tdata->program_header_size / bed->s->sizeof_phdr;
+  htab = spu_hash_table (info);
+  if (htab->num_overlays != 0)
+    {
+      struct elf_segment_map *m;
+      unsigned int o;
+
+      for (i = 0, m = elf_tdata (abfd)->segment_map; m; ++i, m = m->next)
+	if (m->count != 0
+	    && (o = spu_elf_section_data (m->sections[0])->ovl_index) != 0)
+	  {
+	    /* Mark this as an overlay header.  */
+	    phdr[i].p_flags |= PF_OVERLAY;
+
+	    if (htab->ovtab != NULL && htab->ovtab->size != 0)
+	      {
+		bfd_byte *p = htab->ovtab->contents;
+		unsigned int off = (o - 1) * 16 + 8;
+
+		/* Write file_off into _ovly_table.  */
+		bfd_put_32 (htab->ovtab->owner, phdr[i].p_offset, p + off);
+	      }
+	  }
+    }
+
+  /* Round up p_filesz and p_memsz of PT_LOAD segments to multiples
+     of 16.  This should always be possible when using the standard
+     linker scripts, but don't create overlapping segments if
+     someone is playing games with linker scripts.  */
+  last = NULL;
+  for (i = count; i-- != 0; )
+    if (phdr[i].p_type == PT_LOAD)
+      {
+	unsigned adjust;
+
+	adjust = -phdr[i].p_filesz & 15;
+	if (adjust != 0
+	    && last != NULL
+	    && phdr[i].p_offset + phdr[i].p_filesz > last->p_offset - adjust)
+	  break;
+
+	adjust = -phdr[i].p_memsz & 15;
+	if (adjust != 0
+	    && last != NULL
+	    && phdr[i].p_filesz != 0
+	    && phdr[i].p_vaddr + phdr[i].p_memsz > last->p_vaddr - adjust
+	    && phdr[i].p_vaddr + phdr[i].p_memsz <= last->p_vaddr)
+	  break;
+
+	if (phdr[i].p_filesz != 0)
+	  last = &phdr[i];
+      }
+
+  if (i == (unsigned int) -1)
+    for (i = count; i-- != 0; )
+      if (phdr[i].p_type == PT_LOAD)
+	{
+	unsigned adjust;
+
+	adjust = -phdr[i].p_filesz & 15;
+	phdr[i].p_filesz += adjust;
+
+	adjust = -phdr[i].p_memsz & 15;
+	phdr[i].p_memsz += adjust;
+      }
+
+  return TRUE;
+}
+
+/* Arrange for our linker created section to be output.  */
+
+static bfd_boolean
+spu_elf_section_processing (bfd *abfd ATTRIBUTE_UNUSED,
+			    Elf_Internal_Shdr *i_shdrp)
+{
+  asection *sec;
+
+  sec = i_shdrp->bfd_section;
+  if (sec != NULL
+      && (sec->flags & SEC_LINKER_CREATED) != 0
+      && sec->name != NULL
+      && strcmp (sec->name, SPU_PTNOTE_SPUNAME) == 0)
+    i_shdrp->contents = sec->contents;
+
+  return TRUE;
+}
+
+#define TARGET_BIG_SYM		bfd_elf32_spu_vec
+#define TARGET_BIG_NAME		"elf32-spu"
+#define ELF_ARCH		bfd_arch_spu
+#define ELF_MACHINE_CODE	EM_SPU
+/* This matches the alignment need for DMA.  */
+#define ELF_MAXPAGESIZE		0x80
+#define elf_backend_rela_normal         1
+#define elf_backend_can_gc_sections	1
+
+#define bfd_elf32_bfd_reloc_type_lookup		spu_elf_reloc_type_lookup
+#define elf_info_to_howto			spu_elf_info_to_howto
+#define elf_backend_gc_mark_hook		spu_elf_gc_mark_hook
+#define elf_backend_relocate_section		spu_elf_relocate_section
+#define elf_backend_symbol_processing		spu_elf_backend_symbol_processing
+#define bfd_elf32_new_section_hook		spu_elf_new_section_hook
+#define bfd_elf32_bfd_link_hash_table_create	spu_elf_link_hash_table_create
+#define bfd_elf32_bfd_link_hash_table_free	spu_elf_link_hash_table_free
+
+#define elf_backend_additional_program_headers	spu_elf_additional_program_headers
+#define elf_backend_modify_segment_map		spu_elf_modify_segment_map
+#define elf_backend_modify_program_headers	spu_elf_modify_program_headers
+#define elf_backend_post_process_headers        spu_elf_post_process_headers
+#define elf_backend_section_processing		spu_elf_section_processing
+#define elf_backend_special_sections		spu_elf_special_sections
+
+#include "elf32-target.h"
Index: bfd/elf32-spu.h
===================================================================
RCS file: bfd/elf32-spu.h
diff -N bfd/elf32-spu.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ bfd/elf32-spu.h	24 Oct 2006 23:52:31 -0000
@@ -0,0 +1,51 @@
+/* SPU specific support for 32-bit ELF.
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software Foundation,
+   Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* Extra info kept for SPU sections.  */
+
+struct _spu_elf_section_data
+{
+  struct bfd_elf_section_data elf;
+
+  /* Non-zero for overlay output sections.  */
+  unsigned int ovl_index;
+};
+
+#define spu_elf_section_data(sec) \
+  ((struct _spu_elf_section_data *) elf_section_data (sec))
+
+struct _ovl_stream
+{
+  void *start;
+  void *end;
+};
+
+extern void spu_elf_plugin (int);
+extern bfd_boolean spu_elf_open_builtin_lib (bfd **,
+					     const struct _ovl_stream *);
+extern bfd_boolean spu_elf_create_sections (bfd *,
+					    struct bfd_link_info *);
+extern bfd_boolean spu_elf_find_overlays (bfd *, struct bfd_link_info *);
+extern bfd_boolean spu_elf_size_stubs (bfd *, struct bfd_link_info *, int,
+				       asection **, asection **,
+				       asection **);
+extern bfd_boolean spu_elf_build_stubs (struct bfd_link_info *, int,
+					asection *);
+extern asection *spu_elf_check_vma (bfd *, bfd_vma, bfd_vma);
Index: bfd/reloc.c
===================================================================
RCS file: /cvs/src/src/bfd/reloc.c,v
retrieving revision 1.157
diff -u -p -r1.157 reloc.c
--- bfd/reloc.c	16 Sep 2006 23:51:50 -0000	1.157
+++ bfd/reloc.c	24 Oct 2006 23:52:34 -0000
@@ -1884,6 +1884,33 @@ ENUMDOC
   SPARC TLS relocations
 
 ENUM
+  BFD_RELOC_SPU_IMM7
+ENUMX
+  BFD_RELOC_SPU_IMM8
+ENUMX
+  BFD_RELOC_SPU_IMM10
+ENUMX
+  BFD_RELOC_SPU_IMM10W
+ENUMX
+  BFD_RELOC_SPU_IMM16
+ENUMX
+  BFD_RELOC_SPU_IMM16W
+ENUMX
+  BFD_RELOC_SPU_IMM18
+ENUMX
+  BFD_RELOC_SPU_PCREL9a
+ENUMX
+  BFD_RELOC_SPU_PCREL9b
+ENUMX
+  BFD_RELOC_SPU_PCREL16
+ENUMX
+  BFD_RELOC_SPU_LO16
+ENUMX
+  BFD_RELOC_SPU_HI16
+ENUMDOC
+  SPU Relocations.
+
+ENUM
   BFD_RELOC_ALPHA_GPDISP_HI16
 ENUMDOC
   Alpha ECOFF and ELF relocations.  Some of these treat the symbol or
Index: bfd/targets.c
===================================================================
RCS file: /cvs/src/src/bfd/targets.c,v
retrieving revision 1.153
diff -u -p -r1.153 targets.c
--- bfd/targets.c	18 Oct 2006 23:58:51 -0000	1.153
+++ bfd/targets.c	24 Oct 2006 23:52:35 -0000
@@ -643,6 +643,7 @@ extern const bfd_target bfd_elf32_shnbsd
 extern const bfd_target bfd_elf32_shvxworks_vec;
 extern const bfd_target bfd_elf32_sparc_vec;
 extern const bfd_target bfd_elf32_sparc_vxworks_vec;
+extern const bfd_target bfd_elf32_spu_vec;
 extern const bfd_target bfd_elf32_tradbigmips_vec;
 extern const bfd_target bfd_elf32_tradlittlemips_vec;
 extern const bfd_target bfd_elf32_us_cris_vec;
@@ -971,6 +972,7 @@ static const bfd_target * const _bfd_tar
 #endif
 	&bfd_elf32_sparc_vec,
 	&bfd_elf32_sparc_vxworks_vec,
+	&bfd_elf32_spu_vec,
 	&bfd_elf32_tradbigmips_vec,
 	&bfd_elf32_tradlittlemips_vec,
 	&bfd_elf32_us_cris_vec,
Index: bfd/po/SRC-POTFILES.in
===================================================================
RCS file: /cvs/src/src/bfd/po/SRC-POTFILES.in,v
retrieving revision 1.40
diff -u -p -r1.40 SRC-POTFILES.in
--- bfd/po/SRC-POTFILES.in	29 Sep 2006 08:04:43 -0000	1.40
+++ bfd/po/SRC-POTFILES.in	24 Oct 2006 23:52:38 -0000
@@ -109,6 +109,7 @@ cpu-s390.c
 cpu-score.c
 cpu-sh.c
 cpu-sparc.c
+cpu-spu.c
 cpu-tic30.c
 cpu-tic4x.c
 cpu-tic54x.c
@@ -176,6 +177,7 @@ elf32-sh64-com.c
 elf32-sh.c
 elf32-sh-symbian.c
 elf32-sparc.c
+elf32-spu.c
 elf32-v850.c
 elf32-vax.c
 elf32-xc16x.c
Index: binutils/Makefile.am
===================================================================
RCS file: /cvs/src/src/binutils/Makefile.am,v
retrieving revision 1.77
diff -u -p -r1.77 Makefile.am
--- binutils/Makefile.am	16 Sep 2006 23:51:50 -0000	1.77
+++ binutils/Makefile.am	25 Oct 2006 00:01:47 -0000
@@ -425,206 +425,232 @@ install-exec-local: install-binPROGRAMS 
 # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
 addr2line.o: addr2line.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h $(INCDIR)/getopt.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/demangle.h bucomm.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
+  bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
   $(INCDIR)/fopen-same.h budemang.h
 ar.o: ar.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/progress.h bucomm.h \
-  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/aout/ar.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
-  arsup.h $(INCDIR)/filenames.h binemul.h
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/progress.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/aout/ar.h $(BFDDIR)/libbfd.h \
+  $(INCDIR)/hashtab.h arsup.h $(INCDIR)/filenames.h binemul.h
 arsup.o: arsup.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h arsup.h $(INCDIR)/libiberty.h bucomm.h \
-  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/filenames.h
+  $(INCDIR)/symcat.h arsup.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/filenames.h
 binemul.o: binemul.c binemul.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
 bucomm.o: bucomm.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h ../bfd/bfdver.h $(INCDIR)/libiberty.h \
-  bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+  $(INCDIR)/ansidecl.h bucomm.h $(INCDIR)/ansidecl.h \
+  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
   $(INCDIR)/filenames.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
 budemang.o: budemang.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
-  budemang.h
+  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/demangle.h $(INCDIR)/libiberty.h budemang.h
 coffdump.o: coffdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h coffgrok.h \
-  bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  coffgrok.h bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h
 coffgrok.o: coffgrok.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/coff/internal.h \
-  $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h coffgrok.h
+  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
+  $(INCDIR)/bfdlink.h coffgrok.h
 cxxfilt.o: cxxfilt.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/demangle.h $(INCDIR)/safe-ctype.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/demangle.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 dwarf.o: dwarf.c dwarf.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h $(INCDIR)/elf/dwarf2.h bucomm.h \
-  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/libiberty.h
+  $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 debug.o: debug.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h debug.h
 dlltool.o: dlltool.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/demangle.h \
+  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
   $(INCDIR)/dyn-string.h dlltool.h $(INCDIR)/safe-ctype.h
 dllwrap.o: dllwrap.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/dyn-string.h
+  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/dyn-string.h
 emul_aix.o: emul_aix.c binemul.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/bfdlink.h $(INCDIR)/coff/internal.h \
-  $(INCDIR)/coff/xcoff.h $(BFDDIR)/libcoff.h $(BFDDIR)/libxcoff.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/bfdlink.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/xcoff.h $(BFDDIR)/libcoff.h \
+  $(INCDIR)/bfdlink.h $(BFDDIR)/libxcoff.h
 emul_vanilla.o: emul_vanilla.c binemul.h ../bfd/bfd.h \
-  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h \
+  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
 filemode.o: filemode.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
 ieee.o: ieee.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
-  $(INCDIR)/ieee.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
-  budbg.h $(INCDIR)/filenames.h
+  $(INCDIR)/ieee.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h debug.h budbg.h $(INCDIR)/filenames.h
 is-ranlib.o: is-ranlib.c
 is-strip.o: is-strip.c
 maybe-ranlib.o: maybe-ranlib.c
 maybe-strip.o: maybe-strip.c
 nlmconv.o: nlmconv.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h \
-  $(BFDDIR)/libnlm.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
-  $(INCDIR)/nlm/external.h nlmconv.h
+  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h $(BFDDIR)/libnlm.h \
+  $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h $(INCDIR)/nlm/external.h \
+  nlmconv.h
 nm.o: nm.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
-  $(INCDIR)/progress.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h budemang.h $(INCDIR)/aout/stab_gnu.h \
-  $(INCDIR)/aout/stab.def $(INCDIR)/aout/ranlib.h $(INCDIR)/demangle.h \
-  $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
-  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
+  $(INCDIR)/progress.h bucomm.h $(INCDIR)/ansidecl.h \
+  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+  budemang.h $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def \
+  $(INCDIR)/aout/ranlib.h $(INCDIR)/demangle.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/common.h
 not-ranlib.o: not-ranlib.c
 not-strip.o: not-strip.c
 objcopy.o: objcopy.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/progress.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
-  budbg.h $(INCDIR)/filenames.h $(INCDIR)/fnmatch.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/symcat.h $(INCDIR)/progress.h bucomm.h $(INCDIR)/ansidecl.h \
+  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h budbg.h \
+  $(INCDIR)/filenames.h $(INCDIR)/fnmatch.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
 objdump.o: objdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h ../bfd/bfdver.h $(INCDIR)/progress.h \
-  bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  dwarf.h $(INCDIR)/elf/dwarf2.h budemang.h $(INCDIR)/safe-ctype.h \
-  $(INCDIR)/dis-asm.h $(INCDIR)/libiberty.h $(INCDIR)/demangle.h \
-  debug.h budbg.h $(INCDIR)/aout/aout64.h
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h dwarf.h $(INCDIR)/elf/dwarf2.h \
+  budemang.h $(INCDIR)/safe-ctype.h $(INCDIR)/dis-asm.h \
+  ../bfd/bfd.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/demangle.h $(INCDIR)/libiberty.h debug.h \
+  budbg.h $(INCDIR)/aout/aout64.h
 prdbg.o: prdbg.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
-  budbg.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h debug.h budbg.h
 rdcoff.o: rdcoff.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h $(INCDIR)/coff/internal.h bucomm.h \
-  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/libiberty.h debug.h budbg.h $(BFDDIR)/libcoff.h \
-  $(INCDIR)/bfdlink.h
+  $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  debug.h budbg.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
 rddbg.o: rddbg.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h debug.h \
-  budbg.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h debug.h budbg.h
 readelf.o: readelf.c dwarf.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/alpha.h \
   $(INCDIR)/elf/reloc-macros.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/arm.h \
   $(INCDIR)/elf/avr.h $(INCDIR)/elf/bfin.h $(INCDIR)/elf/cris.h \
-  $(INCDIR)/elf/d10v.h $(INCDIR)/elf/d30v.h $(INCDIR)/elf/dlx.h \
-  $(INCDIR)/elf/fr30.h $(INCDIR)/elf/frv.h $(INCDIR)/elf/h8.h \
-  $(INCDIR)/elf/hppa.h $(INCDIR)/elf/i386.h $(INCDIR)/elf/i370.h \
-  $(INCDIR)/elf/i860.h $(INCDIR)/elf/i960.h $(INCDIR)/elf/ia64.h \
-  $(INCDIR)/elf/ip2k.h $(INCDIR)/elf/m32c.h $(INCDIR)/elf/m32r.h \
-  $(INCDIR)/elf/m68k.h $(INCDIR)/elf/m68hc11.h $(INCDIR)/elf/mcore.h \
-  $(INCDIR)/elf/mips.h $(INCDIR)/elf/mmix.h $(INCDIR)/elf/mn10200.h \
-  $(INCDIR)/elf/mn10300.h $(INCDIR)/elf/mt.h $(INCDIR)/elf/msp430.h \
-  $(INCDIR)/elf/or32.h $(INCDIR)/elf/pj.h $(INCDIR)/elf/ppc.h \
-  $(INCDIR)/elf/ppc64.h $(INCDIR)/elf/s390.h $(INCDIR)/elf/score.h $(INCDIR)/elf/sh.h \
-  $(INCDIR)/elf/sparc.h $(INCDIR)/elf/v850.h $(INCDIR)/elf/vax.h \
-  $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/xstormy16.h $(INCDIR)/elf/crx.h \
-  $(INCDIR)/elf/iq2000.h $(INCDIR)/elf/xtensa.h $(INCDIR)/aout/ar.h \
-  bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/libiberty.h unwind-ia64.h
+  $(INCDIR)/elf/crx.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/d30v.h \
+  $(INCDIR)/elf/dlx.h $(INCDIR)/elf/fr30.h $(INCDIR)/elf/frv.h \
+  $(INCDIR)/elf/h8.h $(INCDIR)/elf/hppa.h $(INCDIR)/elf/i386.h \
+  $(INCDIR)/elf/i370.h $(INCDIR)/elf/i860.h $(INCDIR)/elf/i960.h \
+  $(INCDIR)/elf/ia64.h $(INCDIR)/elf/ip2k.h $(INCDIR)/elf/iq2000.h \
+  $(INCDIR)/elf/m32c.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/m68k.h \
+  $(INCDIR)/elf/m68hc11.h $(INCDIR)/elf/mcore.h $(INCDIR)/elf/mips.h \
+  $(INCDIR)/elf/mmix.h $(INCDIR)/elf/mn10200.h $(INCDIR)/elf/mn10300.h \
+  $(INCDIR)/elf/mt.h $(INCDIR)/elf/msp430.h $(INCDIR)/elf/or32.h \
+  $(INCDIR)/elf/pj.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/ppc64.h \
+  $(INCDIR)/elf/s390.h $(INCDIR)/elf/score.h $(INCDIR)/elf/sh.h \
+  $(INCDIR)/elf/sparc.h $(INCDIR)/elf/spu.h $(INCDIR)/elf/v850.h \
+  $(INCDIR)/elf/vax.h $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/xstormy16.h \
+  $(INCDIR)/elf/xtensa.h $(INCDIR)/aout/ar.h bucomm.h \
+  $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  unwind-ia64.h
 rename.o: rename.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
 resbin.o: resbin.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
-  winduni.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h windres.h winduni.h
 rescoff.o: rescoff.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
-  winduni.h $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h \
-  $(INCDIR)/bfdlink.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h windres.h winduni.h $(INCDIR)/coff/internal.h \
+  $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
 resrc.o: resrc.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
-  windres.h winduni.h
-resres.o: resres.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h windres.h \
   winduni.h
+resres.o: resres.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h windres.h winduni.h
 size.o: size.c ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
-  bucomm.h config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/libiberty.h
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 srconv.o: srconv.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h sysroff.h coffgrok.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h sysroff.h \
+  coffgrok.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
   sysroff.c
 stabs.o: stabs.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
-  $(INCDIR)/demangle.h debug.h budbg.h $(INCDIR)/filenames.h \
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h $(INCDIR)/demangle.h \
+  $(INCDIR)/libiberty.h debug.h budbg.h $(INCDIR)/filenames.h \
   $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def
 strings.o: strings.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h $(INCDIR)/getopt.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/safe-ctype.h
+  $(INCDIR)/symcat.h $(INCDIR)/getopt.h bucomm.h $(INCDIR)/ansidecl.h \
+  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 sysdump.o: sysdump.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h \
-  sysroff.h sysroff.c
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/safe-ctype.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h sysroff.h \
+  sysroff.c $(INCDIR)/ansidecl.h
 version.o: version.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h ../bfd/bfdver.h bucomm.h config.h \
-  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
+  $(INCDIR)/symcat.h ../bfd/bfdver.h bucomm.h $(INCDIR)/ansidecl.h \
+  config.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h
 windres.o: windres.c config.h ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h \
-  windres.h winduni.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h $(INCDIR)/bin-bugs.h \
+  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/safe-ctype.h $(INCDIR)/obstack.h windres.h \
+  winduni.h
 winduni.o: winduni.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h winduni.h $(INCDIR)/safe-ctype.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h winduni.h \
+  $(INCDIR)/safe-ctype.h
 wrstabs.o: wrstabs.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
-  debug.h budbg.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h debug.h \
+  budbg.h $(INCDIR)/aout/aout64.h $(INCDIR)/aout/stab_gnu.h \
   $(INCDIR)/aout/stab.def
 arparse.o: arparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h arsup.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h arsup.h
 arlex.o: arlex.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
-  arparse.h
+  $(INCDIR)/ansidecl.h arparse.h
 sysroff.o: sysroff.c
 sysinfo.o: sysinfo.c
 syslex.o: syslex.c config.h sysinfo.h
 defparse.o: defparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h dlltool.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h dlltool.h
 deflex.o: deflex.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
-  defparse.h dlltool.h
+  defparse.h dlltool.h $(INCDIR)/ansidecl.h
 nlmheader.o: nlmheader.c $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
-  ../bfd/bfd.h $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
+  ../bfd/bfd.h $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  bucomm.h $(INCDIR)/ansidecl.h config.h $(INCDIR)/bin-bugs.h \
   $(INCDIR)/fopen-same.h $(INCDIR)/nlm/common.h $(INCDIR)/nlm/internal.h \
   nlmconv.h
 rcparse.o: rcparse.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h windres.h \
-  winduni.h $(INCDIR)/safe-ctype.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h windres.h winduni.h $(INCDIR)/safe-ctype.h
 rclex.o: rclex.c ../bfd/bfd.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h bucomm.h config.h $(INCDIR)/bin-bugs.h \
-  $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h \
-  windres.h winduni.h rcparse.h
+  $(INCDIR)/symcat.h bucomm.h $(INCDIR)/ansidecl.h config.h \
+  $(INCDIR)/bin-bugs.h $(INCDIR)/fopen-same.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h windres.h \
+  winduni.h rcparse.h
 # IF YOU PUT ANYTHING HERE IT WILL GO AWAY
Index: binutils/readelf.c
===================================================================
RCS file: /cvs/src/src/binutils/readelf.c,v
retrieving revision 1.349
diff -u -p -r1.349 readelf.c
--- binutils/readelf.c	4 Oct 2006 11:50:43 -0000	1.349
+++ binutils/readelf.c	24 Oct 2006 23:52:45 -0000
@@ -107,6 +107,7 @@
 #include "elf/score.h"
 #include "elf/sh.h"
 #include "elf/sparc.h"
+#include "elf/spu.h"
 #include "elf/v850.h"
 #include "elf/vax.h"
 #include "elf/x86-64.h"
@@ -555,89 +556,90 @@ guess_is_rela (unsigned long e_machine)
   switch (e_machine)
     {
       /* Targets that use REL relocations.  */
-    case EM_ARM:
     case EM_386:
     case EM_486:
     case EM_960:
-    case EM_DLX:
-    case EM_OPENRISC:
-    case EM_OR32:
-    case EM_CYGNUS_M32R:
+    case EM_ARM:
     case EM_D10V:
     case EM_CYGNUS_D10V:
+    case EM_DLX:
     case EM_MIPS:
     case EM_MIPS_RS3_LE:
+    case EM_CYGNUS_M32R:
+    case EM_OPENRISC:
+    case EM_OR32:
     case EM_SCORE:
       return FALSE;
 
       /* Targets that use RELA relocations.  */
     case EM_68K:
-    case EM_H8_300:
-    case EM_H8_300H:
-    case EM_H8S:
-    case EM_SPARC32PLUS:
-    case EM_SPARCV9:
-    case EM_SPARC:
-    case EM_PPC:
-    case EM_PPC64:
-    case EM_V850:
-    case EM_CYGNUS_V850:
+    case EM_860:
+    case EM_ALPHA:
+    case EM_ALTERA_NIOS2:
+    case EM_AVR:
+    case EM_AVR_OLD:
+    case EM_BLACKFIN:
+    case EM_CRIS:
+    case EM_CRX:
     case EM_D30V:
     case EM_CYGNUS_D30V:
-    case EM_MN10200:
-    case EM_CYGNUS_MN10200:
-    case EM_MN10300:
-    case EM_CYGNUS_MN10300:
     case EM_FR30:
     case EM_CYGNUS_FR30:
     case EM_CYGNUS_FRV:
-    case EM_SH:
-    case EM_ALPHA:
-    case EM_MCORE:
+    case EM_H8S:
+    case EM_H8_300:
+    case EM_H8_300H:
     case EM_IA_64:
-    case EM_AVR:
-    case EM_AVR_OLD:
-    case EM_CRIS:
-    case EM_860:
-    case EM_X86_64:
-    case EM_S390:
-    case EM_S390_OLD:
-    case EM_MMIX:
-    case EM_MSP430:
-    case EM_MSP430_OLD:
-    case EM_XSTORMY16:
-    case EM_CRX:
-    case EM_VAX:
     case EM_IP2K:
     case EM_IP2K_OLD:
     case EM_IQ2000:
-    case EM_XTENSA:
-    case EM_XTENSA_OLD:
-    case EM_M32R:
     case EM_M32C:
+    case EM_M32R:
+    case EM_MCORE:
+    case EM_MMIX:
+    case EM_MN10200:
+    case EM_CYGNUS_MN10200:
+    case EM_MN10300:
+    case EM_CYGNUS_MN10300:
+    case EM_MSP430:
+    case EM_MSP430_OLD:
     case EM_MT:
-    case EM_BLACKFIN:
     case EM_NIOS32:
-    case EM_ALTERA_NIOS2:
+    case EM_PPC64:
+    case EM_PPC:
+    case EM_S390:
+    case EM_S390_OLD:
+    case EM_SH:
+    case EM_SPARC:
+    case EM_SPARC32PLUS:
+    case EM_SPARCV9:
+    case EM_SPU:
+    case EM_V850:
+    case EM_CYGNUS_V850:
+    case EM_VAX:
+    case EM_X86_64:
+    case EM_XSTORMY16:
+    case EM_XTENSA:
+    case EM_XTENSA_OLD:
       return TRUE;
 
+    case EM_68HC05:
+    case EM_68HC08:
+    case EM_68HC11:
+    case EM_68HC16:
+    case EM_FX66:
+    case EM_ME16:
     case EM_MMA:
-    case EM_PCP:
     case EM_NCPU:
     case EM_NDR1:
-    case EM_STARCORE:
-    case EM_ME16:
+    case EM_PCP:
     case EM_ST100:
-    case EM_TINYJ:
-    case EM_FX66:
-    case EM_ST9PLUS:
+    case EM_ST19:
     case EM_ST7:
-    case EM_68HC16:
-    case EM_68HC11:
-    case EM_68HC08:
-    case EM_68HC05:
+    case EM_ST9PLUS:
+    case EM_STARCORE:
     case EM_SVX:
-    case EM_ST19:
+    case EM_TINYJ:
     default:
       warn (_("Don't know about relocations on this machine architecture\n"));
       return FALSE;
@@ -972,6 +974,10 @@ dump_relocations (FILE *file,
 	  rtype = elf_sparc_reloc_type (type);
 	  break;
 
+	case EM_SPU:
+	  rtype = elf_spu_reloc_type (type);
+	  break;
+
 	case EM_V850:
 	case EM_CYGNUS_V850:
 	  rtype = v850_reloc_type (type);
@@ -1638,6 +1644,7 @@ get_machine_name (unsigned e_machine)
     case EM_NONE:		return _("None");
     case EM_M32:		return "WE32100";
     case EM_SPARC:		return "Sparc";
+    case EM_SPU:		return "SPU";
     case EM_386:		return "Intel 80386";
     case EM_68K:		return "MC68000";
     case EM_88K:		return "MC88000";
Index: gas/Makefile.am
===================================================================
RCS file: /cvs/src/src/gas/Makefile.am,v
retrieving revision 1.137
diff -u -p -r1.137 Makefile.am
--- gas/Makefile.am	16 Sep 2006 23:51:50 -0000	1.137
+++ gas/Makefile.am	25 Oct 2006 00:04:00 -0000
@@ -81,6 +81,7 @@ CPU_TYPES = \
 	sh \
 	sh64 \
 	sparc \
+	spu \
 	tic30 \
 	tic4x \
 	tic54x \
@@ -269,6 +270,7 @@ TARGET_CPU_CFILES = \
 	config/tc-sh.c \
 	config/tc-sh64.c \
 	config/tc-sparc.c \
+	config/tc-spu.c \
 	config/tc-tic30.c \
 	config/tc-tic54x.c \
 	config/tc-vax.c \
@@ -321,6 +323,7 @@ TARGET_CPU_HFILES = \
 	config/tc-sh.h \
 	config/tc-sh64.h \
 	config/tc-sparc.h \
+	config/tc-spu.h \
 	config/tc-tic30.h \
 	config/tc-tic54x.h \
 	config/tc-vax.h \
@@ -989,9 +992,9 @@ dep-am: DEP
 AMKDEP = #DO NOT PUT ANYTHING BETWEEN THIS LINE AND THE MATCHING WARNING BELOW.
 DEPTC_alpha_ecoff = $(srcdir)/config/obj-ecoff.h $(srcdir)/config/tc-alpha.h \
   ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/opcode/alpha.h \
-  dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/safe-ctype.h \
-  $(srcdir)/config/atof-vax.c
+  subsegs.h $(INCDIR)/obstack.h struc-symbol.h ecoff.h \
+  $(INCDIR)/opcode/alpha.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
+  $(INCDIR)/safe-ctype.h $(srcdir)/config/atof-vax.c
 DEPTC_alpha_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-alpha.h subsegs.h \
@@ -1008,20 +1011,22 @@ DEPTC_arc_elf = $(srcdir)/config/obj-elf
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h dwarf2dbg.h \
   struc-symbol.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
   $(INCDIR)/opcode/arc.h $(srcdir)/../opcodes/arc-ext.h \
-  $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
 DEPTC_arm_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-arm.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h \
+  dwarf2dbg.h
 DEPTC_arm_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-arm.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/arm.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h \
+  dwarf2dbg.h
 DEPTC_arm_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arm.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h \
-  $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h \
-  dw2gencfi.h $(INCDIR)/elf/dwarf2.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h $(INCDIR)/opcode/arm.h \
+  $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h dw2gencfi.h \
+  $(INCDIR)/elf/dwarf2.h dwarf2dbg.h
 DEPTC_avr_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h dwarf2dbg.h \
@@ -1031,9 +1036,10 @@ DEPTC_bfin_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h dwarf2dbg.h \
   struc-symbol.h $(srcdir)/config/bfin-defs.h $(INCDIR)/obstack.h \
-  $(INCDIR)/safe-ctype.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
-  $(INCDIR)/elf/bfin.h $(INCDIR)/elf/reloc-macros.h $(srcdir)/config/bfin-aux.h \
-  $(INCDIR)/opcode/bfin.h
+  $(INCDIR)/safe-ctype.h dwarf2dbg.h $(BFDDIR)/libbfd.h \
+  $(INCDIR)/hashtab.h $(INCDIR)/elf/common.h $(INCDIR)/elf/bfin.h \
+  $(INCDIR)/elf/reloc-macros.h $(srcdir)/config/bfin-aux.h \
+  $(srcdir)/config/bfin-defs.h $(INCDIR)/opcode/bfin.h
 DEPTC_cris_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-cris.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
   subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/cris.h \
@@ -1042,12 +1048,12 @@ DEPTC_cris_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  $(INCDIR)/opcode/cris.h
+  $(INCDIR)/opcode/cris.h dwarf2dbg.h
 DEPTC_crx_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h dwarf2dbg.h \
-  $(INCDIR)/safe-ctype.h $(INCDIR)/opcode/crx.h $(INCDIR)/elf/crx.h \
-  $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/safe-ctype.h dwarf2dbg.h $(INCDIR)/opcode/crx.h \
+  $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h
 DEPTC_d10v_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d10v.h $(INCDIR)/safe-ctype.h \
@@ -1060,21 +1066,22 @@ DEPTC_d30v_elf = $(srcdir)/config/obj-el
 DEPTC_dlx_elf = $(INCDIR)/safe-ctype.h $(srcdir)/config/obj-elf.h \
   $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
   $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-dlx.h \
-  dwarf2dbg.h $(INCDIR)/opcode/dlx.h
+  dwarf2dbg.h $(srcdir)/config/tc-dlx.h $(INCDIR)/opcode/dlx.h
 DEPTC_fr30_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
   $(srcdir)/../opcodes/fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/fr30-opc.h \
-  cgen.h
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(srcdir)/../opcodes/fr30-opc.h cgen.h
 DEPTC_frv_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-frv.h subsegs.h \
   $(INCDIR)/obstack.h $(srcdir)/../opcodes/frv-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  $(srcdir)/../opcodes/frv-opc.h cgen.h $(BFDDIR)/libbfd.h \
-  $(INCDIR)/hashtab.h $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/frv-opc.h \
+  cgen.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h $(INCDIR)/elf/common.h \
+  $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
 DEPTC_h8300_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-h8300.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/h8300.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
@@ -1082,14 +1089,15 @@ DEPTC_h8300_coff = $(srcdir)/config/obj-
 DEPTC_h8300_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h dwarf2dbg.h \
-  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/h8300.h \
+  subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h $(INCDIR)/opcode/h8300.h \
   $(INCDIR)/safe-ctype.h $(INCDIR)/elf/h8.h $(INCDIR)/elf/reloc-macros.h
 DEPTC_hppa_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h $(BFDDIR)/elf32-hppa.h \
-  $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h \
-  $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  $(INCDIR)/opcode/hppa.h dwarf2dbg.h
+  $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
+  subsegs.h $(INCDIR)/obstack.h $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h \
+  dwarf2dbg.h
 DEPTC_i370_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h dwarf2dbg.h \
@@ -1102,7 +1110,7 @@ DEPTC_i386_aout = $(srcdir)/config/obj-a
   $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h $(INCDIR)/elf/x86-64.h \
   $(INCDIR)/elf/reloc-macros.h
 DEPTC_i386_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i386.h \
-  $(INCDIR)/coff/internal.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
   subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h dw2gencfi.h \
   $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h $(INCDIR)/elf/x86-64.h \
@@ -1111,7 +1119,7 @@ DEPTC_i386_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h \
+  dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/i386.h \
   $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/reloc-macros.h
 DEPTC_i860_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
@@ -1130,21 +1138,24 @@ DEPTC_ia64_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ia64.h $(INCDIR)/opcode/ia64.h \
   $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
-  dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h
+  dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/ia64.h \
+  $(INCDIR)/elf/ia64.h
 DEPTC_ip2k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h dwarf2dbg.h \
   subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/ip2k-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  $(srcdir)/../opcodes/ip2k-opc.h cgen.h $(INCDIR)/elf/ip2k.h \
+  $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/ip2k-opc.h \
+  cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/ip2k.h \
   $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
 DEPTC_m32c_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h dwarf2dbg.h \
   subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32c-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  $(srcdir)/../opcodes/m32c-opc.h $(srcdir)/../opcodes/cgen-types.h \
-  $(srcdir)/../opcodes/cgen-ops.h cgen.h $(INCDIR)/elf/m32c.h \
+  $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/m32c-opc.h \
+  $(srcdir)/../opcodes/cgen-types.h $(srcdir)/../opcodes/cgen-ops.h \
+  cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/m32c.h \
   $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h \
   $(INCDIR)/safe-ctype.h
 DEPTC_m32r_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
@@ -1152,33 +1163,38 @@ DEPTC_m32r_elf = $(srcdir)/config/obj-el
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
   $(srcdir)/../opcodes/m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \
-  cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(srcdir)/../opcodes/m32r-opc.h cgen.h $(INCDIR)/elf/m32r.h \
+  $(INCDIR)/elf/reloc-macros.h
 DEPTC_m68hc11_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  $(INCDIR)/opcode/m68hc11.h $(INCDIR)/elf/m68hc11.h \
+  $(INCDIR)/opcode/m68hc11.h dwarf2dbg.h $(INCDIR)/elf/m68hc11.h \
   $(INCDIR)/elf/reloc-macros.h
 DEPTC_m68k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
-  $(INCDIR)/obstack.h subsegs.h dwarf2dbg.h dw2gencfi.h \
-  $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
+  $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h \
+  dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+  $(srcdir)/config/m68k-parse.h
 DEPTC_m68k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m68k.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
-  $(INCDIR)/obstack.h subsegs.h dwarf2dbg.h dw2gencfi.h \
-  $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h
+  $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h \
+  dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+  $(srcdir)/config/m68k-parse.h
 DEPTC_m68k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68k.h $(INCDIR)/safe-ctype.h \
-  $(INCDIR)/obstack.h subsegs.h dwarf2dbg.h dw2gencfi.h \
-  $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h $(srcdir)/config/m68k-parse.h \
-  $(INCDIR)/elf/m68k.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h \
+  dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/m68k.h \
+  $(srcdir)/config/m68k-parse.h $(INCDIR)/elf/m68k.h \
+  $(INCDIR)/elf/reloc-macros.h
 DEPTC_maxq_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-maxq.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/maxq.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h $(INCDIR)/opcode/maxq.h
+  subsegs.h $(INCDIR)/obstack.h dwarf2dbg.h $(srcdir)/config/tc-maxq.h \
+  $(INCDIR)/opcode/maxq.h
 DEPTC_mcore_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mcore.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/mcore.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
@@ -1202,20 +1218,21 @@ DEPTC_mips_ecoff = $(srcdir)/config/obj-
   $(INCDIR)/opcode/mips.h itbl-ops.h dwarf2dbg.h dw2gencfi.h \
   $(INCDIR)/elf/dwarf2.h $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
+  ecoff.h
 DEPTC_mips_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mips.h subsegs.h \
   $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h $(INCDIR)/opcode/mips.h \
   itbl-ops.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
-  $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h ecoff.h \
-  $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h
+  $(srcdir)/config/obj-elf.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h \
+  ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h
 DEPTC_mmix_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h dwarf2dbg.h \
   subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/mmix.h \
   $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/mmix.h \
-  $(INCDIR)/safe-ctype.h
+  $(INCDIR)/safe-ctype.h dwarf2dbg.h $(INCDIR)/obstack.h
 DEPTC_mn10200_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10200.h dwarf2dbg.h \
@@ -1225,19 +1242,20 @@ DEPTC_mn10300_elf = $(srcdir)/config/obj
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  $(INCDIR)/opcode/mn10300.h
+  $(INCDIR)/opcode/mn10300.h dwarf2dbg.h
 DEPTC_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h dwarf2dbg.h \
   subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h \
-  $(INCDIR)/safe-ctype.h
+  $(INCDIR)/safe-ctype.h dwarf2dbg.h
 DEPTC_mt_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mt.h dwarf2dbg.h \
-  subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/mt-desc.h \
+  dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/mt-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  $(srcdir)/../opcodes/mt-opc.h cgen.h $(INCDIR)/elf/mt.h \
-  $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
+  $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/mt-opc.h \
+  cgen.h $(INCDIR)/elf/common.h $(INCDIR)/elf/mt.h $(INCDIR)/elf/reloc-macros.h \
+  $(BFDDIR)/libbfd.h $(INCDIR)/hashtab.h
 DEPTC_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/ns32k.h \
   $(INCDIR)/obstack.h
@@ -1246,7 +1264,8 @@ DEPTC_openrisc_elf = $(srcdir)/config/ob
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
   dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/openrisc-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  $(srcdir)/../opcodes/openrisc-opc.h cgen.h
+  $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/openrisc-opc.h \
+  cgen.h
 DEPTC_or32_coff = $(INCDIR)/safe-ctype.h $(srcdir)/config/obj-coff.h \
   $(srcdir)/config/tc-or32.h $(INCDIR)/coff/internal.h \
   $(INCDIR)/coff/or32.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
@@ -1277,20 +1296,20 @@ DEPTC_ppc_elf = $(srcdir)/config/obj-elf
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
   dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/ppc.h \
-  $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h
 DEPTC_s390_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h $(INCDIR)/opcode/s390.h \
-  $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h
-DEPTC_score_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h  \
-  $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
-  $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h \
-  $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h  \
-  $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h \
-  dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
-  $(INCDIR)/opcode/score-inst.h $(INCDIR)/opcode/score-datadep.h
+  struc-symbol.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
+  $(INCDIR)/opcode/s390.h $(INCDIR)/elf/s390.h $(INCDIR)/elf/reloc-macros.h
+DEPTC_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
+  $(INCDIR)/opcode/score-inst.h $(INCDIR)/opcode/score-datadep.h \
+  struc-symbol.h $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h \
+  dwarf2dbg.h
 DEPTC_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h \
@@ -1308,8 +1327,8 @@ DEPTC_sh64_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf32-sh64.h \
   $(INCDIR)/safe-ctype.h $(srcdir)/../opcodes/sh64-opc.h \
   $(srcdir)/config/tc-sh.c subsegs.h $(INCDIR)/obstack.h \
-  $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h \
-  dw2gencfi.h $(INCDIR)/elf/dwarf2.h
+  $(srcdir)/../opcodes/sh-opc.h $(INCDIR)/safe-ctype.h \
+  struc-symbol.h dwarf2dbg.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h
 DEPTC_sparc_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-sparc.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
   subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/sparc.h \
@@ -1324,7 +1343,14 @@ DEPTC_sparc_elf = $(srcdir)/config/obj-e
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
   $(INCDIR)/opcode/sparc.h dw2gencfi.h $(INCDIR)/elf/dwarf2.h \
-  $(INCDIR)/elf/sparc.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/elf/sparc.h $(INCDIR)/elf/reloc-macros.h \
+  dwarf2dbg.h
+DEPTC_spu_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(srcdir)/config/tc-spu.h dwarf2dbg.h \
+  $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+  $(INCDIR)/opcode/spu.h $(INCDIR)/opcode/spu-insns.h \
+  dwarf2dbg.h $(INCDIR)/opcode/spu-insns.h
 DEPTC_tic30_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-tic30.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
   $(INCDIR)/opcode/tic30.h
@@ -1336,46 +1362,50 @@ DEPTC_tic4x_coff = $(INCDIR)/safe-ctype.
   $(srcdir)/config/tc-tic4x.h $(INCDIR)/coff/internal.h \
   $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h $(BFDDIR)/libcoff.h \
   $(INCDIR)/bfdlink.h $(INCDIR)/opcode/tic4x.h subsegs.h \
-  $(INCDIR)/obstack.h
+  $(INCDIR)/obstack.h $(INCDIR)/obstack.h
 DEPTC_tic54x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic54x.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
   sb.h macro.h subsegs.h $(INCDIR)/obstack.h struc-symbol.h \
-  $(INCDIR)/opcode/tic54x.h
+  $(INCDIR)/opcode/tic54x.h $(srcdir)/config/obj-coff.h
 DEPTC_v850_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h $(INCDIR)/elf/v850.h \
   $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/v850.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/v850.h \
+  dwarf2dbg.h
 DEPTC_vax_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-vax.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(srcdir)/config/vax-inst.h \
-  $(INCDIR)/obstack.h subsegs.h $(INCDIR)/safe-ctype.h \
+  $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
   $(INCDIR)/opcode/vax.h
 DEPTC_vax_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h dwarf2dbg.h \
   $(srcdir)/config/vax-inst.h $(INCDIR)/obstack.h subsegs.h \
-  $(INCDIR)/safe-ctype.h $(INCDIR)/elf/vax.h $(INCDIR)/elf/reloc-macros.h \
-  $(INCDIR)/opcode/vax.h
+  $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h $(INCDIR)/elf/vax.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/vax.h
 DEPTC_xc16x_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
   $(srcdir)/../opcodes/xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/xc16x-opc.h \
-  cgen.h $(INCDIR)/elf/xc16x.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(srcdir)/../opcodes/xc16x-opc.h cgen.h dwarf2dbg.h \
+  $(INCDIR)/elf/xc16x.h $(INCDIR)/elf/reloc-macros.h
 DEPTC_xstormy16_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
   dwarf2dbg.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/xstormy16-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  $(srcdir)/../opcodes/xstormy16-opc.h cgen.h
+  $(INCDIR)/opcode/cgen-bitset.h $(srcdir)/../opcodes/xstormy16-opc.h \
+  cgen.h
 DEPTC_xtensa_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h $(INCDIR)/xtensa-isa.h \
   $(INCDIR)/xtensa-config.h sb.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h $(srcdir)/config/xtensa-relax.h \
-  $(srcdir)/config/xtensa-istack.h dwarf2dbg.h struc-symbol.h
+  $(srcdir)/config/tc-xtensa.h subsegs.h $(INCDIR)/obstack.h \
+  $(srcdir)/config/xtensa-relax.h $(srcdir)/config/xtensa-istack.h \
+  dwarf2dbg.h struc-symbol.h $(INCDIR)/xtensa-config.h
 DEPTC_z80_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z80.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/z80.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \
@@ -1399,8 +1429,8 @@ DEPOBJ_alpha_ecoff = $(srcdir)/config/ob
 DEPOBJ_alpha_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-alpha.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h \
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h \
   $(INCDIR)/elf/alpha.h $(INCDIR)/elf/reloc-macros.h \
   $(INCDIR)/aout/aout64.h
 DEPOBJ_alpha_evax = $(srcdir)/config/obj-evax.h $(srcdir)/config/tc-alpha.h
@@ -1408,29 +1438,29 @@ DEPOBJ_arc_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arc.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_arm_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-arm.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
 DEPOBJ_arm_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-arm.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/arm.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_arm_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-arm.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_avr_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_bfin_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_cris_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-cris.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
@@ -1438,139 +1468,140 @@ DEPOBJ_cris_elf = $(srcdir)/config/obj-e
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-cris.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_crx_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-crx.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_d10v_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d10v.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_d30v_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-d30v.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_dlx_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-dlx.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_fr30_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-fr30.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_frv_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-frv.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_h8300_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-h8300.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/h8300.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_h8300_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-h8300.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_hppa_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h $(BFDDIR)/elf32-hppa.h \
-  $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h \
-  $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+  $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_i370_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/elf/i370.h $(INCDIR)/elf/reloc-macros.h \
-  $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/i370.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
 DEPOBJ_i386_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-i386.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
 DEPOBJ_i386_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i386.h \
-  $(INCDIR)/coff/internal.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_i386_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/elf/x86-64.h $(INCDIR)/elf/reloc-macros.h \
-  $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/x86-64.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
 DEPOBJ_i860_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i860.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_i960_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i960.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/i960.h $(BFDDIR)/libcoff.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
+  $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_i960_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i960.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_ia64_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ia64.h $(INCDIR)/opcode/ia64.h \
   $(INCDIR)/elf/ia64.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_ip2k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ip2k.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_m32c_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32c.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_m32r_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_m68hc11_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68hc11.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_m68k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-m68k.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
 DEPOBJ_m68k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-m68k.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_m68k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m68k.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_maxq_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-maxq.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/maxq.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_mcore_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mcore.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/mcore.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_mcore_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mcore.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_mips_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-mips.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/mipspe.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_mips_ecoff = $(srcdir)/config/obj-ecoff.h $(srcdir)/config/tc-mips.h \
   ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h \
   $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
@@ -1578,34 +1609,34 @@ DEPOBJ_mips_ecoff = $(srcdir)/config/obj
 DEPOBJ_mips_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mips.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h \
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h ecoff.h $(INCDIR)/coff/sym.h $(INCDIR)/coff/ecoff.h \
   $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
 DEPOBJ_mmix_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mmix.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_mn10200_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10200.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_mn10300_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mn10300.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_msp430_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_mt_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-mt.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
@@ -1613,15 +1644,15 @@ DEPOBJ_openrisc_elf = $(srcdir)/config/o
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h \
   dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_or32_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-or32.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/or32.h $(BFDDIR)/libcoff.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
+  $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_or32_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-or32.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
@@ -1629,73 +1660,84 @@ DEPOBJ_pdp11_elf = $(srcdir)/config/obj-
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pdp11.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_pj_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-pj.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_ppc_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ppc.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/rs6000.h $(BFDDIR)/libcoff.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h
+  $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_ppc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-ppc.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/elf/ppc.h $(INCDIR)/elf/reloc-macros.h \
-  $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/elf/ppc.h \
+  $(INCDIR)/elf/reloc-macros.h $(INCDIR)/aout/aout64.h
 DEPOBJ_s390_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+DEPOBJ_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \
+  $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_sh_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h \
-  $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_sh64_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh64.h $(srcdir)/config/tc-sh.h \
   $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf32-sh64.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_sparc_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-sparc.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
 DEPOBJ_sparc_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sparc.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/sparc.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_sparc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+DEPOBJ_spu_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(srcdir)/config/tc-spu.h dwarf2dbg.h \
+  $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_tic30_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-tic30.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
 DEPOBJ_tic30_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic30.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic30.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_tic4x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic4x.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic4x.h $(INCDIR)/coff/ti.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_tic54x_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic54x.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_v850_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-v850.h $(INCDIR)/elf/v850.h \
   $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h $(INCDIR)/safe-ctype.h \
-  subsegs.h $(INCDIR)/obstack.h struc-symbol.h $(INCDIR)/aout/aout64.h
+  subsegs.h $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_vax_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-vax.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
   $(INCDIR)/obstack.h
@@ -1703,30 +1745,31 @@ DEPOBJ_vax_elf = $(srcdir)/config/obj-el
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-vax.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_xc16x_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xc16x.h dwarf2dbg.h \
   $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_xstormy16_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xstormy16.h \
   dwarf2dbg.h $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
-  struc-symbol.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_xtensa_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-xtensa.h $(INCDIR)/xtensa-isa.h \
   $(INCDIR)/xtensa-config.h $(INCDIR)/safe-ctype.h subsegs.h \
-  $(INCDIR)/obstack.h struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+  $(INCDIR)/obstack.h $(INCDIR)/obstack.h struc-symbol.h \
+  dwarf2dbg.h $(INCDIR)/aout/aout64.h
 DEPOBJ_z80_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z80.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/z80.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_z8k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-z8k.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/z8k.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/obstack.h \
-  subsegs.h
+  subsegs.h $(INCDIR)/obstack.h
 DEPOBJ_hppa_som = $(srcdir)/config/obj-som.h subsegs.h \
   $(INCDIR)/obstack.h $(BFDDIR)/libhppa.h $(BFDDIR)/som.h \
   $(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def
@@ -1806,7 +1849,8 @@ DEP_h8300_elf = $(srcdir)/config/obj-elf
 DEP_hppa_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-hppa.h $(BFDDIR)/elf32-hppa.h \
-  $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h $(INCDIR)/elf/reloc-macros.h
+  $(BFDDIR)/elf-bfd.h $(BFDDIR)/libhppa.h $(INCDIR)/elf/hppa.h \
+  $(INCDIR)/elf/reloc-macros.h
 DEP_i370_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i370.h dwarf2dbg.h \
@@ -1815,13 +1859,13 @@ DEP_i370_elf = $(srcdir)/config/obj-elf.
 DEP_i386_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-i386.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
 DEP_i386_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-i386.h \
-  $(INCDIR)/coff/internal.h $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h \
+  $(INCDIR)/coff/internal.h $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
 DEP_i386_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i386.h dwarf2dbg.h \
   $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
-  $(INCDIR)/coff/i386.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h
+  $(INCDIR)/coff/x86_64.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h
 DEP_i860_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-i860.h dwarf2dbg.h \
@@ -1951,6 +1995,11 @@ DEP_s390_elf = $(srcdir)/config/obj-elf.
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-s390.h dwarf2dbg.h \
   $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
   $(BFDDIR)/libcoff.h
+DEP_score_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(srcdir)/config/tc-score.h dwarf2dbg.h \
+  $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
+  $(BFDDIR)/libcoff.h
 DEP_sh_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-sh.h \
   $(INCDIR)/coff/internal.h $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h \
   $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h
@@ -1971,6 +2020,11 @@ DEP_sparc_elf = $(srcdir)/config/obj-elf
   $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sparc.h dwarf2dbg.h \
   $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
   $(INCDIR)/coff/sparc.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h
+DEP_spu_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(srcdir)/config/tc-spu.h dwarf2dbg.h \
+  $(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
+  $(BFDDIR)/libcoff.h
 DEP_tic30_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-tic30.h \
   $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
 DEP_tic30_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-tic30.h \
Index: gas/configure.tgt
===================================================================
RCS file: /cvs/src/src/gas/configure.tgt,v
retrieving revision 1.29
diff -u -p -r1.29 configure.tgt
--- gas/configure.tgt	20 Sep 2006 11:35:11 -0000	1.29
+++ gas/configure.tgt	24 Oct 2006 23:52:50 -0000
@@ -363,6 +363,8 @@ case ${generic_target} in
     esac ;;
   sparc-*-openbsd*)			fmt=elf em=nbsd ;;
 
+  spu-*-elf)				fmt=elf ;;
+
   tic30-*-*aout*)			fmt=aout bfd_gas=yes ;;
   tic30-*-*coff*)			fmt=coff bfd_gas=yes ;;
   tic4x-*-* | c4x-*-*)			fmt=coff bfd_gas=yes ;;
Index: gas/config/tc-spu.c
===================================================================
RCS file: gas/config/tc-spu.c
diff -N gas/config/tc-spu.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/config/tc-spu.c	24 Oct 2006 23:52:50 -0000
@@ -0,0 +1,1023 @@
+/* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2, or (at your option)
+   any later version.
+
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GAS; see the file COPYING.  If not, write to the Free
+   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+   02110-1301, USA.  */
+
+#include "as.h"
+#include "safe-ctype.h"
+#include "subsegs.h"
+#include "opcode/spu.h"
+#include "dwarf2dbg.h" 
+
+const struct spu_opcode spu_opcodes[] = {
+#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+	{ MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
+#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+	{ MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
+#include "opcode/spu-insns.h"
+#undef APUOP
+#undef APUOPFB
+};
+
+static const int spu_num_opcodes =
+  sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
+
+#define MAX_RELOCS 2
+
+struct spu_insn
+{
+  unsigned int opcode;
+  expressionS exp[MAX_RELOCS];
+  int reloc_arg[MAX_RELOCS];
+  int flag[MAX_RELOCS];
+  enum spu_insns tag;
+};
+
+static const char *get_imm (const char *param, struct spu_insn *insn, int arg);
+static const char *get_reg (const char *param, struct spu_insn *insn, int arg,
+			    int accept_expr);
+
+static int calcop (struct spu_opcode *format, const char *param,
+		   struct spu_insn *insn);
+
+extern char *myname;
+static struct hash_control *op_hash = NULL;
+
+/* These bits should be turned off in the first address of every segment */
+int md_seg_align = 7;
+
+/* These chars start a comment anywhere in a source file (except inside
+   another comment */
+const char comment_chars[] = "#";
+
+/* These chars only start a comment at the beginning of a line.  */
+const char line_comment_chars[] = "#";
+
+/* gods own line continuation char */
+const char line_separator_chars[] = ";";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+const char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant */
+/* as in 0f123.456 */
+/* or    0H1.234E-12 (see exp chars above) */
+const char FLT_CHARS[] = "dDfF";
+
+const pseudo_typeS md_pseudo_table[] =
+{
+  {"align", s_align_ptwo, 4},
+  {"def", s_set, 0},
+  {"dfloat", float_cons, 'd'},
+  {"ffloat", float_cons, 'f'},
+  {"global", s_globl, 0},
+  {"half", cons, 2},
+  {"bss", s_lcomm_bytes, 1},
+  {"string", stringer, 1},
+  {"word", cons, 4},
+  /* Force set to be treated as an instruction.  */
+  {"set", NULL, 0},
+  {".set", s_set, 0},
+  {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 }, 
+  {"loc", dwarf2_directive_loc, 0}, 
+  {0,0,0}
+};
+
+void
+md_begin (void)
+{
+  const char *retval = NULL;
+  int i;
+
+  /* initialize hash table */
+
+  op_hash = hash_new ();
+
+  /* loop until you see the end of the list */
+
+  for (i = 0; i < spu_num_opcodes; i++)
+    {
+      /* hash each mnemonic and record its position */
+
+      retval = hash_insert (op_hash, spu_opcodes[i].mnemonic, (PTR)&spu_opcodes[i]);
+
+      if (retval != NULL && strcmp (retval, "exists") != 0)
+	as_fatal (_("Can't hash instruction '%s':%s"),
+		  spu_opcodes[i].mnemonic, retval);
+    }
+}
+
+const char *md_shortopts = "";
+struct option md_longopts[] = {
+#define OPTION_APUASM (OPTION_MD_BASE)
+  {"apuasm", no_argument, NULL, OPTION_APUASM},
+#define OPTION_DD2 (OPTION_MD_BASE+1)
+  {"mdd2.0", no_argument, NULL, OPTION_DD2},
+#define OPTION_DD1 (OPTION_MD_BASE+2)
+  {"mdd1.0", no_argument, NULL, OPTION_DD1},
+#define OPTION_DD3 (OPTION_MD_BASE+3)
+  {"mdd3.0", no_argument, NULL, OPTION_DD3},
+  { NULL, no_argument, NULL, 0 }
+};
+size_t md_longopts_size = sizeof (md_longopts);
+
+/* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
+ * e.g. don't add bias to float conversion and don't right shift
+ * immediate values. */
+static int emulate_apuasm;
+
+/* Use the dd2.0 instructions set.  The only differences are some new
+ * register names and the orx insn */
+static int use_dd2 = 1;
+
+int
+md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
+{
+  switch (c)
+    {
+    case OPTION_APUASM:
+      emulate_apuasm = 1;
+      break;
+    case OPTION_DD3:
+      use_dd2 = 1;
+      break;
+    case OPTION_DD2:
+      use_dd2 = 1;
+      break;
+    case OPTION_DD1:
+      use_dd2 = 0;
+      break;
+    default:
+      return 0;
+    }
+  return 1;
+}
+
+void
+md_show_usage (FILE *stream)
+{
+  fputs (_("\
+SPU options:\n\
+  --apuasm		  emulate behaviour of apuasm\n"),
+	stream);
+}
+
+
+struct arg_encode {
+  int size;
+  int pos;
+  int rshift;
+  int lo, hi;
+  int wlo, whi;
+  bfd_reloc_code_real_type reloc;
+};
+
+static struct arg_encode arg_encode[A_MAX] = {
+  {  7,  0, 0,       0,    127,    0,   -1,  0 }, /* A_T */
+  {  7,  7, 0,       0,    127,    0,   -1,  0 }, /* A_A */
+  {  7, 14, 0,       0,    127,    0,   -1,  0 }, /* A_B */
+  {  7, 21, 0,       0,    127,    0,   -1,  0 }, /* A_C */
+  {  7,  7, 0,       0,    127,    0,   -1,  0 }, /* A_S */
+  {  7,  7, 0,       0,    127,    0,   -1,  0 }, /* A_H */
+  {  0,  0, 0,       0,     -1,    0,   -1,  0 }, /* A_P */
+  {  7, 14, 0,       0,     -1,    0,   -1,  BFD_RELOC_SPU_IMM7 }, /* A_S3 */
+  {  7, 14, 0,     -32,     31,  -31,    0,  BFD_RELOC_SPU_IMM7 }, /* A_S6 */
+  {  7, 14, 0,       0,     -1,    0,   -1,  BFD_RELOC_SPU_IMM7 }, /* A_S7N */
+  {  7, 14, 0,     -64,     63,  -63,    0,  BFD_RELOC_SPU_IMM7 }, /* A_S7 */
+  {  8, 14, 0,       0,    127,    0,   -1,  BFD_RELOC_SPU_IMM8 }, /* A_U7A */
+  {  8, 14, 0,       0,    127,    0,   -1,  BFD_RELOC_SPU_IMM8 }, /* A_U7B */
+  { 10, 14, 0,    -512,    511, -128,  255,  BFD_RELOC_SPU_IMM10 }, /* A_S10B */
+  { 10, 14, 0,    -512,    511,    0,   -1,  BFD_RELOC_SPU_IMM10 }, /* A_S10 */
+  {  2, 23, 9,   -1024,   1023,    0,   -1,  BFD_RELOC_SPU_PCREL9a }, /* A_S11 */
+  {  2, 14, 9,   -1024,   1023,    0,   -1,  BFD_RELOC_SPU_PCREL9b }, /* A_S11I */
+  { 10, 14, 4,   -8192,   8191,    0,   -1,  BFD_RELOC_SPU_IMM10W }, /* A_S14 */
+  { 16,  7, 0,  -32768,  32767,    0,   -1,  BFD_RELOC_SPU_IMM16 }, /* A_S16 */
+  { 16,  7, 2, -131072, 262143,    0,   -1,  BFD_RELOC_SPU_IMM16W }, /* A_S18 */
+  { 16,  7, 2, -262144, 262143,    0,   -1,  BFD_RELOC_SPU_PCREL16 }, /* A_R18 */
+  {  7, 14, 0,       0,     -1,    0,   -1,  BFD_RELOC_SPU_IMM7 }, /* A_U3 */
+  {  7, 14, 0,       0,    127,    0,   31,  BFD_RELOC_SPU_IMM7 }, /* A_U5 */
+  {  7, 14, 0,       0,    127,    0,   63,  BFD_RELOC_SPU_IMM7 }, /* A_U6 */
+  {  7, 14, 0,       0,     -1,    0,   -1,  BFD_RELOC_SPU_IMM7 }, /* A_U7 */
+  { 14,  0, 0,       0,  16383,    0,   -1,  0 }, /* A_U14 */
+  { 16,  7, 0,  -32768,  65535,    0,   -1,  BFD_RELOC_SPU_IMM16 }, /* A_X16 */
+  { 18,  7, 0,       0, 262143,    0,   -1,  BFD_RELOC_SPU_IMM18 }, /* A_U18 */
+};
+
+/* Some flags for handling errors.  This is very hackish and added after
+ * the fact. */
+static int syntax_error_arg;
+static const char *syntax_error_param;
+static int syntax_reg;
+
+static char *
+insn_fmt_string (struct spu_opcode *format)
+{
+  static char buf[64];
+  int len = 0;
+  int i;
+
+  len += sprintf (&buf[len], "%s\t", format->mnemonic);
+  for (i = 1; i <= format->arg[0]; i++)
+    {
+      int arg = format->arg[i];
+      char *exp;
+      if (i > 1 && arg != A_P && format->arg[i-1] != A_P) 
+	buf[len++] =  ',';
+      if (arg == A_P)
+	exp = "(";
+      else if (arg < A_P)
+	exp = i == syntax_error_arg ? "REG" : "reg";
+      else 
+	exp = i == syntax_error_arg ? "IMM" : "imm";
+      len += sprintf (&buf[len], "%s", exp);
+      if (i > 1 && format->arg[i-1] == A_P) 
+	buf[len++] =  ')';
+    }
+  buf[len] = 0;
+  return buf;
+}
+
+void
+md_assemble (char *op)
+{
+  char *param, *thisfrag;
+  char c;
+  struct spu_opcode *format;
+  struct spu_insn insn;
+  int i;
+
+  assert (op);
+
+  /* skip over instruction to find parameters */
+
+  for (param = op; *param != 0 && !ISSPACE (*param); param++)
+    ;
+  c = *param;
+  *param = 0;
+
+  if (c != 0 && c != '\n')
+    param++;
+
+  /* try to find the instruction in the hash table */
+
+  if ((format = (struct spu_opcode *) hash_find (op_hash, op)) == NULL)
+    {
+      as_bad (_("Invalid mnemonic '%s'"), op);
+      return;
+    }
+
+  if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0)
+    {
+      as_bad (_("'%s' is only available in DD2.0 or higher."), op);
+      return;
+    }
+
+  while (1)
+    {
+      /* try parsing this instruction into insn */
+      for (i = 0; i < MAX_RELOCS; i++)
+	{
+	  insn.exp[i].X_add_symbol = 0;
+	  insn.exp[i].X_op_symbol = 0;
+	  insn.exp[i].X_add_number = 0;
+	  insn.exp[i].X_op = O_illegal;
+	  insn.reloc_arg[i] = -1;
+	  insn.flag[i] = 0;
+	}
+      insn.opcode = format->opcode;
+      insn.tag = (enum spu_insns) (format - spu_opcodes);
+
+      syntax_error_arg = 0;
+      syntax_error_param = 0;
+      syntax_reg = 0;
+      if (calcop (format, param, &insn))
+	break;
+
+      /* if it doesn't parse try the next instruction */
+      if (!strcmp (format[0].mnemonic, format[1].mnemonic))
+	format++;
+      else
+	{
+	  int parg = format[0].arg[syntax_error_arg-1];
+
+	  as_fatal (_("Error in argument %d.  Expecting:  \"%s\""),
+		    syntax_error_arg - (parg == A_P),
+		    insn_fmt_string (format));
+	  return;
+	}
+    }
+
+  if ((syntax_reg & 4)
+      && ! (insn.tag == M_RDCH
+	    || insn.tag == M_RCHCNT
+	    || insn.tag == M_WRCH))
+    as_warn (_("Mixing register syntax, with and without '$'."));
+  if (syntax_error_param)
+    {
+      const char *d = syntax_error_param;
+      while (*d != '$')
+	d--;
+      as_warn (_("Treating '%-*s' as a symbol."), syntax_error_param - d, d);
+    }
+
+  /* grow the current frag and plop in the opcode */
+
+  thisfrag = frag_more (4);
+  md_number_to_chars (thisfrag, insn.opcode, 4);
+
+  /* if this instruction requires labels mark it for later */
+
+  for (i = 0; i < MAX_RELOCS; i++)
+    if (insn.reloc_arg[i] >= 0) 
+      {
+        fixS *fixP;
+        bfd_reloc_code_real_type reloc = arg_encode[insn.reloc_arg[i]].reloc;
+	int pcrel = 0;
+        if (reloc == BFD_RELOC_SPU_PCREL9a
+	    || reloc == BFD_RELOC_SPU_PCREL9b
+            || reloc == BFD_RELOC_SPU_PCREL16)
+	  pcrel = 1;
+	if (insn.flag[i] & 1)
+	  reloc = BFD_RELOC_SPU_HI16;
+	else if (insn.flag[i] & 2)
+	  reloc = BFD_RELOC_SPU_LO16;
+	fixP = fix_new_exp (frag_now,
+			    thisfrag - frag_now->fr_literal,
+			    4,
+			    &insn.exp[i],
+			    pcrel,
+			    reloc);
+	fixP->tc_fix_data = insn.reloc_arg[i];
+      }
+  dwarf2_emit_insn (4);
+}
+
+static int
+calcop (struct spu_opcode *format, const char *param, struct spu_insn *insn)
+{
+  int i;
+  int paren = 0;
+  int arg;
+
+  for (i = 1; i <= format->arg[0]; i++)
+    {
+      arg = format->arg[i];
+      syntax_error_arg = i;
+
+      while (ISSPACE (*param))
+        param++;
+      if (*param == 0 || *param == ',')
+	return 0;
+      if (arg < A_P)
+        param = get_reg (param, insn, arg, 1);
+      else if (arg > A_P)
+        param = get_imm (param, insn,  arg);
+      else if (arg == A_P)
+	{
+	  paren++;
+	  if ('(' != *param++)
+	    return 0;
+	}
+
+      if (!param)
+	return 0;
+
+      while (ISSPACE (*param))
+        param++;
+
+      if (arg != A_P && paren)
+	{
+	  paren--;
+	  if (')' != *param++)
+	    return 0;
+	}
+      else if (i < format->arg[0]
+	       && format->arg[i] != A_P
+	       && format->arg[i+1] != A_P)
+	{
+	  if (',' != *param++)
+	    {
+	      syntax_error_arg++;
+	      return 0;
+	    }
+	}
+    }
+  while (ISSPACE (*param))
+    param++;
+  return !paren && (*param == 0 || *param == '\n');
+}
+
+struct reg_name {
+    unsigned int regno;
+    unsigned int length;
+    char name[32];
+};
+
+#define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
+
+static struct reg_name reg_name[] = {
+  REG_NAME (0, "lr"),  /* link register */
+  REG_NAME (1, "sp"),  /* stack pointer */
+  REG_NAME (0, "rp"),  /* link register */
+  REG_NAME (127, "fp"),  /* frame pointer */
+};
+
+static struct reg_name sp_reg_name[] = {
+};
+
+static struct reg_name ch_reg_name[] = {
+  REG_NAME (  0, "SPU_RdEventStat"),
+  REG_NAME (  1, "SPU_WrEventMask"),
+  REG_NAME (  2, "SPU_WrEventAck"),
+  REG_NAME (  3, "SPU_RdSigNotify1"),
+  REG_NAME (  4, "SPU_RdSigNotify2"),
+  REG_NAME (  7, "SPU_WrDec"),
+  REG_NAME (  8, "SPU_RdDec"),
+  REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
+  REG_NAME ( 13, "SPU_RdMachStat"),
+  REG_NAME ( 14, "SPU_WrSRR0"),
+  REG_NAME ( 15, "SPU_RdSRR0"),
+  REG_NAME ( 28, "SPU_WrOutMbox"),
+  REG_NAME ( 29, "SPU_RdInMbox"),
+  REG_NAME ( 30, "SPU_WrOutIntrMbox"),
+  REG_NAME (  9, "MFC_WrMSSyncReq"),
+  REG_NAME ( 12, "MFC_RdTagMask"),   /* DD2.0 only */
+  REG_NAME ( 16, "MFC_LSA"),
+  REG_NAME ( 17, "MFC_EAH"),
+  REG_NAME ( 18, "MFC_EAL"),
+  REG_NAME ( 19, "MFC_Size"),
+  REG_NAME ( 20, "MFC_TagID"),
+  REG_NAME ( 21, "MFC_Cmd"),
+  REG_NAME ( 22, "MFC_WrTagMask"),
+  REG_NAME ( 23, "MFC_WrTagUpdate"),
+  REG_NAME ( 24, "MFC_RdTagStat"),
+  REG_NAME ( 25, "MFC_RdListStallStat"),
+  REG_NAME ( 26, "MFC_WrListStallAck"),
+  REG_NAME ( 27, "MFC_RdAtomicStat"),
+};
+#undef REG_NAME
+
+static const char *
+get_reg (const char *param, struct spu_insn *insn, int arg, int accept_expr)
+{
+  unsigned regno;
+  int saw_prefix = 0;
+
+  if (*param == '$')
+    {
+      saw_prefix = 1;
+      param++;
+    }
+    
+  if (arg == A_H) /* Channel */
+    {
+      if ((param[0] == 'c' || param[0] == 'C')
+	  && (param[1] == 'h' || param[1] == 'H')
+	  && ISDIGIT (param[2]))
+        param += 2;
+    }
+  else if (arg == A_S) /* Special purpose register */
+    {
+      if ((param[0] == 's' || param[0] == 'S')
+	  && (param[1] == 'p' || param[1] == 'P')
+	  && ISDIGIT (param[2]))
+        param += 2;
+    }
+
+  if (ISDIGIT (*param))
+    {
+      regno = 0;
+      while (ISDIGIT (*param))
+	regno = regno * 10 + *param++ - '0';
+    }
+  else
+    {
+      struct reg_name *rn;
+      unsigned int i, n, l = 0;
+
+      if (arg == A_H) /* Channel */
+	{
+	  rn = ch_reg_name;
+	  n = sizeof (ch_reg_name) / sizeof (*ch_reg_name);
+	}
+      else if (arg == A_S) /* Special purpose register */
+	{
+	  rn = sp_reg_name;
+	  n = sizeof (sp_reg_name) / sizeof (*sp_reg_name);
+	}
+      else
+	{
+	  rn = reg_name;
+	  n = sizeof (reg_name) / sizeof (*reg_name);
+	}
+      regno = 128;
+      for (i = 0; i < n; i++)
+	if (rn[i].length > l
+	    && 0 == strncasecmp (param, rn[i].name, rn[i].length))
+          {
+	    l = rn[i].length;
+            regno = rn[i].regno;
+          }
+      param += l;
+    }
+
+  if (!use_dd2
+      && arg == A_H)
+    {
+      if (regno == 11)
+	as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
+      else if (regno == 12)
+	as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
+    }
+
+  if (regno < 128)
+    {
+      insn->opcode |= regno << arg_encode[arg].pos;
+      if ((!saw_prefix && syntax_reg == 1)
+	  || (saw_prefix && syntax_reg == 2))
+	syntax_reg |= 4;
+      syntax_reg |= saw_prefix ? 1 : 2;
+      return param;
+    }
+
+  if (accept_expr)
+    {
+      char *save_ptr;
+      expressionS ex;
+      save_ptr = input_line_pointer;
+      input_line_pointer = (char *)param;
+      expression (&ex);
+      param = input_line_pointer;
+      input_line_pointer = save_ptr;
+      if (ex.X_op == O_register || ex.X_op == O_constant)
+	{
+	  insn->opcode |= ex.X_add_number << arg_encode[arg].pos;
+	  return param;
+	}
+    }
+  return 0;
+}
+
+static const char *
+get_imm (const char *param, struct spu_insn *insn, int arg)
+{
+  int val;
+  char *save_ptr;
+  int low = 0, high = 0;
+  int reloc_i = insn->reloc_arg[0] >= 0 ? 1 : 0;
+
+  if (strncmp (param, "%lo(", 4) == 0)
+    {
+      param += 3;
+      low = 1;
+      as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
+    }
+  else if (strncmp (param, "%hi(", 4) == 0)
+    {
+      param += 3;
+      high = 1;
+      as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
+    }
+  else if (strncmp (param, "%pic(", 5) == 0)
+    {
+      /* Currently we expect %pic(expr) == expr, so do nothing here.
+       * i.e. for code loaded at address 0 $toc will be 0.  */
+      param += 4;
+    }
+      
+  if (*param == '$')
+    {
+      /* Symbols can start with $, but if this symbol matches a register
+       * name, it's probably a mistake.   The only way to avoid this
+       * warning is to rename the symbol.  */
+      struct spu_insn tmp_insn;
+      const char *np = get_reg (param, &tmp_insn, arg, 0);
+
+      if (np)
+	syntax_error_param = np;
+    }
+      
+  save_ptr = input_line_pointer;
+  input_line_pointer = (char *) param;
+  expression (&insn->exp[reloc_i]);
+  param = input_line_pointer;
+  input_line_pointer = save_ptr;
+
+  /* Similar to ppc_elf_suffix in tc-ppc.c.  We have so few cases to
+   * handle we do it inlined here. */
+  if (param[0] == '@' && !ISALNUM (param[2]) && param[2] != '@')
+    {
+      if (param[1] == 'h' || param[1] == 'H')
+	{
+	  high = 1;
+	  param += 2;
+	}
+      else if (param[1] == 'l' || param[1] == 'L')
+	{
+	  low = 1;
+	  param += 2;
+	}
+    }
+
+  val = insn->exp[reloc_i].X_add_number;
+
+  if (insn->exp[reloc_i].X_op == O_constant)
+    {
+      if (emulate_apuasm)
+	{
+	  /* Convert the value to a format we expect. */ 
+          val <<= arg_encode[arg].rshift;
+	  if (arg == A_U7A)
+	    val = 173 - val;
+	  else if (arg == A_U7B)
+	    val = 155 - val; 
+	}
+
+      if (high)
+	val = val >> 16;
+      else if (low)
+	val = val & 0xffff;
+
+      /* Warn about out of range expressions. */
+      {
+	int hi = arg_encode[arg].hi;
+	int lo = arg_encode[arg].lo;
+	int whi = arg_encode[arg].whi;
+	int wlo = arg_encode[arg].wlo;
+
+	if (hi > lo && (val < lo || val > hi))
+	  as_fatal (_("Constant expression %d out of range, [%d, %d]."),
+		    val, lo, hi);
+	else if (whi > wlo && (val < wlo || val > whi))
+	  as_warn (_("Constant expression %d out of range, [%d, %d]."),
+		   val, wlo, whi);
+      }
+
+      if (arg == A_U7A)
+        val = 173 - val;
+      else if (arg == A_U7B)
+        val = 155 - val; 
+
+      /* Branch hints have a split encoding.  Do the bottom part. */
+      if (arg == A_S11 || arg == A_S11I)
+	insn->opcode |= ((val >> 2) & 0x7f);
+
+      insn->opcode |= (((val >> arg_encode[arg].rshift)
+			& ((1 << arg_encode[arg].size) - 1))
+		       << arg_encode[arg].pos);
+      insn->reloc_arg[reloc_i] = -1;
+      insn->flag[reloc_i] = 0;
+    }
+  else
+    {
+      insn->reloc_arg[reloc_i] = arg;
+      if (high)
+	insn->flag[reloc_i] |= 1;
+      if (low)
+	insn->flag[reloc_i] |= 2;
+    }
+
+  return param;
+}
+
+#define MAX_LITTLENUMS 6
+
+/* Turn a string in input_line_pointer into a floating point constant of type
+   type, and store the appropriate bytes in *litP.  The number of LITTLENUMS
+   emitted is stored in *sizeP .  An error message is returned, or NULL on OK.
+ */
+char *
+md_atof (int type, char *litP, int *sizeP)
+{
+  int prec;
+  LITTLENUM_TYPE words[MAX_LITTLENUMS];
+  LITTLENUM_TYPE *wordP;
+  char *t;
+
+  switch (type)
+    {
+    case 'f':
+    case 'F':
+    case 's':
+    case 'S':
+      prec = 2;
+      break;
+
+    case 'd':
+    case 'D':
+    case 'r':
+    case 'R':
+      prec = 4;
+      break;
+
+    case 'x':
+    case 'X':
+      prec = 6;
+      break;
+
+    case 'p':
+    case 'P':
+      prec = 6;
+      break;
+
+    default:
+      *sizeP = 0;
+      return _("Bad call to MD_ATOF()");
+    }
+  t = atof_ieee (input_line_pointer, type, words);
+  if (t)
+    input_line_pointer = t;
+
+  *sizeP = prec * sizeof (LITTLENUM_TYPE);
+  for (wordP = words; prec--;)
+    {
+      md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
+      litP += sizeof (LITTLENUM_TYPE);
+    }
+  return 0;
+}
+
+#ifndef WORKING_DOT_WORD
+int md_short_jump_size = 4;
+
+void
+md_create_short_jump (char *ptr,
+		      addressT from_addr ATTRIBUTE_UNUSED,
+		      addressT to_addr ATTRIBUTE_UNUSED,
+		      fragS *frag,
+		      symbolS *to_symbol)
+{
+  ptr[0] = (char) 0xc0;
+  ptr[1] = 0x00;
+  ptr[2] = 0x00;
+  ptr[3] = 0x00;
+  fix_new (frag,
+	   ptr - frag->fr_literal,
+	   4,
+	   to_symbol,
+	   (offsetT) 0,
+	   0,
+	   BFD_RELOC_SPU_PCREL16);
+}
+
+int md_long_jump_size = 4;
+
+void
+md_create_long_jump (char *ptr,
+		     addressT from_addr ATTRIBUTE_UNUSED,
+		     addressT to_addr ATTRIBUTE_UNUSED,
+		     fragS *frag,
+		     symbolS *to_symbol)
+{
+  ptr[0] = (char) 0xc0;
+  ptr[1] = 0x00;
+  ptr[2] = 0x00;
+  ptr[3] = 0x00;
+  fix_new (frag,
+	   ptr - frag->fr_literal,
+	   4,
+	   to_symbol,
+	   (offsetT) 0,
+	   0,
+	   BFD_RELOC_SPU_PCREL16);
+}
+#endif
+
+int
+md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
+			       segT segment_type ATTRIBUTE_UNUSED)
+{
+  as_fatal (_("Relaxation should never occur"));
+  return -1;
+}
+
+/* If while processing a fixup, a reloc really needs to be created,
+   then it is done here.  */
+
+arelent *
+tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
+{
+  arelent *reloc;
+  reloc = (arelent *) xmalloc (sizeof (arelent));
+  reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+  if (fixp->fx_addsy)
+    *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+  else if (fixp->fx_subsy)
+    *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
+  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+  if (reloc->howto == (reloc_howto_type *) NULL)
+    {
+      as_bad_where (fixp->fx_file, fixp->fx_line,
+		    _("reloc %d not supported by object file format"),
+		    (int) fixp->fx_r_type);
+      return NULL;
+    }
+  reloc->addend = fixp->fx_addnumber;
+  return reloc;
+}
+
+/* Round up a section's size to the appropriate boundary.  */
+
+valueT
+md_section_align (segT seg, valueT size)
+{
+  int align = bfd_get_section_alignment (stdoutput, seg);
+  valueT mask = ((valueT) 1 << align) - 1;
+
+  return (size + mask) & ~mask;
+}
+
+/* Where a PC relative offset is calculated from.  On the spu they
+   are calculated from the beginning of the branch instruction.  */
+
+long
+md_pcrel_from (fixS *fixp)
+{
+  return fixp->fx_frag->fr_address + fixp->fx_where;
+}
+
+/* Fill in rs_align_code fragments.  */
+
+void
+spu_handle_align (fragS *fragp)
+{
+  static const unsigned char nop_pattern[8] = {
+    0x40, 0x20, 0x00, 0x00, /* even nop */
+    0x00, 0x20, 0x00, 0x00, /* odd  nop */
+  };
+
+  int bytes;
+  char *p;
+
+  if (fragp->fr_type != rs_align_code)
+    return;
+
+  bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+  p = fragp->fr_literal + fragp->fr_fix;
+
+  if (bytes & 3)
+    {
+      int fix = bytes & 3;
+      memset (p, 0, fix);
+      p += fix;
+      bytes -= fix;
+      fragp->fr_fix += fix;
+    }
+  if (bytes & 4)
+    {
+      memcpy (p, &nop_pattern[4], 4);
+      p += 4;
+      bytes -= 4;
+      fragp->fr_fix += 4;
+    }
+
+  memcpy (p, nop_pattern, 8);
+  fragp->fr_var = 8;
+}
+
+void
+md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
+{
+  unsigned int res;
+  valueT val = *valP;
+  char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
+
+  if (fixP->fx_subsy != (symbolS *) NULL)
+    {
+      /* We can't actually support subtracting a symbol.  */
+      as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
+    }
+
+  if (fixP->fx_addsy != NULL)
+    {
+      if (fixP->fx_pcrel)
+	{
+	  /* Hack around bfd_install_relocation brain damage.  */
+	  val += fixP->fx_frag->fr_address + fixP->fx_where;
+
+	  switch (fixP->fx_r_type)
+	    {
+	    case BFD_RELOC_32:
+	      fixP->fx_r_type = BFD_RELOC_32_PCREL;
+	      break;
+
+	    case BFD_RELOC_SPU_PCREL16:
+	    case BFD_RELOC_SPU_PCREL9a:
+	    case BFD_RELOC_SPU_PCREL9b:
+	    case BFD_RELOC_32_PCREL:
+	      break;
+
+	    default:
+	      as_bad_where (fixP->fx_file, fixP->fx_line,
+			    _("expression too complex"));
+	      break;
+	    }
+	}
+    }
+
+  fixP->fx_addnumber = val;
+
+  if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
+    {
+      fixP->fx_done = 1;
+      res = 0;
+      if (fixP->tc_fix_data > A_P)
+	{
+	  int hi = arg_encode[fixP->tc_fix_data].hi;
+	  int lo = arg_encode[fixP->tc_fix_data].lo;
+	  if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
+	    as_bad_where (fixP->fx_file, fixP->fx_line,
+			  "Relocation doesn't fit. (relocation value = 0x%lx)",
+			  (long) val);
+	}
+
+      switch (fixP->fx_r_type)
+        {
+        case BFD_RELOC_8:
+	  md_number_to_chars (place, val, 1);
+	  return;
+
+        case BFD_RELOC_16:
+	  md_number_to_chars (place, val, 2);
+	  return;
+
+        case BFD_RELOC_32:
+	  md_number_to_chars (place, val, 4);
+	  return;
+
+        case BFD_RELOC_64:
+	  md_number_to_chars (place, val, 8);
+	  return;
+
+        case BFD_RELOC_SPU_IMM7:
+          res = (val & 0x7f) << 14;
+          break;
+
+        case BFD_RELOC_SPU_IMM8:
+          res = (val & 0xff) << 14;
+          break;
+
+        case BFD_RELOC_SPU_IMM10:
+          res = (val & 0x3ff) << 14;
+          break;
+
+        case BFD_RELOC_SPU_IMM10W:
+          res = (val & 0x3ff0) << 10;
+          break;
+
+        case BFD_RELOC_SPU_IMM16:
+          res = (val & 0xffff) << 7;
+          break;
+
+        case BFD_RELOC_SPU_IMM16W:
+          res = (val & 0x3fffc) << 5;
+          break;
+
+        case BFD_RELOC_SPU_IMM18:
+          res = (val & 0x3ffff) << 7;
+          break;
+
+        case BFD_RELOC_SPU_PCREL9a:
+          res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 14);
+          break;
+
+        case BFD_RELOC_SPU_PCREL9b:
+          res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 5);
+          break;
+
+        case BFD_RELOC_SPU_PCREL16:
+          res = (val & 0x3fffc) << 5;
+          break;
+
+        default:
+          as_bad_where (fixP->fx_file, fixP->fx_line,
+                        _("reloc %d not supported by object file format"),
+                        (int) fixP->fx_r_type);
+        }
+
+      if (res != 0)
+        {
+          place[0] |= (res >> 24) & 0xff;
+          place[1] |= (res >> 16) & 0xff;
+          place[2] |= (res >> 8) & 0xff;
+          place[3] |= (res) & 0xff;
+        }
+    }
+}
Index: gas/config/tc-spu.h
===================================================================
RCS file: gas/config/tc-spu.h
diff -N gas/config/tc-spu.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ gas/config/tc-spu.h	24 Oct 2006 23:52:50 -0000
@@ -0,0 +1,114 @@
+/* spu.h -- Assembler for spu
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2, or (at your option)
+   any later version.
+
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GAS; see the file COPYING.  If not, write to the Free
+   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+   02110-1301, USA.  */
+
+#define TC_SPU
+
+#ifdef OBJ_ELF
+#define TARGET_FORMAT "elf32-spu"
+#define TARGET_ARCH bfd_arch_spu
+#define TARGET_NAME "elf32-spu"
+#endif
+
+#define TARGET_BYTES_BIG_ENDIAN 1
+
+#ifndef TARGET_NAME
+#define TARGET_NAME "coff-spu"
+#endif
+
+#ifndef TARGET_ARCH
+#define TARGET_ARCH bfd_arch_spu
+#endif
+
+#define COFF_MAGIC SPU_MAGIC
+#define BFD_ARCH bfd_arch_spu
+
+#define NEED_FX_R_TYPE
+#define TC_KEEP_FX_OFFSET
+/* #define TC_CONS_RELOC RELOC_32 */
+
+/* If defined, fixS will have a member named tc_fix_data of this type.  */
+#define TC_FIX_TYPE int
+#define TC_INIT_FIX_DATA(FIXP) ((FIXP)->tc_fix_data = 0)
+
+/* Don't reduce function symbols to section symbols.  */
+#define tc_fix_adjustable(FIXP) (!S_IS_FUNCTION ((FIXP)->fx_addsy))
+
+/* Values passed to md_apply_fix don't include symbol values.  */
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+/* This expression evaluates to false if the relocation is for a local 
+   object for which we still want to do the relocation at runtime.
+   True if we are willing to perform this relocation while building
+   the .o file.  This is only used for pcrel relocations.  */
+
+#define TC_RELOC_RTSYM_LOC_FIXUP(FIX)				\
+  ((FIX)->fx_addsy == NULL					\
+   || (! S_IS_EXTERNAL ((FIX)->fx_addsy)			\
+       && ! S_IS_WEAK ((FIX)->fx_addsy)				\
+       && S_IS_DEFINED ((FIX)->fx_addsy)			\
+       && ! S_IS_COMMON ((FIX)->fx_addsy)))
+
+/* The spu uses pseudo-ops with no leading period.  */
+#define NO_PSEUDO_DOT 1
+
+/* Don't warn on word overflow; it happens on %hi relocs.  */
+#undef WARN_SIGNED_OVERFLOW_WORD
+
+#ifdef OBJ_ELF
+#define DIFF_EXPR_OK
+#endif
+
+#define WORKING_DOT_WORD
+
+#define md_number_to_chars number_to_chars_bigendian
+
+#define md_convert_frag(b,s,f)		{as_fatal (_("spu convert_frag\n"));}
+
+/* We don't need to do anything special for undefined symbols.  */
+#define md_undefined_symbol(s) 0
+
+/* We have no special operand handling.  */
+#define md_operand(e)
+
+/* Fill in rs_align_code fragments.  */
+extern void spu_handle_align PARAMS ((fragS *));
+#define HANDLE_ALIGN(frag)  spu_handle_align (frag)
+
+#define MAX_MEM_FOR_RS_ALIGN_CODE  (7 + 8)
+
+#ifdef SPUCOFF
+
+/* Whether a reloc should be output.  */
+#define TC_COUNT_RELOC(fixp) ((fixp)->fx_addsy != NULL || (fixp)->fx_subsy != NULL)
+
+/* Get the BFD reloc type to use for a gas fixS structure.  */
+#define TC_COFF_FIX2RTYPE(fixp) tc_coff_fix2rtype (fixp)
+
+/* No special hook needed for symbols.  */
+#define tc_coff_symbol_emit_hook(s)
+
+/* Align sections to a four byte boundary.  */
+#ifndef max
+#define max(a,b)	(((a) > (b)) ? (a) : (b))
+#endif
+#define SUB_SEGMENT_ALIGN(SEG)	max (section_alignment[(int) (SEG)], 4)
+
+#endif /* SPUCOFF */
Index: gas/po/POTFILES.in
===================================================================
RCS file: /cvs/src/src/gas/po/POTFILES.in,v
retrieving revision 1.35
diff -u -p -r1.35 POTFILES.in
--- gas/po/POTFILES.in	29 Sep 2006 08:05:35 -0000	1.35
+++ gas/po/POTFILES.in	24 Oct 2006 23:52:51 -0000
@@ -108,6 +108,8 @@ config/tc-sh.c
 config/tc-sh.h
 config/tc-sparc.c
 config/tc-sparc.h
+config/tc-spu.c
+config/tc-spu.h
 config/tc-tic30.c
 config/tc-tic30.h
 config/tc-tic54x.c
Index: include/dis-asm.h
===================================================================
RCS file: /cvs/src/src/include/dis-asm.h,v
retrieving revision 1.63
diff -u -p -r1.63 dis-asm.h
--- include/dis-asm.h	16 Sep 2006 23:51:50 -0000	1.63
+++ include/dis-asm.h	24 Oct 2006 23:53:03 -0000
@@ -260,6 +260,7 @@ extern int print_insn_sh		(bfd_vma, disa
 extern int print_insn_sh64		(bfd_vma, disassemble_info *);
 extern int print_insn_sh64x_media	(bfd_vma, disassemble_info *);
 extern int print_insn_sparc		(bfd_vma, disassemble_info *);
+extern int print_insn_spu		(bfd_vma, disassemble_info *);
 extern int print_insn_tic30		(bfd_vma, disassemble_info *);
 extern int print_insn_tic4x		(bfd_vma, disassemble_info *);
 extern int print_insn_tic54x		(bfd_vma, disassemble_info *);
Index: include/elf/common.h
===================================================================
RCS file: /cvs/src/src/include/elf/common.h,v
retrieving revision 1.79
diff -u -p -r1.79 common.h
--- include/elf/common.h	16 Sep 2006 23:51:50 -0000	1.79
+++ include/elf/common.h	24 Oct 2006 23:53:04 -0000
@@ -118,6 +118,7 @@
 #define EM_PPC		 20	/* PowerPC */
 #define EM_PPC64	 21	/* 64-bit PowerPC */
 #define EM_S390		 22	/* IBM S/390 */
+#define EM_SPU		 23	/* Sony/Toshiba/IBM SPU */
 
 #define EM_V800		 36	/* NEC V800 series */
 #define EM_FR20		 37	/* Fujitsu FR20 */
Index: include/elf/spu.h
===================================================================
RCS file: include/elf/spu.h
diff -N include/elf/spu.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ include/elf/spu.h	24 Oct 2006 23:53:04 -0000
@@ -0,0 +1,57 @@
+/* SPU ELF support for BFD.
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software Foundation,
+   Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+#ifndef _ELF_SPU_H
+#define _ELF_SPU_H
+
+#include "elf/reloc-macros.h"
+
+/* elf32-spu.c depends on these being consecutive. */
+START_RELOC_NUMBERS (elf_spu_reloc_type)
+     RELOC_NUMBER (R_SPU_NONE,		 0)
+     RELOC_NUMBER (R_SPU_ADDR10,	 1)
+     RELOC_NUMBER (R_SPU_ADDR16,	 2)
+     RELOC_NUMBER (R_SPU_ADDR16_HI,	 3)
+     RELOC_NUMBER (R_SPU_ADDR16_LO,	 4)
+     RELOC_NUMBER (R_SPU_ADDR18,	 5)
+     RELOC_NUMBER (R_SPU_ADDR32,	 6)
+     RELOC_NUMBER (R_SPU_REL16,		 7)
+     RELOC_NUMBER (R_SPU_ADDR7,		 8)
+     RELOC_NUMBER (R_SPU_REL9,		 9)
+     RELOC_NUMBER (R_SPU_REL9I,		10)
+     RELOC_NUMBER (R_SPU_ADDR10I,	11)
+     RELOC_NUMBER (R_SPU_ADDR16I,	12)
+     RELOC_NUMBER (R_SPU_REL32,		13)
+END_RELOC_NUMBERS (R_SPU_max)
+
+/* Program header extensions */
+
+/* Mark a PT_LOAD segment as containing an overlay which should not
+   initially be loaded.  */
+#define PF_OVERLAY		(1 << 27)
+
+/* SPU Dynamic Object Information.  */
+#define PT_SPU_INFO             0x70000000
+
+/* SPU plugin information */
+#define SPU_PLUGIN_NAME         "SPUNAME"
+#define SPU_PTNOTE_SPUNAME	".note.spu_name"
+
+#endif /* _ELF_SPU_H */
Index: include/opcode/spu-insns.h
===================================================================
RCS file: include/opcode/spu-insns.h
diff -N include/opcode/spu-insns.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ include/opcode/spu-insns.h	24 Oct 2006 23:53:05 -0000
@@ -0,0 +1,410 @@
+/* SPU ELF support for BFD.
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software Foundation,
+   Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+/* SPU Opcode Table
+
+-=-=-= FORMAT =-=-=-
+                                             		                                             
+       +----+-------+-------+-------+-------+  		       +------------+-------+-------+-------+
+RRR    | op |  RC   |  RB   |  RA   |  RT   |		RI7    | op         |  I7   |  RA   |  RT   |
+       +----+-------+-------+-------+-------+		       +------------+-------+-------+-------+
+        0  3       1       1       2       3		        0          1       1       2       3 
+                   0       7       4       1		                   0       7       4       1 
+
+       +-----------+--------+-------+-------+		       +---------+----------+-------+-------+
+RI8    | op        |   I8   |  RA   |  RT   |		RI10   | op      |   I10    |  RA   |  RT   |
+       +-----------+--------+-------+-------+		       +---------+----------+-------+-------+
+        0         9        1       2       3		        0       7          1       2       3 
+                           7       4       1		                           7       4       1 
+
+       +----------+-----------------+-------+		       +--------+-------------------+-------+
+RI16   | op       |       I16       |  RT   |		RI18   | op     |       I18         |  RT   |
+       +----------+-----------------+-------+		       +--------+-------------------+-------+
+        0        8                 2       3		        0      6                   2       3 
+                                   4       1		                                   4       1 
+
+       +------------+-------+-------+-------+		       +-------+--+-----------------+-------+
+RR     | op         |  RB   |  RA   |  RT   |		LBT    | op    |RO|       I16       |  RO   |
+       +------------+-------+-------+-------+		       +-------+--+-----------------+-------+
+        0          1       1       2       3		        0     6  8                 2       3 
+                   0       7       4       1		                                   4       1 
+
+							       +------------+----+--+-------+-------+
+							LBTI   | op         | // |RO|  RA   |  RO   |
+							       +------------+----+--+-------+-------+
+							        0          1    1  1       2       3
+							                   0    5  7       4       1
+
+-=-=-= OPCODE =-=-=-
+
+OPCODE field specifies the most significant 11bit of the instruction. Some formats don't have 11bits for opcode field, and in this
+case, bit field other than op are defined as 0s. For example, opcode of fma instruction which is RRR format is defined as 0x700,
+since 0x700 -> 11'b11100000000, this means opcode is 4'b1110, and other 7bits are defined as 7'b0000000.
+
+-=-=-= ASM_FORMAT =-=-=-
+
+RRR category						RI7 category                               
+	ASM_RRR		mnemonic RC, RA, RB, RT		        ASM_RI4         mnemonic RT, RA, I4
+							        ASM_RI7         mnemonic RT, RA, I7
+
+RI8 category						RI10 category                               
+	ASM_RUI8	mnemonic RT, RA, UI8		        ASM_AI10        mnemonic RA, I10    
+							        ASM_RI10        mnemonic RT, RA, R10
+							        ASM_RI10IDX     mnemonic RT, I10(RA)
+
+RI16 category						RI18 category                           
+	ASM_I16W	mnemonic I16W			        ASM_RI18        mnemonic RT, I18
+	ASM_RI16	mnemonic RT, I16
+	ASM_RI16W	mnemonic RT, I16W
+
+RR category						LBT category                                    
+	ASM_MFSPR	mnemonic RT, SA			        ASM_LBT         mnemonic brinst, brtarg 
+	ASM_MTSPR	mnemonic SA, RT			                                                
+	ASM_NOOP	mnemonic			LBTI category                                   
+	ASM_RA		mnemonic RA			        ASM_LBTI        mnemonic brinst, RA     
+	ASM_RAB		mnemonic RA, RB
+	ASM_RDCH	mnemonic RT, CA
+	ASM_RR		mnemonic RT, RA, RB
+	ASM_RT		mnemonic RT
+	ASM_RTA		mnemonic RT, RA
+	ASM_WRCH	mnemonic CA, RT
+
+Note that RRR instructions have the names for RC and RT reversed from
+what's in the ISA, in order to put RT in the same position it appears
+for other formats.
+
+-=-=-= DEPENDENCY =-=-=-
+
+DEPENDENCY filed consists of 5 digits. This represents which register is used as source and which register is used as target.
+The first(most significant) digit is always 0. Then it is followd by RC, RB, RA and RT digits.
+If the digit is 0, this means the corresponding register is not used in the instruction.
+If the digit is 1, this means the corresponding register is used as a source in the instruction.
+If the digit is 2, this means the corresponding register is used as a target in the instruction.
+If the digit is 3, this means the corresponding register is used as both source and target in the instruction.
+For example, fms instruction has 00113 as the DEPENDENCY field. This means RC is not used in this operation, RB and RA are
+used as sources and RT is the target.
+
+-=-=-= PIPE =-=-=-
+
+This field shows which execution pipe is used for the instruction
+
+pipe0 execution pipelines:
+	FP6	SP floating pipeline
+	FP7	integer operations executed in SP floating pipeline
+	FPD	DP floating pipeline
+	FX2	FXU pipeline
+	FX3	Rotate/Shift pipeline
+	FXB	Byte pipeline
+	NOP	No pipeline
+
+pipe1 execution pipelines:
+	BR	Branch pipeline
+	LNOP	No pipeline
+	LS	Load/Store pipeline
+	SHUF	Shuffle pipeline
+	SPR	SPR/CH pipeline
+
+*/
+
+#define _A0() {0}
+#define _A1(a) {1,a}
+#define _A2(a,b) {2,a,b}
+#define _A3(a,b,c) {3,a,b,c}
+#define _A4(a,b,c,d) {4,a,b,c,d}
+
+/*    TAG		FORMAT	OPCODE	MNEMONIC	ASM_FORMAT	DEPENDENCY	PIPE	COMMENT				*/
+/*									0[RC][RB][RA][RT]					*/
+/*									1:src, 2:target						*/
+
+APUOP(M_BR,		RI16,	0x190,	"br",		_A1(A_R18),	00000,	BR)	/* BRel          IP<-IP+I16 */
+APUOP(M_BRSL,		RI16,	0x198,	"brsl",		_A2(A_T,A_R18),	00002,	BR)	/* BRelSetLink   RT,IP<-IP,IP+I16 */
+APUOP(M_BRA,		RI16,	0x180,	"bra",		_A1(A_S18),	00000,	BR)	/* BRAbs         IP<-I16 */
+APUOP(M_BRASL,		RI16,	0x188,	"brasl",	_A2(A_T,A_S18),	00002,	BR)	/* BRAbsSetLink  RT,IP<-IP,I16 */
+APUOP(M_FSMBI,		RI16,	0x194,	"fsmbi",	_A2(A_T,A_X16),	00002,	SHUF)	/* FormSelMask%I RT<-fsm(I16) */
+APUOP(M_LQA,		RI16,	0x184,	"lqa",		_A2(A_T,A_S18),	00002,	LS)	/* LoadQAbs      RT<-M[I16] */
+APUOP(M_LQR,		RI16,	0x19C,	"lqr",		_A2(A_T,A_R18),	00002,	LS)	/* LoadQRel      RT<-M[IP+I16] */
+APUOP(M_STOP,		RR,	0x000,	"stop",		_A0(),		00000,	BR)	/* STOP          stop */
+APUOP(M_STOP2,		RR,	0x000,	"stop",		_A1(A_U14),	00000,	BR)	/* STOP          stop */
+APUOP(M_STOPD,		RR,	0x140,	"stopd",	_A3(A_T,A_A,A_B),         00111,	BR)	/* STOPD         stop (with register dependencies) */
+APUOP(M_LNOP,		RR,	0x001,	"lnop",		_A0(),		00000,	LNOP)	/* LNOP          no_operation */
+APUOP(M_SYNC,		RR,	0x002,	"sync",		_A0(),		00000,	BR)	/* SYNC          flush_pipe */
+APUOP(M_DSYNC,		RR,	0x003,	"dsync",	_A0(),		00000,	BR)	/* DSYNC         flush_store_queue */
+APUOP(M_MFSPR,		RR,	0x00c,	"mfspr",	_A2(A_T,A_S),	00002,	SPR)	/* MFSPR         RT<-SA */
+APUOP(M_RDCH,		RR,	0x00d,	"rdch",		_A2(A_T,A_H),	00002,	SPR)	/* ReaDCHannel   RT<-CA:data */
+APUOP(M_RCHCNT,		RR,	0x00f,	"rchcnt",	_A2(A_T,A_H),	00002,	SPR)	/* ReaDCHanCouNT RT<-CA:count */
+APUOP(M_HBRA,		LBT,	0x080,	"hbra",		_A2(A_S11,A_S18),	00000,	LS)	/* HBRA          BTB[B9]<-M[I16] */
+APUOP(M_HBRR,		LBT,	0x090,	"hbrr",		_A2(A_S11,A_R18),	00000,	LS)	/* HBRR          BTB[B9]<-M[IP+I16] */
+APUOP(M_BRZ,		RI16,	0x100,	"brz",		_A2(A_T,A_R18),	00001,	BR)	/* BRZ           IP<-IP+I16_if(RT) */
+APUOP(M_BRNZ,		RI16,	0x108,	"brnz",		_A2(A_T,A_R18),	00001,	BR)	/* BRNZ          IP<-IP+I16_if(RT) */
+APUOP(M_BRHZ,		RI16,	0x110,	"brhz",		_A2(A_T,A_R18),	00001,	BR)	/* BRHZ          IP<-IP+I16_if(RT) */
+APUOP(M_BRHNZ,		RI16,	0x118,	"brhnz",	_A2(A_T,A_R18),	00001,	BR)	/* BRHNZ         IP<-IP+I16_if(RT) */
+APUOP(M_STQA,		RI16,	0x104,	"stqa",		_A2(A_T,A_S18),	00001,	LS)	/* SToreQAbs     M[I16]<-RT */
+APUOP(M_STQR,		RI16,	0x11C,	"stqr",		_A2(A_T,A_R18),	00001,	LS)	/* SToreQRel     M[IP+I16]<-RT */
+APUOP(M_MTSPR,		RR,	0x10c,	"mtspr",	_A2(A_S,A_T),	00001,	SPR)	/* MTSPR         SA<-RT */
+APUOP(M_WRCH,		RR,	0x10d,	"wrch",		_A2(A_H,A_T),	00001,	SPR)	/* ChanWRite     CA<-RT */
+APUOP(M_LQD,		RI10,	0x1a0,	"lqd",		_A4(A_T,A_S14,A_P,A_A),	00012,	LS)	/* LoadQDisp     RT<-M[Ra+I10] */
+APUOP(M_BI,		RR,	0x1a8,	"bi",		_A1(A_A),		00010,	BR)	/* BI            IP<-RA */
+APUOP(M_BISL,		RR,	0x1a9,	"bisl",		_A2(A_T,A_A),	00012,	BR)	/* BISL          RT,IP<-IP,RA */
+APUOP(M_IRET,  		RR,	0x1aa,	"iret",	        _A1(A_A), 	00010,	BR)	/* IRET          IP<-SRR0 */
+APUOP(M_IRET2, 		RR,	0x1aa,	"iret",	        _A0(),	 	00010,	BR)	/* IRET          IP<-SRR0 */
+APUOP(M_BISLED,		RR,	0x1ab,	"bisled",	_A2(A_T,A_A),	00012,	BR)	/* BISLED        RT,IP<-IP,RA_if(ext) */
+APUOP(M_HBR,		LBTI,	0x1ac,	"hbr",		_A2(A_S11I,A_A),	00010,	LS)	/* HBR           BTB[B9]<-M[Ra] */
+APUOP(M_FREST,		RR,	0x1b8,	"frest",	_A2(A_T,A_A),	00012,	SHUF)	/* FREST         RT<-recip(RA) */
+APUOP(M_FRSQEST,	RR,	0x1b9,	"frsqest",	_A2(A_T,A_A),	00012,	SHUF)	/* FRSQEST       RT<-rsqrt(RA) */
+APUOP(M_FSM,		RR,	0x1b4,	"fsm",		_A2(A_T,A_A),	00012,	SHUF)	/* FormSelMask%  RT<-expand(Ra) */
+APUOP(M_FSMH,		RR,	0x1b5,	"fsmh",		_A2(A_T,A_A),	00012,	SHUF)	/* FormSelMask%  RT<-expand(Ra) */
+APUOP(M_FSMB,		RR,	0x1b6,	"fsmb",		_A2(A_T,A_A),	00012,	SHUF)	/* FormSelMask%  RT<-expand(Ra) */
+APUOP(M_GB,		RR,	0x1b0,	"gb",		_A2(A_T,A_A),	00012,	SHUF)	/* GatherBits%   RT<-gather(RA) */
+APUOP(M_GBH,		RR,	0x1b1,	"gbh",		_A2(A_T,A_A),	00012,	SHUF)	/* GatherBits%   RT<-gather(RA) */
+APUOP(M_GBB,		RR,	0x1b2,	"gbb",		_A2(A_T,A_A),	00012,	SHUF)	/* GatherBits%   RT<-gather(RA) */
+APUOP(M_CBD,		RI7,	0x1f4,	"cbd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
+APUOP(M_CHD,		RI7,	0x1f5,	"chd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
+APUOP(M_CWD,		RI7,	0x1f6,	"cwd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
+APUOP(M_CDD,		RI7,	0x1f7,	"cdd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
+APUOP(M_ROTQBII,	RI7,	0x1f8,	"rotqbii",	_A3(A_T,A_A,A_U3),	00012,	SHUF)	/* ROTQBII       RT<-RA<<<I7 */
+APUOP(M_ROTQBYI,	RI7,	0x1fc,	"rotqbyi",	_A3(A_T,A_A,A_S7N),	00012,	SHUF)	/* ROTQBYI       RT<-RA<<<(I7*8) */
+APUOP(M_ROTQMBII,	RI7,	0x1f9,	"rotqmbii",	_A3(A_T,A_A,A_S3),	00012,	SHUF)	/* ROTQMBII      RT<-RA<<I7 */
+APUOP(M_ROTQMBYI,	RI7,	0x1fd,	"rotqmbyi",	_A3(A_T,A_A,A_S6),	00012,	SHUF)	/* ROTQMBYI      RT<-RA<<I7 */
+APUOP(M_SHLQBII,	RI7,	0x1fb,	"shlqbii",	_A3(A_T,A_A,A_U3),	00012,	SHUF)	/* SHLQBII       RT<-RA<<I7 */
+APUOP(M_SHLQBYI,	RI7,	0x1ff,	"shlqbyi",	_A3(A_T,A_A,A_U5),	00012,	SHUF)	/* SHLQBYI       RT<-RA<<I7 */
+APUOP(M_STQD,		RI10,	0x120,	"stqd",		_A4(A_T,A_S14,A_P,A_A),	00011,	LS)	/* SToreQDisp    M[Ra+I10]<-RT */
+APUOP(M_BIHNZ,		RR,	0x12b,	"bihnz",	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP<-RA_if(RT) */
+APUOP(M_BIHZ,		RR,	0x12a,	"bihz",		_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP<-RA_if(RT) */
+APUOP(M_BINZ,		RR,	0x129,	"binz",		_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP<-RA_if(RT) */
+APUOP(M_BIZ,		RR,	0x128,	"biz",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP<-RA_if(RT) */
+APUOP(M_CBX,		RR,	0x1d4,	"cbx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT<-sta(Ra+Rb,siz) */
+APUOP(M_CHX,		RR,	0x1d5,	"chx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT<-sta(Ra+Rb,siz) */
+APUOP(M_CWX,		RR,	0x1d6,	"cwx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT<-sta(Ra+Rb,siz) */
+APUOP(M_CDX,		RR,	0x1d7,	"cdx",		_A3(A_T,A_A,A_B),		00112,	SHUF)	/* genCtl%%insX  RT<-sta(Ra+Rb,siz) */
+APUOP(M_LQX,		RR,	0x1c4,	"lqx",		_A3(A_T,A_A,A_B),		00112,	LS)	/* LoadQindeX    RT<-M[Ra+Rb] */
+APUOP(M_ROTQBI,		RR,	0x1d8,	"rotqbi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* ROTQBI        RT<-RA<<<Rb */
+APUOP(M_ROTQMBI,	RR,	0x1d9,	"rotqmbi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* ROTQMBI       RT<-RA<<Rb */
+APUOP(M_SHLQBI,		RR,	0x1db,	"shlqbi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* SHLQBI        RT<-RA<<Rb */
+APUOP(M_ROTQBY,		RR,	0x1dc,	"rotqby",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQBY        RT<-RA<<<(Rb*8) */
+APUOP(M_ROTQMBY,	RR,	0x1dd,	"rotqmby",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQMBY       RT<-RA<<Rb */
+APUOP(M_SHLQBY,		RR,	0x1df,	"shlqby",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* SHLQBY        RT<-RA<<Rb */
+APUOP(M_ROTQBYBI,	RR,	0x1cc,	"rotqbybi",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQBYBI      RT<-RA<<Rb */
+APUOP(M_ROTQMBYBI,	RR,	0x1cd,	"rotqmbybi",	_A3(A_T,A_A,A_B),		00112,		SHUF)	/* ROTQMBYBI     RT<-RA<<Rb */
+APUOP(M_SHLQBYBI,	RR,	0x1cf,	"shlqbybi",	_A3(A_T,A_A,A_B),		00112,	SHUF)	/* SHLQBYBI      RT<-RA<<Rb */
+APUOP(M_STQX,		RR,	0x144,	"stqx",		_A3(A_T,A_A,A_B),		00111,	LS)	/* SToreQindeX   M[Ra+Rb]<-RT */
+APUOP(M_SHUFB,		RRR,	0x580,	"shufb",	_A4(A_C,A_A,A_B,A_T),	02111,	SHUF)	/* SHUFfleBytes  RC<-f(RA,RB,RT) */
+APUOP(M_IL,		RI16,	0x204,	"il",		_A2(A_T,A_S16),	00002,	FX2)	/* ImmLoad       RT<-sxt(I16) */
+APUOP(M_ILH,		RI16,	0x20c,	"ilh",		_A2(A_T,A_X16),	00002,	FX2)	/* ImmLoadH      RT<-I16 */
+APUOP(M_ILHU,		RI16,	0x208,	"ilhu",		_A2(A_T,A_X16),	00002,	FX2)	/* ImmLoadHUpper RT<-I16<<16 */
+APUOP(M_ILA,		RI18,	0x210,	"ila",		_A2(A_T,A_U18),	00002,	FX2)	/* ImmLoadAddr   RT<-zxt(I18) */
+APUOP(M_NOP,		RR,	0x201,	"nop",		_A1(A_T),		00000,	NOP)	/* XNOP          no_operation */
+APUOP(M_NOP2,		RR,	0x201,	"nop",		_A0(),		00000,	NOP)	/* XNOP          no_operation */
+APUOP(M_IOHL,		RI16,	0x304,	"iohl",		_A2(A_T,A_X16),	00003,	FX2)	/* AddImmeXt     RT<-RT+sxt(I16) */
+APUOP(M_ANDBI,		RI10,	0x0b0,	"andbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* AND%I         RT<-RA&I10 */
+APUOP(M_ANDHI,		RI10,	0x0a8,	"andhi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* AND%I         RT<-RA&I10 */
+APUOP(M_ANDI,		RI10,	0x0a0,	"andi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* AND%I         RT<-RA&I10 */
+APUOP(M_ORBI,		RI10,	0x030,	"orbi",		_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* OR%I          RT<-RA|I10 */
+APUOP(M_ORHI,		RI10,	0x028,	"orhi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* OR%I          RT<-RA|I10 */
+APUOP(M_ORI,		RI10,	0x020,	"ori",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* OR%I          RT<-RA|I10 */
+APUOP(M_ORX,		RR,	0x1f0,	"orx",		_A2(A_T,A_A),		00012,	BR)	/* ORX           RT<-RA.w0|RA.w1|RA.w2|RA.w3 */
+APUOP(M_XORBI,		RI10,	0x230,	"xorbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* XOR%I         RT<-RA^I10 */
+APUOP(M_XORHI,		RI10,	0x228,	"xorhi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* XOR%I         RT<-RA^I10 */
+APUOP(M_XORI,		RI10,	0x220,	"xori",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* XOR%I         RT<-RA^I10 */
+APUOP(M_AHI,		RI10,	0x0e8,	"ahi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* Add%Immed     RT<-RA+I10 */
+APUOP(M_AI,		RI10,	0x0e0,	"ai",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* Add%Immed     RT<-RA+I10 */
+APUOP(M_SFHI,		RI10,	0x068,	"sfhi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* SubFrom%Imm   RT<-I10-RA */
+APUOP(M_SFI,		RI10,	0x060,	"sfi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* SubFrom%Imm   RT<-I10-RA */
+APUOP(M_CGTBI,		RI10,	0x270,	"cgtbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* CGT%I         RT<-(RA>I10) */
+APUOP(M_CGTHI,		RI10,	0x268,	"cgthi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CGT%I         RT<-(RA>I10) */
+APUOP(M_CGTI,		RI10,	0x260,	"cgti",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CGT%I         RT<-(RA>I10) */
+APUOP(M_CLGTBI,		RI10,	0x2f0,	"clgtbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* CLGT%I        RT<-(RA>I10) */
+APUOP(M_CLGTHI,		RI10,	0x2e8,	"clgthi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CLGT%I        RT<-(RA>I10) */
+APUOP(M_CLGTI,		RI10,	0x2e0,	"clgti",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CLGT%I        RT<-(RA>I10) */
+APUOP(M_CEQBI,		RI10,	0x3f0,	"ceqbi",	_A3(A_T,A_A,A_S10B),	00012,	FX2)	/* CEQ%I         RT<-(RA=I10) */
+APUOP(M_CEQHI,		RI10,	0x3e8,	"ceqhi",	_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CEQ%I         RT<-(RA=I10) */
+APUOP(M_CEQI,		RI10,	0x3e0,	"ceqi",		_A3(A_T,A_A,A_S10),	00012,	FX2)	/* CEQ%I         RT<-(RA=I10) */
+APUOP(M_HGTI,		RI10,	0x278,	"hgti",		_A3(A_T,A_A,A_S10),	00010,	FX2)	/* HaltGTI       halt_if(RA>I10) */
+APUOP(M_HGTI2,		RI10,	0x278,	"hgti",		_A2(A_A,A_S10),	00010,	FX2)	/* HaltGTI       halt_if(RA>I10) */
+APUOP(M_HLGTI,		RI10,	0x2f8,	"hlgti",	_A3(A_T,A_A,A_S10),	00010,	FX2)	/* HaltLGTI      halt_if(RA>I10) */
+APUOP(M_HLGTI2,		RI10,	0x2f8,	"hlgti",	_A2(A_A,A_S10),	00010,	FX2)	/* HaltLGTI      halt_if(RA>I10) */
+APUOP(M_HEQI,		RI10,	0x3f8,	"heqi",		_A3(A_T,A_A,A_S10),	00010,	FX2)	/* HaltEQImm     halt_if(RA=I10) */
+APUOP(M_HEQI2,		RI10,	0x3f8,	"heqi",		_A2(A_A,A_S10),	00010,	FX2)	/* HaltEQImm     halt_if(RA=I10) */
+APUOP(M_MPYI,		RI10,	0x3a0,	"mpyi",		_A3(A_T,A_A,A_S10),	00012,	FP7)	/* MPYI          RT<-RA*I10 */
+APUOP(M_MPYUI,		RI10,	0x3a8,	"mpyui",	_A3(A_T,A_A,A_S10),	00012,	FP7)	/* MPYUI         RT<-RA*I10 */
+APUOP(M_CFLTS,		RI8,	0x3b0,	"cflts",	_A3(A_T,A_A,A_U7A),	00012,	FP7)	/* CFLTS         RT<-int(RA,I8) */
+APUOP(M_CFLTU,		RI8,	0x3b2,	"cfltu",	_A3(A_T,A_A,A_U7A),	00012,	FP7)	/* CFLTU         RT<-int(RA,I8) */
+APUOP(M_CSFLT,		RI8,	0x3b4,	"csflt",	_A3(A_T,A_A,A_U7B),	00012,	FP7)	/* CSFLT         RT<-flt(RA,I8) */
+APUOP(M_CUFLT,		RI8,	0x3b6,	"cuflt",	_A3(A_T,A_A,A_U7B),	00012,	FP7)	/* CUFLT         RT<-flt(RA,I8) */
+APUOP(M_FESD,		RR,	0x3b8,	"fesd",		_A2(A_T,A_A),	00012,	FPD)	/* FESD          RT<-double(RA) */
+APUOP(M_FRDS,		RR,	0x3b9,	"frds",		_A2(A_T,A_A),	00012,	FPD)	/* FRDS          RT<-single(RA) */
+APUOP(M_FSCRRD,		RR,	0x398,	"fscrrd",	_A1(A_T),		00002,	FPD)	/* FSCRRD        RT<-FP_status */
+APUOP(M_FSCRWR,		RR,	0x3ba,	"fscrwr",	_A2(A_T,A_A),	00010,	FP7)	/* FSCRWR        FP_status<-RA */
+APUOP(M_FSCRWR2,	RR,	0x3ba,	"fscrwr",	_A1(A_A),		00010,	FP7)	/* FSCRWR        FP_status<-RA */
+APUOP(M_CLZ,		RR,	0x2a5,	"clz",		_A2(A_T,A_A),	00012,	FX2)	/* CLZ           RT<-clz(RA) */
+APUOP(M_CNTB,		RR,	0x2b4,	"cntb",		_A2(A_T,A_A),	00012,	FXB)	/* CNT           RT<-pop(RA) */
+APUOP(M_XSBH,		RR,	0x2b6,	"xsbh",		_A2(A_T,A_A),	00012,	FX2)	/* eXtSignBtoH   RT<-sign_ext(RA) */
+APUOP(M_XSHW,		RR,	0x2ae,	"xshw",		_A2(A_T,A_A),	00012,	FX2)	/* eXtSignHtoW   RT<-sign_ext(RA) */
+APUOP(M_XSWD,		RR,	0x2a6,	"xswd",		_A2(A_T,A_A),	00012,	FX2)	/* eXtSignWtoD   RT<-sign_ext(RA) */
+APUOP(M_ROTI,		RI7,	0x078,	"roti",		_A3(A_T,A_A,A_S7N),	00012,	FX3)	/* ROT%I         RT<-RA<<<I7 */
+APUOP(M_ROTMI,		RI7,	0x079,	"rotmi",	_A3(A_T,A_A,A_S7),	00012,	FX3)	/* ROT%MI        RT<-RA<<I7 */
+APUOP(M_ROTMAI,		RI7,	0x07a,	"rotmai",	_A3(A_T,A_A,A_S7),	00012,	FX3)	/* ROTMA%I       RT<-RA<<I7 */
+APUOP(M_SHLI,		RI7,	0x07b,	"shli",		_A3(A_T,A_A,A_U6),	00012,	FX3)	/* SHL%I         RT<-RA<<I7 */
+APUOP(M_ROTHI,		RI7,	0x07c,	"rothi",	_A3(A_T,A_A,A_S7N),	00012,	FX3)	/* ROT%I         RT<-RA<<<I7 */
+APUOP(M_ROTHMI,		RI7,	0x07d,	"rothmi",	_A3(A_T,A_A,A_S6),	00012,	FX3)	/* ROT%MI        RT<-RA<<I7 */
+APUOP(M_ROTMAHI,	RI7,	0x07e,	"rotmahi",	_A3(A_T,A_A,A_S6),	00012,	FX3)	/* ROTMA%I       RT<-RA<<I7 */
+APUOP(M_SHLHI,		RI7,	0x07f,	"shlhi",	_A3(A_T,A_A,A_U5),	00012,	FX3)	/* SHL%I         RT<-RA<<I7 */
+APUOP(M_A,		RR,	0x0c0,	"a",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* Add%          RT<-RA+RB */
+APUOP(M_AH,		RR,	0x0c8,	"ah",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* Add%          RT<-RA+RB */
+APUOP(M_SF,		RR,	0x040,	"sf",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* SubFrom%      RT<-RB-RA */
+APUOP(M_SFH,		RR,	0x048,	"sfh",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* SubFrom%      RT<-RB-RA */
+APUOP(M_CGT,		RR,	0x240,	"cgt",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CGT%          RT<-(RA>RB) */
+APUOP(M_CGTB,		RR,	0x250,	"cgtb",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CGT%          RT<-(RA>RB) */
+APUOP(M_CGTH,		RR,	0x248,	"cgth",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CGT%          RT<-(RA>RB) */
+APUOP(M_CLGT,		RR,	0x2c0,	"clgt",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CLGT%         RT<-(RA>RB) */
+APUOP(M_CLGTB,		RR,	0x2d0,	"clgtb",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* CLGT%         RT<-(RA>RB) */
+APUOP(M_CLGTH,		RR,	0x2c8,	"clgth",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* CLGT%         RT<-(RA>RB) */
+APUOP(M_CEQ,		RR,	0x3c0,	"ceq",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CEQ%          RT<-(RA=RB) */
+APUOP(M_CEQB,		RR,	0x3d0,	"ceqb",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CEQ%          RT<-(RA=RB) */
+APUOP(M_CEQH,		RR,	0x3c8,	"ceqh",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* CEQ%          RT<-(RA=RB) */
+APUOP(M_HGT,		RR,	0x258,	"hgt",		_A3(A_T,A_A,A_B),		00110,	FX2)	/* HaltGT        halt_if(RA>RB) */
+APUOP(M_HGT2,		RR,	0x258,	"hgt",		_A2(A_A,A_B),	00110,	FX2)	/* HaltGT        halt_if(RA>RB) */
+APUOP(M_HLGT,		RR,	0x2d8,	"hlgt",		_A3(A_T,A_A,A_B),		00110,	FX2)	/* HaltLGT       halt_if(RA>RB) */
+APUOP(M_HLGT2,		RR,	0x2d8,	"hlgt",		_A2(A_A,A_B),	00110,	FX2)	/* HaltLGT       halt_if(RA>RB) */
+APUOP(M_HEQ,		RR,	0x3d8,	"heq",		_A3(A_T,A_A,A_B),		00110,	FX2)	/* HaltEQ        halt_if(RA=RB) */
+APUOP(M_HEQ2,		RR,	0x3d8,	"heq",		_A2(A_A,A_B),	00110,	FX2)	/* HaltEQ        halt_if(RA=RB) */
+APUOP(M_FCEQ,		RR,	0x3c2,	"fceq",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCEQ          RT<-(RA=RB) */
+APUOP(M_FCMEQ,		RR,	0x3ca,	"fcmeq",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCMEQ         RT<-(|RA|=|RB|) */
+APUOP(M_FCGT,		RR,	0x2c2,	"fcgt",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCGT          RT<-(RA<RB) */
+APUOP(M_FCMGT,		RR,	0x2ca,	"fcmgt",	_A3(A_T,A_A,A_B),		00112,	FX2)	/* FCMGT         RT<-(|RA|<|RB|) */
+APUOP(M_AND,		RR,	0x0c1,	"and",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* AND           RT<-RA&RB */
+APUOP(M_NAND,		RR,	0x0c9,	"nand",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* NAND          RT<-!(RA&RB) */
+APUOP(M_OR,		RR,	0x041,	"or",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* OR            RT<-RA|RB */
+APUOP(M_NOR,		RR,	0x049,	"nor",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* NOR           RT<-!(RA&RB) */
+APUOP(M_XOR,		RR,	0x241,	"xor",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* XOR           RT<-RA^RB */
+APUOP(M_EQV,		RR,	0x249,	"eqv",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* EQuiValent    RT<-!(RA^RB) */
+APUOP(M_ANDC,		RR,	0x2c1,	"andc",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* ANDComplement RT<-RA&!RB */
+APUOP(M_ORC,		RR,	0x2c9,	"orc",		_A3(A_T,A_A,A_B),		00112,	FX2)	/* ORComplement  RT<-RA|!RB */
+APUOP(M_ABSDB,		RR,	0x053,	"absdb",	_A3(A_T,A_A,A_B),		00112,	FXB)	/* ABSoluteDiff  RT<-|RA-RB| */
+APUOP(M_AVGB,		RR,	0x0d3,	"avgb",		_A3(A_T,A_A,A_B),		00112,	FXB)	/* AVG%          RT<-(RA+RB+1)/2 */
+APUOP(M_SUMB,		RR,	0x253,	"sumb",		_A3(A_T,A_A,A_B),		00112,	FXB)	/* SUM%          RT<-f(RA,RB) */
+APUOP(M_DFA,		RR,	0x2cc,	"dfa",		_A3(A_T,A_A,A_B),		00112,	FPD)	/* DFAdd         RT<-RA+RB */
+APUOP(M_DFM,		RR,	0x2ce,	"dfm",		_A3(A_T,A_A,A_B),		00112,	FPD)	/* DFMul         RT<-RA*RB */
+APUOP(M_DFS,		RR,	0x2cd,	"dfs",		_A3(A_T,A_A,A_B),		00112,	FPD)	/* DFSub         RT<-RA-RB */
+APUOP(M_FA,		RR,	0x2c4,	"fa",		_A3(A_T,A_A,A_B),		00112,	FP6)	/* FAdd          RT<-RA+RB */
+APUOP(M_FM,		RR,	0x2c6,	"fm",		_A3(A_T,A_A,A_B),		00112,	FP6)	/* FMul          RT<-RA*RB */
+APUOP(M_FS,		RR,	0x2c5,	"fs",		_A3(A_T,A_A,A_B),		00112,	FP6)	/* FSub          RT<-RA-RB */
+APUOP(M_MPY,		RR,	0x3c4,	"mpy",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPY           RT<-RA*RB */
+APUOP(M_MPYH,		RR,	0x3c5,	"mpyh",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYH          RT<-(RAh*RB)<<16 */
+APUOP(M_MPYHH,		RR,	0x3c6,	"mpyhh",	_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYHH         RT<-RAh*RBh */
+APUOP(M_MPYHHU,		RR,	0x3ce,	"mpyhhu",	_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYHHU        RT<-RAh*RBh */
+APUOP(M_MPYS,		RR,	0x3c7,	"mpys",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYS          RT<-(RA*RB)>>16 */
+APUOP(M_MPYU,		RR,	0x3cc,	"mpyu",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* MPYU          RT<-RA*RB */
+APUOP(M_FI,		RR,	0x3d4,	"fi",		_A3(A_T,A_A,A_B),		00112,	FP7)	/* FInterpolate  RT<-f(RA,RB) */
+APUOP(M_ROT,		RR,	0x058,	"rot",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%          RT<-RA<<<RB */
+APUOP(M_ROTM,		RR,	0x059,	"rotm",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%M         RT<-RA<<Rb */
+APUOP(M_ROTMA,		RR,	0x05a,	"rotma",	_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROTMA%        RT<-RA<<Rb */
+APUOP(M_SHL,		RR,	0x05b,	"shl",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* SHL%          RT<-RA<<Rb */
+APUOP(M_ROTH,		RR,	0x05c,	"roth",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%          RT<-RA<<<RB */
+APUOP(M_ROTHM,		RR,	0x05d,	"rothm",	_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROT%M         RT<-RA<<Rb */
+APUOP(M_ROTMAH,		RR,	0x05e,	"rotmah",	_A3(A_T,A_A,A_B),		00112,	FX3)	/* ROTMA%        RT<-RA<<Rb */
+APUOP(M_SHLH,		RR,	0x05f,	"shlh",		_A3(A_T,A_A,A_B),		00112,	FX3)	/* SHL%          RT<-RA<<Rb */
+APUOP(M_MPYHHA,		RR,	0x346,	"mpyhha",	_A3(A_T,A_A,A_B),		00113,	FP7)	/* MPYHHA        RT<-RAh*RBh+RT */
+APUOP(M_MPYHHAU,	RR,	0x34e,	"mpyhhau",	_A3(A_T,A_A,A_B),		00113,	FP7)	/* MPYHHAU       RT<-RAh*RBh+RT */
+APUOP(M_DFMA,		RR,	0x35c,	"dfma",		_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFMAdd        RT<-RT+RA*RB */
+APUOP(M_DFMS,		RR,	0x35d,	"dfms",		_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFMSub        RT<-RA*RB-RT */
+APUOP(M_DFNMS,		RR,	0x35e,	"dfnms",	_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFNMSub       RT<-RT-RA*RB */
+APUOP(M_DFNMA,		RR,	0x35f,	"dfnma",	_A3(A_T,A_A,A_B),		00113,	FPD)	/* DFNMAdd       RT<-(-RT)-RA*RB */
+APUOP(M_FMA,		RRR,	0x700,	"fma",		_A4(A_C,A_A,A_B,A_T),	02111,	FP6)	/* FMAdd         RC<-RT+RA*RB */
+APUOP(M_FMS,		RRR,	0x780,	"fms",		_A4(A_C,A_A,A_B,A_T),	02111,	FP6)	/* FMSub         RC<-RA*RB-RT */
+APUOP(M_FNMS,		RRR,	0x680,	"fnms",		_A4(A_C,A_A,A_B,A_T),	02111,	FP6)	/* FNMSub        RC<-RT-RA*RB */
+APUOP(M_MPYA,		RRR,	0x600,	"mpya",		_A4(A_C,A_A,A_B,A_T),	02111,	FP7)	/* MPYA          RC<-RA*RB+RT */
+APUOP(M_SELB,		RRR,	0x400,	"selb",		_A4(A_C,A_A,A_B,A_T),	02111,	FX2)	/* SELectBits    RC<-RA&RT|RB&!RT */
+/* for system function call, this uses op-code of mtspr */
+APUOP(M_SYSCALL,	RI7,    0x10c,	"syscall",      _A3(A_T,A_A,A_S7N),	00002,	SPR)        /* System Call */
+/*
+pseudo instruction:
+system call
+value of I9	operation
+0	halt
+1		rt[0] = open(MEM[ra[0]],	ra[1])
+2		rt[0] = close(ra[0])
+3		rt[0] = read(ra[0],	MEM[ra[1]],	ra[2])
+4		rt[0] = write(ra[0],	MEM[ra[1]],	ra[2])
+5		printf(MEM[ra[0]],	ra[1],	ra[2],	ra[3])
+42		rt[0] = clock()
+52		rt[0] = lseek(ra0,	ra1,	ra2)
+
+*/
+
+
+/* new multiprecision add/sub */
+APUOP(M_ADDX,		RR,	0x340,	"addx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* Add_eXtended  RT<-RA+RB+RT */
+APUOP(M_CG,		RR,	0x0c2,	"cg",		_A3(A_T,A_A,A_B),		00112,		FX2)	/* CarryGenerate RT<-cout(RA+RB) */
+APUOP(M_CGX,		RR,	0x342,	"cgx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* CarryGen_eXtd RT<-cout(RA+RB+RT) */
+APUOP(M_SFX,		RR,	0x341,	"sfx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* Add_eXtended  RT<-RA+RB+RT */
+APUOP(M_BG,		RR,	0x042,	"bg",		_A3(A_T,A_A,A_B),		00112,		FX2)	/* CarryGenerate RT<-cout(RA+RB) */
+APUOP(M_BGX,		RR,	0x343,	"bgx",		_A3(A_T,A_A,A_B),		00113,		FX2)	/* CarryGen_eXtd RT<-cout(RA+RB+RT) */
+
+/*
+
+The following ops are a subset of above except with feature bits set.
+Feature bits are bits 11-17 of the instruction:
+
+  11 - C & P feature bit
+  12 - disable interrupts
+  13 - enable interrupts
+
+*/
+APUOPFB(M_BID,		RR,	0x1a8,	0x20,	"bid",		_A1(A_A),		00010,	BR)	/* BI            IP<-RA */
+APUOPFB(M_BIE,		RR,	0x1a8,	0x10,	"bie",		_A1(A_A),		00010,	BR)	/* BI            IP<-RA */
+APUOPFB(M_BISLD,	RR,	0x1a9,	0x20,	"bisld",	_A2(A_T,A_A),	00012,	BR)	/* BISL          RT,IP<-IP,RA */
+APUOPFB(M_BISLE,	RR,	0x1a9,	0x10,	"bisle",	_A2(A_T,A_A),	00012,	BR)	/* BISL          RT,IP<-IP,RA */
+APUOPFB(M_IRETD,  	RR,	0x1aa,	0x20,	"iretd",	_A1(A_A), 	00010,	BR)	/* IRET          IP<-SRR0 */
+APUOPFB(M_IRETD2,  	RR,	0x1aa,	0x20,	"iretd",	_A0(),	 	00010,	BR)	/* IRET          IP<-SRR0 */
+APUOPFB(M_IRETE,  	RR,	0x1aa,	0x10,	"irete",	_A1(A_A), 	00010,	BR)	/* IRET          IP<-SRR0 */
+APUOPFB(M_IRETE2,  	RR,	0x1aa,	0x10,	"irete",	_A0(),	 	00010,	BR)	/* IRET          IP<-SRR0 */
+APUOPFB(M_BISLEDD,	RR,	0x1ab,	0x20,	"bisledd",	_A2(A_T,A_A),	00012,	BR)	/* BISLED        RT,IP<-IP,RA_if(ext) */
+APUOPFB(M_BISLEDE,	RR,	0x1ab,	0x10,	"bislede",	_A2(A_T,A_A),	00012,	BR)	/* BISLED        RT,IP<-IP,RA_if(ext) */
+APUOPFB(M_BIHNZD,	RR,	0x12b,	0x20,	"bihnzd",	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP<-RA_if(RT) */
+APUOPFB(M_BIHNZE,	RR,	0x12b,	0x10,	"bihnze",	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP<-RA_if(RT) */
+APUOPFB(M_BIHZD,	RR,	0x12a,	0x20,	"bihzd",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP<-RA_if(RT) */
+APUOPFB(M_BIHZE,	RR,	0x12a,	0x10,	"bihze",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP<-RA_if(RT) */
+APUOPFB(M_BINZD,	RR,	0x129,	0x20,	"binzd",	_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP<-RA_if(RT) */
+APUOPFB(M_BINZE,	RR,	0x129,	0x10,	"binze",	_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP<-RA_if(RT) */
+APUOPFB(M_BIZD,		RR,	0x128,	0x20,	"bizd",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP<-RA_if(RT) */
+APUOPFB(M_BIZE,		RR,	0x128,	0x10,	"bize",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP<-RA_if(RT) */
+APUOPFB(M_SYNCC,	RR,	0x002,	0x40,	"syncc",	_A0(),		00000,	BR)	/* SYNCC          flush_pipe */
+APUOPFB(M_HBRP,		LBTI,	0x1ac,	0x40,	"hbrp",		_A0(),	        00010,	LS)	/* HBR           BTB[B9]<-M[Ra] */
+
+/* Synonyms required by the AS manual. */
+APUOP(M_LR,		RI10,	0x020,	"lr",		_A2(A_T,A_A),	00012,	FX2)	/* OR%I          RT<-RA|I10 */
+APUOP(M_BIHT,		RR,	0x12b,	"biht", 	_A2(A_T,A_A),	00011,	BR)	/* BIHNZ         IP<-RA_if(RT) */
+APUOP(M_BIHF,		RR,	0x12a,	"bihf",		_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP<-RA_if(RT) */
+APUOP(M_BIT,		RR,	0x129,	"bit",		_A2(A_T,A_A),	00011,	BR)	/* BINZ          IP<-RA_if(RT) */
+APUOP(M_BIF,		RR,	0x128,	"bif",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP<-RA_if(RT) */
+APUOPFB(M_BIHTD,	RR,	0x12b,	0x20,	"bihtd",	_A2(A_T,A_A),	00011,	BR)	/* BIHNF         IP<-RA_if(RT) */
+APUOPFB(M_BIHTE,	RR,	0x12b,	0x10,	"bihte",	_A2(A_T,A_A),	00011,	BR)	/* BIHNF         IP<-RA_if(RT) */
+APUOPFB(M_BIHFD,	RR,	0x12a,	0x20,	"bihfd",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP<-RA_if(RT) */
+APUOPFB(M_BIHFE,	RR,	0x12a,	0x10,	"bihfe",	_A2(A_T,A_A),	00011,	BR)	/* BIHZ          IP<-RA_if(RT) */
+APUOPFB(M_BITD, 	RR,	0x129,	0x20,	"bitd", 	_A2(A_T,A_A),	00011,	BR)	/* BINF          IP<-RA_if(RT) */
+APUOPFB(M_BITE, 	RR,	0x129,	0x10,	"bite", 	_A2(A_T,A_A),	00011,	BR)	/* BINF          IP<-RA_if(RT) */
+APUOPFB(M_BIFD,		RR,	0x128,	0x20,	"bifd",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP<-RA_if(RT) */
+APUOPFB(M_BIFE,		RR,	0x128,	0x10,	"bife",		_A2(A_T,A_A),	00011,	BR)	/* BIZ           IP<-RA_if(RT) */
+
+#undef _A0
+#undef _A1
+#undef _A2
+#undef _A3
+#undef _A4
Index: include/opcode/spu.h
===================================================================
RCS file: include/opcode/spu.h
diff -N include/opcode/spu.h
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ include/opcode/spu.h	24 Oct 2006 23:53:05 -0000
@@ -0,0 +1,126 @@
+/* SPU ELF support for BFD.
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of GDB, GAS, and the GNU binutils.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software Foundation,
+   Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+
+/* These two enums are from rel_apu/common/spu_asm_format.h */
+/* definition of instruction format */
+typedef enum {
+  RRR,
+  RI18,
+  RI16,
+  RI10,
+  RI8,
+  RI7,
+  RR,
+  LBT,
+  LBTI,
+  IDATA,
+  UNKNOWN_IFORMAT
+} spu_iformat;
+
+/* These values describe assembly instruction arguments.  They indicate
+ * how to encode, range checking and which relocation to use. */
+typedef enum {
+  A_T,  /* register at pos 0 */
+  A_A,  /* register at pos 7 */
+  A_B,  /* register at pos 14 */
+  A_C,  /* register at pos 21 */
+  A_S,  /* special purpose register at pos 7 */
+  A_H,  /* channel register at pos 7 */
+  A_P,  /* parenthesis, this has to separate regs from immediates */
+  A_S3,
+  A_S6,
+  A_S7N,
+  A_S7,
+  A_U7A,
+  A_U7B,
+  A_S10B,
+  A_S10,
+  A_S11,
+  A_S11I,
+  A_S14,
+  A_S16,
+  A_S18,
+  A_R18,
+  A_U3,
+  A_U5,
+  A_U6,
+  A_U7,
+  A_U14,
+  A_X16,
+  A_U18,
+  A_MAX
+} spu_aformat;
+
+enum spu_insns {
+#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+	TAG,
+#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+	TAG,
+#include "opcode/spu-insns.h"
+#undef APUOP
+#undef APUOPFB
+        M_SPU_MAX
+};
+
+struct spu_opcode
+{
+   spu_iformat insn_type;
+   unsigned int opcode;
+   char *mnemonic;
+   int arg[5];
+};
+
+#define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) << (32-size-pos))) >> (32-size))
+#define UNSIGNED_EXTRACT(insn,size,pos) (((insn) >> pos) & ((1 << size)-1))
+
+#define DECODE_INSN_RT(insn) (insn & 0x7f)
+#define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f)
+#define DECODE_INSN_RB(insn) ((insn >> 14) & 0x7f)
+#define DECODE_INSN_RC(insn) ((insn >> 21) & 0x7f)
+
+#define DECODE_INSN_I10(insn) SIGNED_EXTRACT(insn,10,14)
+#define DECODE_INSN_U10(insn) UNSIGNED_EXTRACT(insn,10,14)
+
+/* For branching, immediate loads, hbr and  lqa/stqa. */
+#define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7)
+#define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7)
+
+/* for stop */
+#define DECODE_INSN_U14(insn) UNSIGNED_EXTRACT(insn,14,0)
+
+/* For ila */
+#define DECODE_INSN_I18(insn) SIGNED_EXTRACT(insn,18,7)
+#define DECODE_INSN_U18(insn) UNSIGNED_EXTRACT(insn,18,7)
+
+/* For rotate and shift and generate control mask */
+#define DECODE_INSN_I7(insn) SIGNED_EXTRACT(insn,7,14)
+#define DECODE_INSN_U7(insn) UNSIGNED_EXTRACT(insn,7,14)
+
+/* For float <-> int conversion */
+#define DECODE_INSN_I8(insn)  SIGNED_EXTRACT(insn,8,14)
+#define DECODE_INSN_U8(insn) UNSIGNED_EXTRACT(insn,8,14)
+
+/* For hbr  */
+#define DECODE_INSN_I9a(insn) ((SIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
+#define DECODE_INSN_I9b(insn) ((SIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
+#define DECODE_INSN_U9a(insn) ((UNSIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
+#define DECODE_INSN_U9b(insn) ((UNSIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
+
Index: ld/Makefile.am
===================================================================
RCS file: /cvs/src/src/ld/Makefile.am,v
retrieving revision 1.223
diff -u -p -r1.223 Makefile.am
--- ld/Makefile.am	16 Oct 2006 21:34:24 -0000	1.223
+++ ld/Makefile.am	25 Oct 2006 00:41:03 -0000
@@ -134,6 +134,7 @@ ALL_EMULATIONS = \
 	eavr6.o \
 	ecoff_i860.o \
 	ecoff_sparc.o \
+	eelf32_spu.o \
 	ecrisaout.o \
 	ecriself.o \
 	ecrislinux.o \
@@ -414,7 +415,8 @@ ALL_64_EMULATIONS = \
 ALL_EMUL_EXTRA_OFILES = \
 	deffilep.o \
 	pe-dll.o \
-	pep-dll.o
+	pep-dll.o \
+	spu_inc.o
 
 CFILES = ldctor.c ldemul.c ldexp.c ldfile.c ldlang.c \
 	ldmain.c ldmisc.c ldver.c ldwrite.c lexsup.c \
@@ -709,6 +711,17 @@ eelf32_sparc_vxworks.c: $(srcdir)/emulpa
   $(srcdir)/emultempl/vxworks.em $(ELF_DEPS) \
   $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32_sparc_vxworks "$(tdir_elf32_sparc_vxworks)"
+eelf32_spu.c: $(srcdir)/emulparams/elf32_spu.sh $(srcdir)/emultempl/spuelf.em \
+  $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+	${GENSCRIPTS} elf32_spu "$(tdir_elf32_spu)"
+spu_inc.o: $(srcdir)/emultempl/spu_inc.s $(srcdir)/emultempl/spu_ovl.o
+	$(CC) -c -Wa,-I,$(srcdir)/emultempl -o $@ $<
+$(srcdir)/emultempl/spu_ovl.o: @MAINT@ $(srcdir)/emultempl/spu_ovl.S
+	cpp -DOVLY_IRQ_SAVE $(srcdir)/emultempl/spu_ovl.S spu_ovl.s
+	if ../gas/as-new --version \
+		| grep 'target.*spu' >/dev/null 2>/dev/null; then \
+	  ../gas/as-new -o $@ spu_ovl.s; \
+	fi
 eelf32_i860.c: $(srcdir)/emulparams/elf32_i860.sh \
   $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
 	${GENSCRIPTS} elf32_i860 "$(tdir_elf32_i860)"
@@ -1772,7 +1785,7 @@ MOSTLYCLEANFILES = $(STAGESTUFF) ld1$(EX
 	ldemul-list.h crtbegin.o crtend.o ld.log ld.sum
 mostlyclean-local:
 	-rm -rf tmpdir
-CLEANFILES = dep.sed DEP DEPA DEP1 DEP2
+CLEANFILES = dep.sed DEP DEPA DEP1 DEP2 spu_ovl.s
 
 .PHONY: install-html install-html-am install-html-recursive
 
@@ -1851,7 +1864,7 @@ install-data-local: install-info
 
 # Stuff that should be included in a distribution.  The diststuff
 # target is run by the taz target in ../Makefile.in.
-EXTRA_DIST = ldgram.c ldgram.h ldlex.c $(man_MANS)
+EXTRA_DIST = ldgram.c ldgram.h ldlex.c spu_ovl.o $(man_MANS)
 diststuff: info $(EXTRA_DIST)
 all: info ld.1
 
Index: ld/configure.tgt
===================================================================
RCS file: /cvs/src/src/ld/configure.tgt,v
retrieving revision 1.196
diff -u -p -r1.196 configure.tgt
--- ld/configure.tgt	18 Oct 2006 16:24:01 -0000	1.196
+++ ld/configure.tgt	24 Oct 2006 23:53:08 -0000
@@ -548,6 +548,8 @@ sparc*-*-solaris2*)	targ_emul=elf32_spar
 sparc*-wrs-vxworks*)	targ_emul=sparcaout ;;
 sparc*-*-rtems*)        targ_emul=elf32_sparc
 			;;
+spu-*-elf*)		targ_emul=elf32_spu
+			targ_extra_ofiles="spu_inc.o" ;;
 tic30-*-*aout*)		targ_emul=tic30aout ;;
 tic30-*-*coff*)		targ_emul=tic30coff ;;
 tic4x-*-* | c4x-*-*)    targ_emul=tic4xcoff ; targ_extra_emuls="tic3xcoff tic3xcoff_onchip" ;;
Index: ld/ldlang.c
===================================================================
RCS file: /cvs/src/src/ld/ldlang.c,v
retrieving revision 1.243
diff -u -p -r1.243 ldlang.c
--- ld/ldlang.c	19 Oct 2006 02:10:41 -0000	1.243
+++ ld/ldlang.c	24 Oct 2006 23:53:11 -0000
@@ -68,8 +68,6 @@ static struct bfd_hash_table lang_define
 static void exp_init_os (etree_type *);
 static void init_map_userdata (bfd *, asection *, void *);
 static lang_input_statement_type *lookup_name (const char *);
-static bfd_boolean load_symbols (lang_input_statement_type *,
-				 lang_statement_list_type *);
 static struct bfd_hash_entry *lang_definedness_newfunc
  (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
 static void insert_undefined (const char *);
@@ -2387,7 +2385,7 @@ check_excluded_libs (bfd *abfd)
 
 /* Get the symbols for an input file.  */
 
-static bfd_boolean
+bfd_boolean
 load_symbols (lang_input_statement_type *entry,
 	      lang_statement_list_type *place)
 {
Index: ld/ldlang.h
===================================================================
RCS file: /cvs/src/src/ld/ldlang.h,v
retrieving revision 1.68
diff -u -p -r1.68 ldlang.h
--- ld/ldlang.h	27 Sep 2006 04:18:15 -0000	1.68
+++ ld/ldlang.h	24 Oct 2006 23:53:12 -0000
@@ -619,5 +619,7 @@ extern void lang_update_definedness
   (const char *, struct bfd_link_hash_entry *);
 
 extern void add_excluded_libs (const char *);
+extern bfd_boolean load_symbols
+  (lang_input_statement_type *, lang_statement_list_type *);
 
 #endif
Index: ld/emulparams/elf32_spu.sh
===================================================================
RCS file: ld/emulparams/elf32_spu.sh
diff -N ld/emulparams/elf32_spu.sh
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/emulparams/elf32_spu.sh	24 Oct 2006 23:53:12 -0000
@@ -0,0 +1,19 @@
+SCRIPT_NAME=elf
+TEMPLATE_NAME=elf32
+EXTRA_EM_FILE=spuelf
+OUTPUT_FORMAT="elf32-spu"
+ARCH=spu
+MACHINE=
+ALIGNMENT=16
+TEXT_START_ADDR=0
+INITIAL_READONLY_SECTIONS='.interrupt : { KEEP(*(.interrupt)) }'
+if test -z "${CREATE_SHLIB}"; then
+  INITIAL_READONLY_SECTIONS="${INITIAL_READONLY_SECTIONS}
+  .interp       ${RELOCATING-0} : { *(.interp) }"
+fi
+OTHER_END_SYMBOLS='PROVIDE (__stack = 0x3fff0);'
+NO_SMALL_DATA=true
+EMBEDDED=true
+MAXPAGESIZE=0x80
+DATA_ADDR="ALIGN(${MAXPAGESIZE})"
+OTHER_BSS_SECTIONS=".toe ALIGN(128) : { *(.toe) } = 0"
Index: ld/emultempl/spu_inc.s
===================================================================
RCS file: ld/emultempl/spu_inc.s
diff -N ld/emultempl/spu_inc.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/emultempl/spu_inc.s	24 Oct 2006 23:53:12 -0000
@@ -0,0 +1,7 @@
+ .text
+ .globl _binary_builtin_ovl_mgr_start
+ .globl _binary_builtin_ovl_mgr_end
+
+_binary_builtin_ovl_mgr_start:
+ .incbin "spu_ovl.o"
+_binary_builtin_ovl_mgr_end:
Index: ld/emultempl/spu_ovl.S
===================================================================
RCS file: ld/emultempl/spu_ovl.S
diff -N ld/emultempl/spu_ovl.S
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/emultempl/spu_ovl.S	25 Oct 2006 06:32:16 -0000
@@ -0,0 +1,275 @@
+/* Overlay manager for SPU.
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of GLD, the Gnu Linker.
+
+   GLD is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2, or (at your option)
+   any later version.
+
+   GLD is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GLD; see the file COPYING.  If not, write to the Free
+   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+   02110-1301, USA.  */
+
+/**
+ * MFC DMA defn's.
+ */
+#define MFC_GET_CMD		0x40
+#define MFC_MAX_DMA_SIZE	0x4000
+#define MFC_TAG_UPDATE_ALL	2
+#define MFC_TAG_ID		0
+
+
+/**
+ * Temporary register allocations.
+ * These are saved/restored here.
+ */
+#define tab		$75
+#define cgbits		$75
+#define add64		$75
+#define ealo		$75
+#define newmask		$75
+#define tagstat		$75
+#define bchn		$75
+#define rv1		$75
+
+#define off		$76
+#define off64		$76
+#define maxsize		$76
+#define oldmask		$76
+#define sz		$76
+#define lnkr		$76
+#define rv2		$76
+
+#define cur		$77
+#define cmp		$77
+#define buf		$77
+#define genwi		$77
+#define tagid		$77
+#define cmd		$77
+#define rv3		$77
+
+#define cgshuf		$78
+
+#define vma		$6
+
+#define map		$7
+#define size		$7
+#define cmp2		$7
+
+#define ea64		$8
+#define retval		$8
+
+#ifdef OVLY_IRQ_SAVE
+#define irqtmp		$8
+#define irq_stat	$9
+#endif
+
+	.extern		_ovly_table
+	.extern		_ovly_buf_table
+
+	.text
+	.align 		4
+__rv_pattern:
+	.word		0x00010203, 0x1c1d1e1f, 0x00010203, 0x10111213
+__cg_pattern:
+	.word		0x04050607, 0x80808080, 0x80808080, 0x80808080
+
+/**
+ * __ovly_return - stub for returning from overlay functions.
+ *
+ * inputs:
+ *	$lr	link register
+ *
+ * outputs:
+ *	$78	old partition number, to be reloaded
+ *	$79	return address in old partion number
+ */
+	.global		__ovly_return
+	.type		__ovly_return, @function
+
+	.word		0
+__ovly_return:
+	shlqbyi		$78, $lr, 4
+	shlqbyi		$79, $lr, 8
+	biz		$78, $79
+
+/**
+ * __ovly_load - copy an overlay partion to local store.
+ *
+ * inputs:
+ *	$78	partition number to be loaded.
+ *	$79	branch target in new partition.
+ *	$lr	link register, containing return addr.
+ *
+ * outputs:
+ *	$lr	new link register, returning through __ovly_return.
+ *
+ * Copy a new overlay partition into local store, or return 
+ * immediately if the partition is already resident.
+ */
+	.global		__ovly_load
+	.type		__ovly_load, @function
+
+__ovly_load:
+/* Save temporary registers to stack. */
+	stqd		$6, -16($sp)
+	stqd		$7, -32($sp)
+	stqd		$8, -48($sp)
+
+#ifdef OVLY_IRQ_SAVE
+/* Save irq state, then disable interrupts. */ 
+	stqd		$9, -64($sp)
+	ila		irqtmp, __ovly_irq_save
+	rdch		irq_stat, $SPU_RdMachStat
+	bid		irqtmp
+__ovly_irq_save:
+#endif
+
+/* Set branch hint to overlay target. */
+	hbr		__ovly_load_ret, $79
+
+/* Get caller's overlay index by back chaining through stack frames.
+ * Loop until end of stack (back chain all-zeros) or
+ * encountered a link register we set here. */
+	lqd		bchn, 0($sp)
+	ila		retval, __ovly_return
+
+__ovly_backchain_loop:
+	lqd		lnkr, 16(bchn)
+	lqd		bchn, 0(bchn)
+	ceq		cmp, lnkr, retval
+	ceqi		cmp2, bchn, 0
+	or		cmp, cmp, cmp2	
+	brz		cmp, __ovly_backchain_loop
+
+/* If we reached the zero back-chain, then lnkr is bogus.  Clear the
+ * part of lnkr that we use later (slot 3). */
+	rotqbyi		cmp2, cmp2, 4
+	andc		lnkr, lnkr, cmp2
+
+/* Set lr = {__ovly_return, prev ovl ndx, caller return adr, callee ovl ndx}. */
+	lqd		rv1, (__rv_pattern-__ovly_return+4)(retval)
+	shufb		rv2, retval, lnkr, rv1
+	shufb		rv3, $lr, $78, rv1
+	fsmbi		rv1, 0xff
+	selb		$lr, rv2, rv3, rv1
+
+/* Branch to $79 if non-overlay */
+	brz		$78, __ovly_load_restore
+
+/* Load values from _ovly_table[$78].
+ *	extern struct {
+ *		u32 vma;
+ *		u32 size;
+ *		u32 file_offset;
+ *		u32 buf;
+ *	} _ovly_table[];
+ */
+	shli		off, $78, 4
+	ila		tab, _ovly_table - 16
+	lqx		vma, tab, off
+	rotqbyi		buf, vma, 12
+
+/* Load values from _ovly_buf_table[buf].
+ *	extern struct {
+ *		u32 mapped;
+ *	} _ovly_buf_table[];
+ */
+	ila		tab, _ovly_buf_table
+	ai		off, buf, -1
+	shli		off, off, 2
+	lqx		map, tab, off
+	rotqby		cur, map, off
+
+/* Branch to $79 now if overlay is already mapped.  */
+	ceq		cmp, $78, cur
+	brnz		cmp, __ovly_load_restore
+
+/* Set _ovly_buf_table[buf].mapped = $78. */
+	cwx		genwi, tab, off
+	shufb		map, $78, map, genwi
+	stqx		map, tab, off
+
+/* A new partition needs to be loaded. Prepare for DMA loop. 
+ * _EAR_ is the 64b base EA, filled in at run time by the
+ * loader, and indicating the value for SPU executable image start.
+ */
+	lqd		cgshuf, (__cg_pattern-__ovly_return+4)(retval)
+	rotqbyi		size, vma, 4
+	rotqbyi		sz, vma, 8
+	lqa		ea64, _EAR_
+
+__ovly_xfer_loop:
+/* 64b add to compute next ea64. */
+	rotqmbyi	off64, sz, -4
+	cg		cgbits, ea64, off64
+	shufb		add64, cgbits, cgbits, cgshuf
+	addx		add64, ea64, off64
+	ori		ea64, add64, 0
+
+/* Setup DMA parameters, then issue DMA request. */
+	rotqbyi		ealo, add64, 4
+	ila		maxsize, MFC_MAX_DMA_SIZE
+	cgt		cmp, size, maxsize
+	selb		sz, size, maxsize, cmp
+	ila		tagid, MFC_TAG_ID
+	wrch		$MFC_LSA, vma
+	wrch		$MFC_EAH, ea64
+	wrch		$MFC_EAL, ealo
+	wrch		$MFC_Size, sz
+	wrch		$MFC_TagId, tagid
+	ila		cmd, MFC_GET_CMD
+	wrch		$MFC_Cmd, cmd
+
+/* Increment vma, decrement size, branch back as needed. */
+	a		vma, vma, sz
+	sf		size, sz, size
+	brnz		size, __ovly_xfer_loop
+
+/* Save app's tagmask, wait for DMA complete, restore mask. */
+	rdch		oldmask, $MFC_RdTagMask
+#if MFC_TAG_ID < 16
+	ilh		newmask, 1 << MFC_TAG_ID
+#else
+	ilhu		newmask, 1 << (MFC_TAG_ID - 16)
+#endif
+	wrch		$MFC_WrTagMask, newmask
+	ila		tagstat, MFC_TAG_UPDATE_ALL
+	wrch		$MFC_WrTagUpdate, tagstat
+	rdch		tagstat, $MFC_RdTagStat
+	sync
+	wrch		$MFC_WrTagMask, oldmask
+
+	.global		_ovly_debug_event
+	.type		_ovly_debug_event, @function
+_ovly_debug_event:
+/* GDB inserts debugger trap here.  */
+	nop
+
+__ovly_load_restore:
+#ifdef OVLY_IRQ_SAVE
+/* Conditionally re-enable interrupts. */
+	andi		irq_stat, irq_stat, 1
+	ila		irqtmp, __ovly_irq_restore
+	binze		irq_stat, irqtmp
+__ovly_irq_restore:
+	lqd		$9, -64($sp)
+#endif
+
+/* Restore saved registers. */
+	lqd		$8, -48($sp)
+	lqd		$7, -32($sp)
+	lqd		$6, -16($sp)
+
+__ovly_load_ret:
+/* Branch to target address. */
+	bi		$79
Index: ld/emultempl/spuelf.em
===================================================================
RCS file: ld/emultempl/spuelf.em
diff -N ld/emultempl/spuelf.em
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/emultempl/spuelf.em	24 Oct 2006 23:53:12 -0000
@@ -0,0 +1,297 @@
+# This shell script emits a C file. -*- C -*-
+#   Copyright 2006 Free Software Foundation, Inc.
+#
+# This file is part of GLD, the Gnu Linker.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+#
+
+# This file is sourced from elf32.em, and defines extra spu specific
+# features.
+#
+cat >>e${EMULATION_NAME}.c <<EOF
+#include "ldctor.h"
+#include "elf32-spu.h"
+
+/* Non-zero if no overlay processing should be done.  */
+static int no_overlays = 0;
+
+/* Non-zero if we want stubs on all calls out of overlay regions.  */
+static int non_overlay_stubs = 0;
+
+/* Whether to emit symbols for stubs.  */
+static int emit_stub_syms = 0;
+
+/* Range of valid addresses for loadable sections.  */
+static bfd_vma local_store_lo = 0;
+static bfd_vma local_store_hi = 0x3ffff;
+
+extern void *_binary_builtin_ovl_mgr_start;
+extern void *_binary_builtin_ovl_mgr_end;
+
+static const struct _ovl_stream ovl_mgr_stream = {
+  &_binary_builtin_ovl_mgr_start,
+  &_binary_builtin_ovl_mgr_end
+};
+
+static asection *toe = NULL;
+
+
+static int
+is_spu_target (void)
+{
+  extern const bfd_target bfd_elf32_spu_vec;
+
+  return link_info.hash->creator == &bfd_elf32_spu_vec;
+}
+
+/* Create our note section.  */
+
+static void
+spu_after_open (void)
+{
+  if (is_spu_target ()
+      && !link_info.relocatable
+      && link_info.input_bfds != NULL
+      && !spu_elf_create_sections (output_bfd, &link_info))
+    einfo ("%X%P: can not create note section: %E\n");
+
+  gld${EMULATION_NAME}_after_open ();
+}
+
+/* Add section S at the end of output section OUTPUT_NAME.
+
+   Really, we should be duplicating ldlang.c map_input_to_output_sections
+   logic here, ie. using the linker script to find where the section
+   goes.  That's rather a lot of code, and we don't want to run
+   map_input_to_output_sections again because most sections are already
+   mapped.  So cheat, and put the section in a fixed place, ignoring any
+   attempt via a linker script to put .stub, .ovtab, and built-in
+   overlay manager code somewhere else.  */
+
+static void
+spu_place_special_section (asection *s, const char *output_name)
+{
+  lang_output_section_statement_type *os;
+
+  os = lang_output_section_find (output_name);
+  if (os == NULL)
+    {
+      const char *save = s->name;
+      s->name = output_name;
+      gld${EMULATION_NAME}_place_orphan (s);
+      s->name = save;
+    }
+  else
+    lang_add_section (&os->children, s, os);
+
+  s->output_section->size += s->size;
+}
+
+/* Load built-in overlay manager, and tweak overlay section alignment.  */
+
+static void
+spu_elf_load_ovl_mgr (void)
+{
+  lang_output_section_statement_type *os;
+  struct elf_link_hash_entry *h;
+
+  h = elf_link_hash_lookup (elf_hash_table (&link_info),
+			    "__ovly_load", FALSE, FALSE, FALSE);
+
+  if (h != NULL
+      && (h->root.type == bfd_link_hash_defined
+	  || h->root.type == bfd_link_hash_defweak)
+      && h->def_regular)
+    {
+      /* User supplied __ovly_load.  */
+    }
+  else
+    {
+      lang_input_statement_type *ovl_is;
+
+      ovl_is = lang_add_input_file ("builtin ovl_mgr",
+				    lang_input_file_is_file_enum,
+				    NULL);
+
+      if (!spu_elf_open_builtin_lib (&ovl_is->the_bfd, &ovl_mgr_stream))
+	einfo ("%X%P: can not open built-in overlay manager: %E\n");
+      else
+	{
+	  asection *in;
+
+	  if (!load_symbols (ovl_is, NULL))
+	    einfo ("%X%P: can not load built-in overlay manager: %E\n");
+
+	  /* Map overlay manager sections to output sections.  */
+	  for (in = ovl_is->the_bfd->sections; in != NULL; in = in->next)
+	    if ((in->flags & (SEC_ALLOC | SEC_LOAD))
+		== (SEC_ALLOC | SEC_LOAD))
+	      spu_place_special_section (in, ".text");
+	}
+    }
+
+  /* Ensure alignment of overlay sections is sufficient.  */
+  for (os = &lang_output_section_statement.head->output_section_statement;
+       os != NULL;
+       os = os->next)
+    if (os->bfd_section != NULL
+	&& spu_elf_section_data (os->bfd_section) != NULL
+	&& spu_elf_section_data (os->bfd_section)->ovl_index != 0)
+      {
+	if (os->bfd_section->alignment_power < 4)
+	  os->bfd_section->alignment_power = 4;
+
+	/* Also ensure size rounds up.  */
+	os->block_value = 16;
+      }
+}
+
+/* Go find if we need to do anything special for overlays.  */
+
+static void
+spu_before_allocation (void)
+{
+  if (is_spu_target ()
+      && !link_info.relocatable
+      && !no_overlays)
+    {
+      /* Size the sections.  This is premature, but we need to know the
+	 rough layout so that overlays can be found.  */
+      expld.phase = lang_mark_phase_enum;
+      expld.dataseg.phase = exp_dataseg_none;
+      one_lang_size_sections_pass (NULL, TRUE);
+
+      /* Find overlays by inspecting section vmas.  */
+      if (spu_elf_find_overlays (output_bfd, &link_info))
+	{
+	  asection *stub, *ovtab;
+
+	  if (!spu_elf_size_stubs (output_bfd, &link_info, non_overlay_stubs,
+				   &stub, &ovtab, &toe))
+	    einfo ("%X%P: can not size overlay stubs: %E\n");
+
+	  if (stub != NULL)
+	    {
+	      spu_place_special_section (stub, ".text");
+	      spu_place_special_section (ovtab, ".data");
+	      spu_place_special_section (toe, ".toe");
+
+	      spu_elf_load_ovl_mgr ();
+	    }
+	}
+
+      /* We must not cache anything from the preliminary sizing.  */
+      lang_reset_memory_regions ();
+    }
+
+  gld${EMULATION_NAME}_before_allocation ();
+}
+
+/* Final emulation specific call.  */
+
+static void
+gld${EMULATION_NAME}_finish (void)
+{
+  int need_laying_out;
+
+  need_laying_out = bfd_elf_discard_info (output_bfd, &link_info);
+
+  gld${EMULATION_NAME}_map_segments (need_laying_out);
+
+  if (is_spu_target () && local_store_lo < local_store_hi)
+    {
+      asection *s;
+
+      s = spu_elf_check_vma (output_bfd, local_store_lo, local_store_hi);
+      if (s != NULL)
+	einfo ("%X%P: %A exceeds local store range\n", s);
+    }
+
+  if (toe != NULL
+      && !spu_elf_build_stubs (&link_info,
+			       emit_stub_syms || link_info.emitrelocations,
+			       toe))
+    einfo ("%X%P: can not build overlay stubs: %E\n");
+
+  finish_default ();
+}
+
+EOF
+
+# Define some shell vars to insert bits of code into the standard elf
+# parse_args and list_options functions.
+#
+PARSE_AND_LIST_PROLOGUE='
+#define OPTION_SPU_PLUGIN		301
+#define OPTION_SPU_NO_OVERLAYS		(OPTION_SPU_PLUGIN + 1)
+#define OPTION_SPU_STUB_SYMS		(OPTION_SPU_NO_OVERLAYS + 1)
+#define OPTION_SPU_NON_OVERLAY_STUBS	(OPTION_SPU_STUB_SYMS + 1)
+#define OPTION_SPU_LOCAL_STORE		(OPTION_SPU_NON_OVERLAY_STUBS + 1)
+'
+
+PARSE_AND_LIST_LONGOPTS='
+  { "plugin", no_argument, NULL, OPTION_SPU_PLUGIN },
+  { "no-overlays", no_argument, NULL, OPTION_SPU_NO_OVERLAYS },
+  { "emit-stub-syms", no_argument, NULL, OPTION_SPU_STUB_SYMS },
+  { "extra-overlay-stubs", no_argument, NULL, OPTION_SPU_NON_OVERLAY_STUBS },
+  { "local-store", required_argument, NULL, OPTION_SPU_LOCAL_STORE },
+'
+
+PARSE_AND_LIST_OPTIONS='
+  fprintf (file, _("\
+  --plugin              Make SPU plugin.\n\
+  --no-overlays         No overlay handling.\n\
+  --emit-stub-syms      Add symbols on overlay call stubs.\n\
+  --extra-overlay-stubs Add stubs on all calls out of overlay regions.\n\
+  --local-store=lo:hi   Valid address range.\n"
+		   ));
+'
+
+PARSE_AND_LIST_ARGS_CASES='
+    case OPTION_SPU_PLUGIN:
+      spu_elf_plugin (1);
+      break;
+
+    case OPTION_SPU_NO_OVERLAYS:
+      no_overlays = 1;
+      break;
+
+    case OPTION_SPU_STUB_SYMS:
+      emit_stub_syms = 1;
+      break;
+
+    case OPTION_SPU_NON_OVERLAY_STUBS:
+      non_overlay_stubs = 1;
+      break;
+
+    case OPTION_SPU_LOCAL_STORE:
+      {
+	char *end;
+	local_store_lo = strtoul (optarg, &end, 0);
+	if (*end == '\'':'\'')
+	  {
+	    local_store_hi = strtoul (end + 1, &end, 0);
+	    if (*end == 0)
+	      break;
+	  }
+	einfo (_("%P%F: invalid --local-store address range `%s'\''\n"), optarg);
+      }
+      break;
+'
+
+LDEMUL_AFTER_OPEN=spu_after_open
+LDEMUL_BEFORE_ALLOCATION=spu_before_allocation
+LDEMUL_FINISH=gld${EMULATION_NAME}_finish
Index: ld/scripttempl/elf.sc
===================================================================
RCS file: /cvs/src/src/ld/scripttempl/elf.sc,v
retrieving revision 1.77
diff -u -p -r1.77 elf.sc
--- ld/scripttempl/elf.sc	17 Oct 2006 13:55:11 -0000	1.77
+++ ld/scripttempl/elf.sc	24 Oct 2006 23:53:13 -0000
@@ -14,6 +14,7 @@
 #		(e.g., .PARISC.global)
 #	OTHER_RELRO_SECTIONS - other than .data.rel.ro ...
 #		(e.g. PPC32 .fixup, .got[12])
+#	OTHER_BSS_SECTIONS - other than .bss .sbss ...
 #	OTHER_SECTIONS - at the end
 #	EXECUTABLE_SYMBOLS - symbols that must be defined for an
 #		executable (e.g., _DYNAMIC_LINK)
@@ -452,6 +453,7 @@ cat <<EOF
       pad the .data section.  */
    ${RELOCATING+. = ALIGN(. != 0 ? ${ALIGNMENT} : 1);}
   }
+  ${OTHER_BSS_SECTIONS}
   ${RELOCATING+${OTHER_BSS_END_SYMBOLS}}
   ${RELOCATING+. = ALIGN(${ALIGNMENT});}
   ${LARGE_SECTIONS}
Index: ld/testsuite/ld-elf/sec64k.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-elf/sec64k.exp,v
retrieving revision 1.11
diff -u -p -r1.11 sec64k.exp
--- ld/testsuite/ld-elf/sec64k.exp	5 Jun 2006 12:53:50 -0000	1.11
+++ ld/testsuite/ld-elf/sec64k.exp	24 Oct 2006 23:53:14 -0000
@@ -127,7 +127,11 @@ if [catch { set ofd [open "tmpdir/$test2
     return
 }
 foreach sfile $sfiles { puts $ofd "#source: $sfile" }
-puts $ofd "#ld:"
+if { [istarget spu*-*-*] } {
+    puts $ofd "#ld: --local-store 0:0"
+} else {
+    puts $ofd "#ld:"
+}
 puts $ofd "#readelf: -W -Ss"
 puts $ofd "There are 660.. section headers.*:"
 puts $ofd "#..."
Index: ld/testsuite/ld-scripts/empty-orphan.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-scripts/empty-orphan.exp,v
retrieving revision 1.2
diff -u -p -r1.2 empty-orphan.exp
--- ld/testsuite/ld-scripts/empty-orphan.exp	12 May 2005 07:32:08 -0000	1.2
+++ ld/testsuite/ld-scripts/empty-orphan.exp	24 Oct 2006 23:53:15 -0000
@@ -22,6 +22,10 @@ if ![is_elf_format] {
     return
 }
 
+if { [istarget spu*-*-*] } {
+    set LDFLAGS "--local-store 0:0"
+}
+
 set testname "empty-orphan"
 
 run_dump_test empty-orphan
Index: ld/testsuite/ld-scripts/phdrs.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-scripts/phdrs.exp,v
retrieving revision 1.13
diff -u -p -r1.13 phdrs.exp
--- ld/testsuite/ld-scripts/phdrs.exp	12 May 2005 07:32:08 -0000	1.13
+++ ld/testsuite/ld-scripts/phdrs.exp	24 Oct 2006 23:53:15 -0000
@@ -26,6 +26,11 @@ if ![is_elf_format] {
 
 set testname "PHDRS"
 
+set ldopt ""
+if { [istarget spu*-*-*] } {
+    set ldopt "--local-store 0:0"
+}
+
 if ![ld_assemble $as $srcdir/$subdir/phdrs.s tmpdir/phdrs.o] {
     unresolved $testname
     return
@@ -40,7 +45,8 @@ if [is_elf64 tmpdir/phdrs.o] {
 ".*Program Header:.*PHDR *off *0x00*40 *vaddr *0x00*800040 *paddr *0x00*800040.*filesz *0x0\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* flags r--.*LOAD *off *0x00* *vaddr *0x00*800000 *paddr *0x00*800000.*filesz *0x00*\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* *flags r-x.*LOAD *off *0x0\[0-9a-f\]* *vaddr *0x00*80*\[0-9a-f\]* *paddr *0x00*80*\[0-9a-f\]*.*filesz *0x0\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* *flags *rw-.*"
 }
 
-if ![ld_simple_link $ld tmpdir/phdrs "-T $srcdir/$subdir/phdrs.t tmpdir/phdrs.o"] {
+set ldopt "$ldopt -T $srcdir/$subdir/phdrs.t tmpdir/phdrs.o"
+if ![ld_simple_link $ld tmpdir/phdrs $ldopt] {
     fail $testname
 } else {
     if {[which $objdump] == 0} {
Index: ld/testsuite/ld-scripts/phdrs2.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-scripts/phdrs2.exp,v
retrieving revision 1.3
diff -u -p -r1.3 phdrs2.exp
--- ld/testsuite/ld-scripts/phdrs2.exp	12 May 2005 07:32:08 -0000	1.3
+++ ld/testsuite/ld-scripts/phdrs2.exp	24 Oct 2006 23:53:15 -0000
@@ -36,6 +36,11 @@ if { [istarget *-*-linux*aout*] \
 
 set testname "PHDRS2"
 
+set ldopt ""
+if { [istarget spu*-*-*] } {
+    set ldopt "--local-store 0:0"
+}
+
 if ![ld_assemble $as $srcdir/$subdir/phdrs2.s tmpdir/phdrs2.o] {
     unresolved $testname
     return
@@ -44,7 +49,8 @@ if ![ld_assemble $as $srcdir/$subdir/phd
 set phdrs_regexp \
     ".*Program Header:.*LOAD *off *0x00\[0-9a-f\]* *vaddr *0x00*800000 *paddr *0x00*800000.*filesz *0x0\[0-9a-f\]* *memsz *0x0\[0-9a-f\]*.*LOAD *off *0x00\[0-9a-f\]* *vaddr *0x00*800004 *paddr *0x00*800004.*filesz *0x00*\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* *flags rw.*"
 
-if ![ld_simple_link $ld tmpdir/phdrs2 "-T $srcdir/$subdir/phdrs2.t tmpdir/phdrs2.o"] {
+set ldopt "$ldopt -T $srcdir/$subdir/phdrs2.t tmpdir/phdrs2.o"
+if ![ld_simple_link $ld tmpdir/phdrs2 $ldopt] {
     fail $testname
 } else {
     if {[which $objdump] == 0} {
Index: ld/testsuite/ld-spu/ovl.d
===================================================================
RCS file: ld/testsuite/ld-spu/ovl.d
diff -N ld/testsuite/ld-spu/ovl.d
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-spu/ovl.d	24 Oct 2006 23:53:15 -0000
@@ -0,0 +1,117 @@
+#source: ovl.s
+#ld: -N -T ovl.lnk
+#objdump: -D
+
+.*elf32-spu
+
+Disassembly of section \.text:
+
+00000100 <_start>:
+ 100:	1c f8 00 81 	ai	\$1,\$1,-32
+ 104:	48 20 00 00 	xor	\$0,\$0,\$0
+ 108:	24 00 00 80 	stqd	\$0,0\(\$1\)
+ 10c:	24 00 40 80 	stqd	\$0,16\(\$1\)
+ 110:	33 00 04 00 	brsl	\$0,130 <f0\+0x4>	# 130
+ 114:	33 00 04 80 	brsl	\$0,138 <f0\+0xc>	# 138
+ 118:	33 00 07 00 	brsl	\$0,150 <f0\+0x24>	# 150
+ 11c:	42 00 ac 09 	ila	\$9,344	# 158
+ 120:	35 20 04 80 	bisl	\$0,\$9
+ 124:	1c 08 00 81 	ai	\$1,\$1,32	# 20
+ 128:	32 7f fb 00 	br	100 <_start>	# 100
+
+0000012c <f0>:
+ 12c:	35 00 00 00 	bi	\$0
+ 130:	42 02 00 4f 	ila	\$79,1024	# 400
+ 134:	32 00 02 80 	br	148 <f0\+0x1c>	# 148
+ 138:	42 02 02 4f 	ila	\$79,1028	# 404
+ 13c:	32 00 01 80 	br	148 <f0\+0x1c>	# 148
+ 140:	42 02 08 4f 	ila	\$79,1040	# 410
+ 144:	40 20 00 00 	nop	\$0
+ 148:	42 00 00 ce 	ila	\$78,1
+ 14c:	32 00 0a 80 	br	1a0 <__ovly_load>	# 1a0
+ 150:	42 02 00 4f 	ila	\$79,1024	# 400
+ 154:	32 00 02 80 	br	168 <f0\+0x3c>	# 168
+ 158:	42 02 12 4f 	ila	\$79,1060	# 424
+ 15c:	32 00 01 80 	br	168 <f0\+0x3c>	# 168
+ 160:	42 02 1a 4f 	ila	\$79,1076	# 434
+ 164:	40 20 00 00 	nop	\$0
+ 168:	42 00 01 4e 	ila	\$78,2
+ 16c:	32 00 06 80 	br	1a0 <__ovly_load>	# 1a0
+#...
+[0-9a-f]+ <__ovly_return>:
+[0-9a-f ]+:	3f e1 00 4e 	shlqbyi	\$78,\$0,4
+[0-9a-f ]+:	3f e2 00 4f 	shlqbyi	\$79,\$0,8
+[0-9a-f ]+:	25 00 27 ce 	biz	\$78,\$79
+
+[0-9a-f]+ <__ovly_load>:
+#...
+[0-9a-f]+ <_ovly_debug_event>:
+#...
+Disassembly of section \.ov_a1:
+
+00000400 <f1_a1>:
+ 400:	32 00 01 80 	br	40c <f3_a1>	# 40c
+
+00000404 <f2_a1>:
+ 404:	42 00 a0 03 	ila	\$3,320	# 140
+ 408:	35 00 00 00 	bi	\$0
+
+0000040c <f3_a1>:
+ 40c:	35 00 00 00 	bi	\$0
+
+00000410 <f4_a1>:
+ 410:	35 00 00 00 	bi	\$0
+	\.\.\.
+Disassembly of section \.ov_a2:
+
+00000400 <f1_a2>:
+ 400:	24 00 40 80 	stqd	\$0,16\(\$1\)
+ 404:	24 ff 80 81 	stqd	\$1,-32\(\$1\)
+ 408:	1c f8 00 81 	ai	\$1,\$1,-32
+ 40c:	33 7f a4 00 	brsl	\$0,12c <f0>	# 12c
+ 410:	33 7f a4 00 	brsl	\$0,130 <f0\+0x4>	# 130
+ 414:	33 00 03 80 	brsl	\$0,430 <f3_a2>	# 430
+ 418:	34 00 c0 80 	lqd	\$0,48\(\$1\)	# 30
+ 41c:	1c 08 00 81 	ai	\$1,\$1,32	# 20
+ 420:	35 00 00 00 	bi	\$0
+
+00000424 <f2_a2>:
+ 424:	41 00 00 03 	ilhu	\$3,0
+ 428:	60 80 b0 03 	iohl	\$3,352	# 160
+ 42c:	35 00 00 00 	bi	\$0
+
+00000430 <f3_a2>:
+ 430:	35 00 00 00 	bi	\$0
+
+00000434 <f4_a2>:
+ 434:	35 00 00 00 	bi	\$0
+	\.\.\.
+Disassembly of section .data:
+
+00000440 <_ovly_table>:
+ 440:	00 00 04 00 .*
+ 444:	00 00 00 20 .*
+ 448:	00 00 02 e0 .*
+ 44c:	00 00 00 01 .*
+ 450:	00 00 04 00 .*
+ 454:	00 00 00 40 .*
+ 458:	00 00 03 00 .*
+ 45c:	00 00 00 01 .*
+
+00000460 <_ovly_buf_table>:
+ 460:	00 00 00 00 .*
+Disassembly of section \.toe:
+
+00000470 <_EAR_>:
+	\.\.\.
+Disassembly of section \.note\.spu_name:
+
+.* <\.note\.spu_name>:
+.*:	00 00 00 08 .*
+.*:	00 00 00 0c .*
+.*:	00 00 00 01 .*
+.*:	53 50 55 4e .*
+.*:	41 4d 45 00 .*
+.*:	74 6d 70 64 .*
+.*:	69 72 2f 64 .*
+.*:	75 6d 70 00 .*
Index: ld/testsuite/ld-spu/ovl.lnk
===================================================================
RCS file: ld/testsuite/ld-spu/ovl.lnk
diff -N ld/testsuite/ld-spu/ovl.lnk
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-spu/ovl.lnk	24 Oct 2006 23:53:15 -0000
@@ -0,0 +1,13 @@
+SECTIONS
+{
+  . = SIZEOF_HEADERS;
+  .text : { *(.text) *(.stub) }
+
+  . = 0x400;
+  .ov_a1 : { *(.ov_a1) }
+  .ov_a2 ADDR (.ov_a1) : { *(.ov_a2) }
+  . = ADDR (.ov_a1) + MAX (SIZEOF (.ov_a1), SIZEOF (.ov_a2));
+
+  .data : { *(.data) *(.ovtab) }
+  .bss : { *(.bss) }
+}
Index: ld/testsuite/ld-spu/ovl.s
===================================================================
RCS file: ld/testsuite/ld-spu/ovl.s
diff -N ld/testsuite/ld-spu/ovl.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-spu/ovl.s	24 Oct 2006 23:53:15 -0000
@@ -0,0 +1,82 @@
+ .text
+ .p2align 2
+ .globl _start
+_start:
+ ai sp,sp,-32
+ xor lr,lr,lr
+ stqd lr,0(sp)
+ stqd lr,16(sp)
+ brsl lr,f1_a1
+ brsl lr,f2_a1
+ brsl lr,f1_a2
+ ila 9,f2_a2
+ bisl lr,9
+ ai sp,sp,32
+ br _start
+
+ .type f0,@function
+f0:
+ bi lr
+ .size f0,.-f0
+
+ .section .ov_a1,"ax",@progbits
+ .p2align 2
+ .global f1_a1
+ .type f1_a1,@function
+f1_a1:
+ br f3_a1
+ .size f1_a1,.-f1_a1
+
+ .global f2_a1
+ .type f2_a1,@function
+f2_a1:
+ ila 3,f4_a1
+ bi lr
+ .size f2_a1,.-f2_a1
+
+ .global f3_a1
+ .type f3_a1,@function
+f3_a1:
+ bi lr
+ .size f3_a1,.-f3_a1
+
+ .global f4_a1
+ .type f4_a1,@function
+f4_a1:
+ bi lr
+ .size f4_a1,.-f4_a1
+
+
+ .section .ov_a2,"ax",@progbits
+ .p2align 2
+ .global f1_a2
+ .type f1_a2,@function
+f1_a2:
+ stqd lr,16(sp)
+ stqd sp,-32(sp)
+ ai sp,sp,-32
+ brsl lr,f0
+ brsl lr,f1_a1
+ brsl lr,f3_a2
+ lqd lr,48(sp)
+ ai sp,sp,32
+ bi lr
+ .size f1_a2,.-f1_a2
+
+ .global f2_a2
+ .type f2_a2,@function
+f2_a2:
+ ilhu 3,f4_a2@h
+ iohl 3,f4_a2@l
+ bi lr
+ .size f2_a2,.-f2_a2
+
+ .type f3_a2,@function
+f3_a2:
+ bi lr
+ .size f3_a2,.-f3_a2
+
+ .type f4_a2,@function
+f4_a2:
+ bi lr
+ .size f4_a2,.-f4_a2
Index: ld/testsuite/ld-spu/spu.exp
===================================================================
RCS file: ld/testsuite/ld-spu/spu.exp
diff -N ld/testsuite/ld-spu/spu.exp
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ ld/testsuite/ld-spu/spu.exp	24 Oct 2006 23:53:15 -0000
@@ -0,0 +1,27 @@
+# Expect script for ld-spu tests
+#   Copyright (C) 2006 Free Software Foundation
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software Foundation,
+# 51 Franklin Street - Fifth Floor, Boston, MA 02111-1307, USA.
+#
+
+if { ![istarget "spu-*-*"] } {
+    return
+}
+
+set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
+foreach sputest $rd_test_list {
+    verbose [file rootname $sputest]
+    run_dump_test [file rootname $sputest]
+}
Index: opcodes/Makefile.am
===================================================================
RCS file: /cvs/src/src/opcodes/Makefile.am,v
retrieving revision 1.102
diff -u -p -r1.102 Makefile.am
--- opcodes/Makefile.am	16 Sep 2006 23:51:50 -0000	1.102
+++ opcodes/Makefile.am	25 Oct 2006 00:45:49 -0000
@@ -169,6 +169,8 @@ CFILES = \
 	sh64-opc.c \
 	sparc-dis.c \
 	sparc-opc.c \
+	spu-dis.c \
+	spu-opc.c \
 	tic30-dis.c \
 	tic4x-dis.c \
 	tic54x-dis.c \
@@ -301,6 +303,8 @@ ALL_MACHINES = \
 	sh64-opc.lo \
 	sparc-dis.lo \
 	sparc-opc.lo \
+	spu-dis.lo \
+	spu-opc.lo \
 	tic30-dis.lo \
 	tic4x-dis.lo \
 	tic54x-dis.lo \
@@ -604,131 +608,164 @@ dep-am: DEP
 # DO NOT DELETE THIS LINE -- mkdep uses it.
 # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
 alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/alpha.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/alpha.h
 alpha-opc.lo: alpha-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/symcat.h \
-  opintl.h
+  $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h opintl.h
 arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
-  $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
-  $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h \
-  $(INCDIR)/elf/reloc-macros.h opintl.h arc-dis.h arc-ext.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h \
+  opintl.h arc-dis.h arc-ext.h
 arc-opc.lo: arc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \
   opintl.h
 arc-ext.lo: arc-ext.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h arc-ext.h $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h arc-ext.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arm.h \
-  opintl.h $(INCDIR)/safe-ctype.h $(INCDIR)/floatformat.h \
-  $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \
-  $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
-  $(INCDIR)/elf/external.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/arm.h opintl.h $(INCDIR)/safe-ctype.h \
+  $(INCDIR)/floatformat.h $(INCDIR)/ansidecl.h $(INCDIR)/coff/internal.h \
+  $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/elf/internal.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h
 avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/opcode/avr.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/opcode/avr.h
 bfin-dis.lo: bfin-dis.c $(INCDIR)/opcode/bfin.h $(INCDIR)/dis-asm.h \
   $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
-  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   opintl.h
 cgen-bitset.lo: cgen-bitset.c $(INCDIR)/libiberty.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cgen-bitset.h
 cgen-dis.lo: cgen-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h \
-  $(INCDIR)/opcode/cgen-bitset.h
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(BFD_H) \
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
 cgen-opc.lo: cgen-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
-  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h
 cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
-  $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h
 cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h
 crx-dis.lo: crx-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
-  $(INCDIR)/opcode/crx.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/opcode/crx.h
 crx-opc.lo: crx-opc.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h $(INCDIR)/opcode/crx.h
 d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 d10v-opc.lo: d10v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/d10v.h
 d30v-dis.lo: d30v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/d30v.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
 d30v-opc.lo: d30v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/d30v.h
 dlx-dis.lo: dlx-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/dlx.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/dlx.h
 dis-buf.lo: dis-buf.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  opintl.h
 dis-init.lo: dis-init.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H)
 disassemble.lo: disassemble.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 fr30-asm.lo: fr30-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 fr30-desc.lo: fr30-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 fr30-dis.lo: fr30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  fr30-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
+  opintl.h
 fr30-ibld.lo: fr30-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   fr30-opc.h opintl.h $(INCDIR)/safe-ctype.h
 fr30-opc.lo: fr30-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h fr30-opc.h $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 frv-asm.lo: frv-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 frv-desc.lo: frv-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 frv-dis.lo: frv-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  frv-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
+  opintl.h
 frv-ibld.lo: frv-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   frv-opc.h opintl.h $(INCDIR)/safe-ctype.h
 frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h frv-opc.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/elf/frv.h \
+  $(INCDIR)/elf/reloc-macros.h
 h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h
 h8500-dis.lo: h8500-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  opintl.h
+  h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h opintl.h
 hppa-dis.lo: hppa-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(BFDDIR)/libhppa.h \
-  $(INCDIR)/opcode/hppa.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h
 i370-dis.lo: i370-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/i370.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/i370.h
 i370-opc.lo: i370-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/i370.h
 i386-dis.lo: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
-  opintl.h
+  $(INCDIR)/ansidecl.h opintl.h
 i860-dis.lo: i860-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/i860.h
 i960-dis.lo: i960-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 ia64-dis.lo: ia64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/ia64.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/ia64.h \
+  $(BFD_H)
 ia64-opc-a.lo: ia64-opc-a.c ia64-opc.h $(INCDIR)/opcode/ia64.h \
   $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 ia64-opc-b.lo: ia64-opc-b.c ia64-opc.h $(INCDIR)/opcode/ia64.h \
@@ -741,295 +778,390 @@ ia64-opc-m.lo: ia64-opc-m.c ia64-opc.h $
   $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 ia64-opc-d.lo: ia64-opc-d.c
 ia64-opc.lo: ia64-opc.c $(INCDIR)/ansidecl.h sysdep.h \
-  config.h $(INCDIR)/libiberty.h ia64-asmtab.h $(INCDIR)/opcode/ia64.h \
-  $(BFD_H) $(INCDIR)/symcat.h ia64-asmtab.c
+  config.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  ia64-asmtab.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h ia64-asmtab.c
 ia64-gen.lo: ia64-gen.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/safe-ctype.h sysdep.h config.h $(INCDIR)/getopt.h \
-  ia64-opc.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/symcat.h \
-  ia64-opc-a.c ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c \
-  ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h sysdep.h \
+  config.h $(INCDIR)/getopt.h ia64-opc.h $(INCDIR)/opcode/ia64.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h ia64-opc-a.c \
+  ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c ia64-opc-f.c \
+  ia64-opc-x.c ia64-opc-d.c
 ia64-asmtab.lo: ia64-asmtab.c
 ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 ip2k-desc.lo: ip2k-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 ip2k-dis.lo: ip2k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  ip2k-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
+  opintl.h
 ip2k-ibld.lo: ip2k-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   ip2k-opc.h opintl.h $(INCDIR)/safe-ctype.h
 ip2k-opc.lo: ip2k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h ip2k-opc.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  ip2k-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h ip2k-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 iq2000-asm.lo: iq2000-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 iq2000-desc.lo: iq2000-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 iq2000-dis.lo: iq2000-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  iq2000-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h \
+  opintl.h
 iq2000-ibld.lo: iq2000-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   iq2000-opc.h opintl.h $(INCDIR)/safe-ctype.h
 iq2000-opc.lo: iq2000-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h iq2000-opc.h $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  iq2000-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h iq2000-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 m32c-asm.lo: m32c-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
-  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32c-opc.h \
+  cgen-types.h cgen-ops.h opintl.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/safe-ctype.h
 m32c-desc.lo: m32c-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
-  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32c-opc.h \
+  cgen-types.h cgen-ops.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 m32c-dis.lo: m32c-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  m32c-opc.h cgen-types.h cgen-ops.h opintl.h $(INCDIR)/elf/m32c.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32c-opc.h \
+  cgen-types.h cgen-ops.h opintl.h $(INCDIR)/elf/m32c.h \
   $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
   $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h
 m32c-ibld.lo: m32c-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h m32c-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   m32c-opc.h cgen-types.h cgen-ops.h opintl.h $(INCDIR)/safe-ctype.h
 m32c-opc.lo: m32c-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32c-opc.h cgen-types.h cgen-ops.h \
-  $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32c-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32c-opc.h \
+  cgen-types.h cgen-ops.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 m32r-asm.lo: m32r-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32r-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 m32r-desc.lo: m32r-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32r-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 m32r-dis.lo: m32r-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  m32r-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32r-opc.h \
+  opintl.h
 m32r-ibld.lo: m32r-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   m32r-opc.h opintl.h $(INCDIR)/safe-ctype.h
 m32r-opc.lo: m32r-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32r-opc.h $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32r-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 m32r-opinst.lo: m32r-opinst.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h m32r-opc.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  m32r-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h m32r-opc.h
 m68hc11-dis.lo: m68hc11-dis.c $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/m68hc11.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 m68hc11-opc.lo: m68hc11-opc.c $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/m68hc11.h
 m68k-dis.lo: m68k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/floatformat.h \
-  $(INCDIR)/libiberty.h opintl.h $(INCDIR)/opcode/m68k.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/floatformat.h $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
+  opintl.h $(INCDIR)/opcode/m68k.h
 m68k-opc.lo: m68k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/m68k.h
 m88k-dis.lo: m88k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/m88k.h \
-  opintl.h $(INCDIR)/libiberty.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/m88k.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h
 maxq-dis.lo: maxq-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/maxq.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/maxq.h
 mcore-dis.lo: mcore-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  mcore-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  mcore-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h
 mips-dis.lo: mips-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/opcode/mips.h opintl.h $(BFDDIR)/elf-bfd.h \
-  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/opcode/mips.h \
+  opintl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
+  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+  $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
 mips-opc.lo: mips-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mips.h
 mips16-opc.lo: mips16-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mips.h
 m10200-dis.lo: m10200-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mn10200.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
 m10200-opc.lo: m10200-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mn10200.h
 m10300-dis.lo: m10300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mn10300.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
 m10300-opc.lo: m10300-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mn10300.h
 mmix-dis.lo: mmix-dis.c $(INCDIR)/opcode/mmix.h $(INCDIR)/dis-asm.h \
   $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
-  opintl.h
+  $(INCDIR)/ansidecl.h $(BFD_H) opintl.h
 mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode/mmix.h $(INCDIR)/symcat.h
 mt-asm.lo: mt-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h mt-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h mt-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  mt-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h mt-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 mt-desc.lo: mt-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h mt-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h mt-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  mt-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h mt-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 mt-dis.lo: mt-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   mt-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  mt-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h mt-opc.h \
+  opintl.h
 mt-ibld.lo: mt-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h mt-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h mt-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   mt-opc.h opintl.h $(INCDIR)/safe-ctype.h
 mt-opc.lo: mt-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h mt-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h mt-opc.h $(INCDIR)/libiberty.h \
-  $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  mt-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h mt-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/dis-asm.h \
-  $(INCDIR)/opcode/ns32k.h opintl.h
+  $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/opcode/ns32k.h \
+  opintl.h
 openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 openrisc-desc.lo: openrisc-desc.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(INCDIR)/symcat.h openrisc-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  openrisc-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 openrisc-dis.lo: openrisc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  openrisc-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
+  opintl.h
 openrisc-ibld.lo: openrisc-ibld.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  openrisc-opc.h opintl.h $(INCDIR)/safe-ctype.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
+  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
+  opintl.h $(INCDIR)/safe-ctype.h
 openrisc-opc.lo: openrisc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h openrisc-opc.h $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  openrisc-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h openrisc-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 or32-dis.lo: or32-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/or32.h \
   $(INCDIR)/safe-ctype.h
 or32-opc.lo: or32-opc.c $(INCDIR)/safe-ctype.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/or32.h
 pdp11-dis.lo: pdp11-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/pdp11.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/pdp11.h
 pdp11-opc.lo: pdp11-opc.c $(INCDIR)/opcode/pdp11.h
 pj-dis.lo: pj-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/pj.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 pj-opc.lo: pj-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/pj.h
 ppc-dis.lo: ppc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/ppc.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/ppc.h
 ppc-opc.lo: ppc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/ppc.h opintl.h
 s390-mkopc.lo: s390-mkopc.c
 s390-opc.lo: s390-opc.c $(INCDIR)/ansidecl.h $(INCDIR)/opcode/s390.h \
   s390-opc.tab
 s390-dis.lo: s390-dis.c $(INCDIR)/ansidecl.h sysdep.h \
-  config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  $(INCDIR)/opcode/s390.h
+  config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/s390.h
 score-dis.lo: score-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h score-opc.h \
-  $(INCDIR)/bfdlink.h opintl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
-  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/score.h \
-  $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  score-opc.h opintl.h $(BFD_H) $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
+  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+  $(INCDIR)/elf/internal.h $(INCDIR)/elf/score.h $(INCDIR)/elf/reloc-macros.h
 sh-dis.lo: sh-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  sh-opc.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/dis-asm.h
+  sh-opc.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/dis-asm.h $(BFD_H)
 sh64-dis.lo: sh64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
-  sh64-opc.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
-  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
-  $(BFDDIR)/elf32-sh64.h
+  $(INCDIR)/ansidecl.h sh64-opc.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
+  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+  $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h $(BFDDIR)/elf32-sh64.h
 sh64-opc.lo: sh64-opc.c sh64-opc.h
 sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h $(INCDIR)/libiberty.h opintl.h
+  $(INCDIR)/opcode/sparc.h $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h opintl.h
 sparc-opc.lo: sparc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/opcode/sparc.h
+  $(INCDIR)/opcode/sparc.h $(INCDIR)/ansidecl.h
+spu-dis.lo: spu-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/spu.h $(INCDIR)/opcode/spu-insns.h
+spu-opc.lo: spu-opc.c $(INCDIR)/opcode/spu.h $(INCDIR)/opcode/spu-insns.h \
+  $(INCDIR)/opcode/spu-insns.h
 tic30-dis.lo: tic30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic30.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/tic30.h
 tic4x-dis.lo: tic4x-dis.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic4x.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/tic4x.h
 tic54x-dis.lo: tic54x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h \
-  $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/tic54x.h $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/ti.h
 tic54x-opc.lo: tic54x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/tic54x.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(INCDIR)/opcode/tic54x.h
 tic80-dis.lo: tic80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/tic80.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 tic80-opc.lo: tic80-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/tic80.h
 v850-dis.lo: v850-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/v850.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h
 v850-opc.lo: v850-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/v850.h opintl.h
 vax-dis.lo: vax-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/vax.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 w65-dis.lo: w65-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  w65-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  w65-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h
 xc16x-asm.lo: xc16x-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h xc16x-opc.h opintl.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xc16x-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 xc16x-desc.lo: xc16x-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h xc16x-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xc16x-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 xc16x-dis.lo: xc16x-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
   xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  xc16x-opc.h opintl.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xc16x-opc.h \
+  opintl.h
 xc16x-ibld.lo: xc16x-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h \
-  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
   xc16x-opc.h opintl.h $(INCDIR)/safe-ctype.h
 xc16x-opc.lo: xc16x-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(BFD_H) $(INCDIR)/symcat.h xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h xc16x-opc.h $(INCDIR)/libiberty.h
+  $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \
+  xc16x-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xc16x-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 xstormy16-asm.lo: xstormy16-asm.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  xstormy16-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
-  $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
+  opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h
 xstormy16-desc.lo: xstormy16-desc.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
-  $(INCDIR)/xregex2.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
+  opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 xstormy16-dis.lo: xstormy16-dis.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  $(INCDIR)/libiberty.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
-  $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/ansidecl.h xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h \
+  $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \
+  xstormy16-opc.h opintl.h
 xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  xstormy16-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  xstormy16-opc.h opintl.h $(INCDIR)/safe-ctype.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
+  $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
+  opintl.h $(INCDIR)/safe-ctype.h
 xstormy16-opc.lo: xstormy16-opc.c sysdep.h config.h \
-  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h $(INCDIR)/symcat.h xstormy16-desc.h \
   $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \
-  xstormy16-opc.h $(INCDIR)/libiberty.h
+  $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 xtensa-dis.lo: xtensa-dis.c $(INCDIR)/xtensa-isa.h \
-  $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h sysdep.h \
-  config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \
+  sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \
+  $(INCDIR)/symcat.h
 z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h
 z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
+  z8k-opc.h
 z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/libiberty.h
+  $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h
 # IF YOU PUT ANYTHING HERE IT WILL GO AWAY
Index: opcodes/configure.in
===================================================================
RCS file: /cvs/src/src/opcodes/configure.in,v
retrieving revision 1.72
diff -u -p -r1.72 configure.in
--- opcodes/configure.in	18 Oct 2006 18:18:26 -0000	1.72
+++ opcodes/configure.in	24 Oct 2006 23:53:23 -0000
@@ -218,6 +218,7 @@ if test x${all_targets} = xfalse ; then
 	  done
 				ta="$ta sh-dis.lo cgen-bitset.lo" ;;
 	bfd_sparc_arch)		ta="$ta sparc-dis.lo sparc-opc.lo" ;;
+	bfd_spu_arch)		ta="$ta spu-dis.lo spu-opc.lo" ;;
 	bfd_tahoe_arch)		;;
 	bfd_tic30_arch)		ta="$ta tic30-dis.lo" ;;
         bfd_tic4x_arch)         ta="$ta tic4x-dis.lo" ;;
Index: opcodes/disassemble.c
===================================================================
RCS file: /cvs/src/src/opcodes/disassemble.c,v
retrieving revision 1.63
diff -u -p -r1.63 disassemble.c
--- opcodes/disassemble.c	16 Sep 2006 23:51:50 -0000	1.63
+++ opcodes/disassemble.c	24 Oct 2006 23:53:23 -0000
@@ -67,6 +67,7 @@
 #define ARCH_score
 #define ARCH_sh
 #define ARCH_sparc
+#define ARCH_spu
 #define ARCH_tic30
 #define ARCH_tic4x
 #define ARCH_tic54x
@@ -345,6 +346,11 @@ disassembler (abfd)
       disassemble = print_insn_sparc;
       break;
 #endif
+#ifdef ARCH_spu
+    case bfd_arch_spu:
+      disassemble = print_insn_spu;
+      break;
+#endif
 #ifdef ARCH_tic30
     case bfd_arch_tic30:
       disassemble = print_insn_tic30;
Index: opcodes/spu-dis.c
===================================================================
RCS file: opcodes/spu-dis.c
diff -N opcodes/spu-dis.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ opcodes/spu-dis.c	24 Oct 2006 23:53:25 -0000
@@ -0,0 +1,260 @@
+/* Disassemble SPU instructions
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of GDB, GAS, and the GNU binutils.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+#include <stdio.h>
+#include "sysdep.h"
+#include "dis-asm.h"
+#include "opcode/spu.h"
+
+/* This file provides a disassembler function which uses
+   the disassembler interface defined in dis-asm.h.   */
+
+extern const struct spu_opcode spu_opcodes[];
+extern const int spu_num_opcodes;
+
+static const struct spu_opcode *spu_disassemble_table[(1<<11)];
+
+static void
+init_spu_disassemble (void)
+{
+  int i;
+
+  /* If two instructions have the same opcode then we prefer the first
+   * one.  In most cases it is just an alternate mnemonic. */
+  for (i = 0; i < spu_num_opcodes; i++)
+    {
+      int o = spu_opcodes[i].opcode;
+      if (o >= (1 << 11))
+	abort ();
+      if (spu_disassemble_table[o] == 0)
+	spu_disassemble_table[o] = &spu_opcodes[i];
+    }
+}
+
+/* Determine the instruction from the 10 least significant bits. */
+static const struct spu_opcode *
+get_index_for_opcode (unsigned int insn)
+{
+  const struct spu_opcode *index;
+  unsigned int opcode = insn >> (32-11);
+
+  /* Init the table.  This assumes that element 0/opcode 0 (currently
+   * NOP) is always used */
+  if (spu_disassemble_table[0] == 0)
+    init_spu_disassemble ();
+
+  if ((index = spu_disassemble_table[opcode & 0x780]) != 0
+      && index->insn_type == RRR)
+    return index;
+
+  if ((index = spu_disassemble_table[opcode & 0x7f0]) != 0
+      && (index->insn_type == RI18 || index->insn_type == LBT))
+    return index;
+
+  if ((index = spu_disassemble_table[opcode & 0x7f8]) != 0
+      && index->insn_type == RI10)
+    return index;
+
+  if ((index = spu_disassemble_table[opcode & 0x7fc]) != 0
+      && (index->insn_type == RI16))
+    return index;
+
+  if ((index = spu_disassemble_table[opcode & 0x7fe]) != 0
+      && (index->insn_type == RI8))
+    return index;
+
+  if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0)
+    return index;
+
+  return 0;
+}
+
+/* Print a Spu instruction.  */
+
+int
+print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
+{
+  bfd_byte buffer[4];
+  int value;
+  int hex_value;
+  int status;
+  unsigned int insn;
+  const struct spu_opcode *index;
+  enum spu_insns tag;
+
+  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
+  if (status != 0)
+    {
+      (*info->memory_error_func) (status, memaddr, info);
+      return -1;
+    }
+
+  insn = bfd_getb32 (buffer);
+
+  index = get_index_for_opcode (insn);
+
+  if (index == 0)
+    {
+      (*info->fprintf_func) (info->stream, ".long 0x%x", insn);
+    }
+  else
+    {
+      int i;
+      int paren = 0;
+      tag = (enum spu_insns)(index - spu_opcodes);
+      (*info->fprintf_func) (info->stream, "%s", index->mnemonic);
+      if (tag == M_BI || tag == M_BISL || tag == M_IRET || tag == M_BISLED
+	  || tag == M_BIHNZ || tag == M_BIHZ || tag == M_BINZ || tag == M_BIZ
+          || tag == M_SYNC || tag == M_HBR)
+	{
+	  int fb = (insn >> (32-18)) & 0x7f;
+	  if (fb & 0x40)
+	    (*info->fprintf_func) (info->stream, tag == M_SYNC ? "c" : "p");
+	  if (fb & 0x20)
+	    (*info->fprintf_func) (info->stream, "d");
+	  if (fb & 0x10)
+	    (*info->fprintf_func) (info->stream, "e");
+	}
+      if (index->arg[0] != 0)
+	(*info->fprintf_func) (info->stream, "\t");
+      hex_value = 0;
+      for (i = 1;  i <= index->arg[0]; i++)
+	{
+	  int arg = index->arg[i];
+	  if (arg != A_P && !paren && i > 1)
+	    (*info->fprintf_func) (info->stream, ",");
+
+	  switch (arg)
+	    {
+	    case A_T:
+	      (*info->fprintf_func) (info->stream, "$%d",
+				     DECODE_INSN_RT (insn));
+	      break;
+	    case A_A:
+	      (*info->fprintf_func) (info->stream, "$%d",
+				     DECODE_INSN_RA (insn));
+	      break;
+	    case A_B:
+	      (*info->fprintf_func) (info->stream, "$%d",
+				     DECODE_INSN_RB (insn));
+	      break;
+	    case A_C:
+	      (*info->fprintf_func) (info->stream, "$%d",
+				     DECODE_INSN_RC (insn));
+	      break;
+	    case A_S:
+	      (*info->fprintf_func) (info->stream, "$sp%d",
+				     DECODE_INSN_RA (insn));
+	      break;
+	    case A_H:
+	      (*info->fprintf_func) (info->stream, "$ch%d",
+				     DECODE_INSN_RA (insn));
+	      break;
+	    case A_P:
+	      paren++;
+	      (*info->fprintf_func) (info->stream, "(");
+	      break;
+	    case A_U7A:
+	      (*info->fprintf_func) (info->stream, "%d",
+				     173 - DECODE_INSN_U8 (insn));
+	      break;
+	    case A_U7B:
+	      (*info->fprintf_func) (info->stream, "%d",
+				     155 - DECODE_INSN_U8 (insn));
+	      break;
+	    case A_S3:
+	    case A_S6:
+	    case A_S7:
+	    case A_S7N:
+	    case A_U3:
+	    case A_U5:
+	    case A_U6:
+	    case A_U7:
+	      hex_value = DECODE_INSN_I7 (insn);
+	      (*info->fprintf_func) (info->stream, "%d", hex_value);
+	      break;
+	    case A_S11:
+	      (*info->print_address_func) (memaddr + DECODE_INSN_I9a (insn) * 4,
+					   info);
+	      break;
+	    case A_S11I:
+	      (*info->print_address_func) (memaddr + DECODE_INSN_I9b (insn) * 4,
+					   info);
+	      break;
+	    case A_S10:
+	    case A_S10B:
+	      hex_value = DECODE_INSN_I10 (insn);
+	      (*info->fprintf_func) (info->stream, "%d", hex_value);
+	      break;
+	    case A_S14:
+	      hex_value = DECODE_INSN_I10 (insn) * 16;
+	      (*info->fprintf_func) (info->stream, "%d", hex_value);
+	      break;
+	    case A_S16:
+	      hex_value = DECODE_INSN_I16 (insn);
+	      (*info->fprintf_func) (info->stream, "%d", hex_value);
+	      break;
+	    case A_X16:
+	      hex_value = DECODE_INSN_U16 (insn);
+	      (*info->fprintf_func) (info->stream, "%u", hex_value);
+	      break;
+	    case A_R18:
+	      value = DECODE_INSN_I16 (insn) * 4;
+	      if (value == 0)
+		(*info->fprintf_func) (info->stream, "%d", value);
+	      else
+		{
+		  hex_value = memaddr + value;
+		  (*info->print_address_func) (hex_value & 0x3ffff, info);
+		}
+	      break;
+	    case A_S18:
+	      value = DECODE_INSN_U16 (insn) * 4;
+	      if (value == 0)
+		(*info->fprintf_func) (info->stream, "%d", value);
+	      else
+		(*info->print_address_func) (value, info);
+	      break;
+	    case A_U18:
+	      value = DECODE_INSN_U18 (insn);
+	      if (value == 0 || !(*info->symbol_at_address_func)(0, info))
+		{
+		  hex_value = value;
+		  (*info->fprintf_func) (info->stream, "%u", value);
+		}
+	      else
+		(*info->print_address_func) (value, info);
+	      break;
+	    case A_U14:
+	      hex_value = DECODE_INSN_U14 (insn);
+	      (*info->fprintf_func) (info->stream, "%u", hex_value);
+	      break;
+	    }
+	  if (arg != A_P && paren)
+	    {
+	      (*info->fprintf_func) (info->stream, ")");
+	      paren--;
+	    }
+	}
+      if (hex_value > 16)
+	(*info->fprintf_func) (info->stream, "\t# %x", hex_value);
+    }
+  return 4;
+}
Index: opcodes/spu-opc.c
===================================================================
RCS file: opcodes/spu-opc.c
diff -N opcodes/spu-opc.c
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ opcodes/spu-opc.c	24 Oct 2006 23:53:25 -0000
@@ -0,0 +1,44 @@
+/* SPU opcode list
+
+   Copyright 2006 Free Software Foundation, Inc.
+
+   This file is part of GDB, GAS, and the GNU binutils.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
+
+#include "opcode/spu.h"
+
+/* This file holds the Spu opcode table */
+
+
+/*
+   Example contents of spu-insn.h
+      id_tag	mode	mode	type	opcode	mnemonic	asmtype	    dependency		FPU	L/S?	branch?	instruction   
+                QUAD	WORD                                               (0,RC,RB,RA,RT)    latency  			              		
+   APUOP(M_LQD,	1,	0,	RI9,	0x1f8,	"lqd",		ASM_RI9IDX,	00012,		FXU,	1,	0)	Load Quadword d-form 
+ */
+
+const struct spu_opcode spu_opcodes[] = {
+#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+	{ MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
+#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
+	{ MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
+#include "opcode/spu-insns.h"
+#undef APUOP
+#undef APUOPFB
+};
+
+const int spu_num_opcodes =
+  sizeof (spu_opcodes) / sizeof (spu_opcodes[0]);
Index: opcodes/po/POTFILES.in
===================================================================
RCS file: /cvs/src/src/opcodes/po/POTFILES.in,v
retrieving revision 1.37
diff -u -p -r1.37 POTFILES.in
--- opcodes/po/POTFILES.in	29 Sep 2006 08:05:06 -0000	1.37
+++ opcodes/po/POTFILES.in	24 Oct 2006 23:53:25 -0000
@@ -140,6 +140,8 @@ sh-dis.c
 sh-opc.h
 sparc-dis.c
 sparc-opc.c
+spu-dis.c
+spu-opc.c
 sysdep.h
 tic30-dis.c
 tic4x-dis.c