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PATCH: Print addend as signed


I found it is easier to read when addend is printed as signed. If
it is accepted, I will try to update other testcases.


H.J.
----
binutils/

2007-06-22  H.J. Lu  <hongjiu.lu@intel.com>

	* objdump.c (disassemble_bytes): Print addend as signed.
	(dump_reloc_set): Likewise.

gas/testsuite/

2007-06-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/mixed-mode-reloc64.d: Expect addend as signed.
	* gas/i386/reloc64.d: Likewise.
	* gas/ia64/pcrel.d: Likewise.

--- binutils/binutils/objdump.c.signed	2007-06-19 15:24:14.000000000 -0700
+++ binutils/binutils/objdump.c	2007-06-22 10:27:12.000000000 -0700
@@ -1648,8 +1648,15 @@ disassemble_bytes (struct disassemble_in
 
 	      if (q->addend)
 		{
-		  printf ("+0x");
-		  objdump_print_value (q->addend, info, TRUE);
+		  bfd_signed_vma addend = q->addend;
+		  if (addend < 0)
+		    {
+		      printf ("-0x");
+		      addend = -addend;
+		    }
+		  else
+		    printf ("+0x");
+		  objdump_print_value (addend, info, TRUE);
 		}
 
 	      printf ("\n");
@@ -2709,8 +2716,15 @@ dump_reloc_set (bfd *abfd, asection *sec
 
       if (q->addend)
 	{
-	  printf ("+0x");
-	  bfd_printf_vma (abfd, q->addend);
+	  bfd_signed_vma addend = q->addend;
+	  if (addend < 0)
+	    {
+	      printf ("-0x");
+	      addend = -addend;
+	    }
+	  else
+	    printf ("+0x");
+	  bfd_printf_vma (abfd, addend);
 	}
 
       printf ("\n");
--- binutils/gas/testsuite/gas/i386/mixed-mode-reloc64.d.signed	2005-09-28 08:31:21.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/mixed-mode-reloc64.d	2007-06-22 10:32:54.000000000 -0700
@@ -7,8 +7,8 @@
 RELOCATION RECORDS FOR \[.text\]:
 OFFSET[ 	]+TYPE[ 	]+VALUE[ 	]*
 [0-9a-f]+[ 	]+R_X86_64_GOT32[ 	]+xtrn[ 	]*
-[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn-0x0*4[ 	]*
 [0-9a-f]+[ 	]+R_X86_64_GOT32[ 	]+xtrn[ 	]*
-[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn-0x0*4[ 	]*
 [0-9a-f]+[ 	]+R_X86_64_GOT32[ 	]+xtrn[ 	]*
-[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c[ 	]*
+[0-9a-f]+[ 	]+R_X86_64_PLT32[ 	]+xtrn-0x0*4[ 	]*
--- binutils/gas/testsuite/gas/i386/reloc64.d.signed	2007-05-03 17:57:26.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/reloc64.d	2007-06-22 10:36:29.000000000 -0700
@@ -16,31 +16,31 @@ Disassembly of section \.text:
 .*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0x0*2
 .*[ 	]+R_X86_64_PC16[ 	]+xtrn\+0x0*2
 .*[ 	]+R_X86_64_PC8[ 	]+xtrn\+0x0*1
-.*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0xf+c
-.*[ 	]+R_X86_64_PC32[ 	]+xtrn\+0xf+c
-.*[ 	]+R_X86_64_PC8[ 	]+xtrn\+0xf+f
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn-0x0*4
+.*[ 	]+R_X86_64_PC32[ 	]+xtrn-0x0*4
+.*[ 	]+R_X86_64_PC8[ 	]+xtrn-0x0*1
 .*[ 	]+R_X86_64_GOT64[ 	]+xtrn
 .*[ 	]+R_X86_64_GOT32[ 	]+xtrn
 .*[ 	]+R_X86_64_GOT32[ 	]+xtrn
 .*[ 	]+R_X86_64_GOTOFF64[ 	]+xtrn
 .*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn
 .*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn
-.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_GOTPCREL[ 	]+xtrn-0x0*4
 .*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0x0*2
-.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0xf+c
+.*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_-0x0*4
 .*[ 	]+R_X86_64_GOTPC32[ 	]+_GLOBAL_OFFSET_TABLE_\+0x0*2
 .*[ 	]+R_X86_64_PLT32[ 	]+xtrn
 .*[ 	]+R_X86_64_PLT32[ 	]+xtrn
-.*[ 	]+R_X86_64_PLT32[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_PLT32[ 	]+xtrn-0x0*4
 .*[ 	]+R_X86_64_TLSGD[ 	]+xtrn
 .*[ 	]+R_X86_64_TLSGD[ 	]+xtrn
-.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_TLSGD[ 	]+xtrn-0x0*4
 .*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn
 .*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn
-.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_GOTTPOFF[ 	]+xtrn-0x0*4
 .*[ 	]+R_X86_64_TLSLD[ 	]+xtrn
 .*[ 	]+R_X86_64_TLSLD[ 	]+xtrn
-.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn\+0xf+c
+.*[ 	]+R_X86_64_TLSLD[ 	]+xtrn-0x0*4
 .*[ 	]+R_X86_64_DTPOFF64[ 	]+xtrn
 .*[ 	]+R_X86_64_DTPOFF32[ 	]+xtrn
 .*[ 	]+R_X86_64_DTPOFF32[ 	]+xtrn
--- binutils/gas/testsuite/gas/ia64/pcrel.d.signed	2005-03-28 14:34:20.000000000 -0800
+++ binutils/gas/testsuite/gas/ia64/pcrel.d	2007-06-22 10:35:04.000000000 -0700
@@ -9,28 +9,28 @@ OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[
 0+10[[:space:]]+PCREL22[[:space:]]+esym
 0+20[[:space:]]+PCREL22[[:space:]]+esym\+0x0+20
 0+30[[:space:]]+PCREL22[[:space:]]+esym
-0+40[[:space:]]+PCREL22[[:space:]]+esym\+0xf+e0
+0+40[[:space:]]+PCREL22[[:space:]]+esym-0x0+20
 
 RELOCATION RECORDS FOR \[\.movl\]:
 OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
 0+12[[:space:]]+PCREL64I[[:space:]]+esym
 0+22[[:space:]]+PCREL64I[[:space:]]+esym\+0x0+20
 0+32[[:space:]]+PCREL64I[[:space:]]+esym
-0+42[[:space:]]+PCREL64I[[:space:]]+esym\+0xf+e0
+0+42[[:space:]]+PCREL64I[[:space:]]+esym-0x0+20
 
 RELOCATION RECORDS FOR \[\.data8\]:
 OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
 0+10[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
 0+20[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0x0+20
 0+30[[:space:]]+PCREL64[LM]SB[[:space:]]+esym
-0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym\+0xf+e0
+0+40[[:space:]]+PCREL64[LM]SB[[:space:]]+esym-0x0+20
 
 RELOCATION RECORDS FOR \[\.data4\]:
 OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
 0+10[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
 0+20[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0x0+20
 0+30[[:space:]]+PCREL32[LM]SB[[:space:]]+esym
-0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym\+0xf+e0
+0+40[[:space:]]+PCREL32[LM]SB[[:space:]]+esym-0x0+20
 
 
 Contents of section \.mov:


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