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PATCH: Update x86 disassembler for movd/movq
- From: "H.J. Lu" <hjl at lucon dot org>
- To: binutils at sources dot redhat dot com
- Date: Sat, 28 Jul 2007 09:27:10 -0700
- Subject: PATCH: Update x86 disassembler for movd/movq
i386-opc.tbl has
// These really shouldn't allow for Reg64 (movq is the right mnemonic for
// copying between Reg64/Mem64 and RegXMM/RegMMX, as is mandated by Intel's
// spec). AMD's spec, having been in existence for much longer, failed to
// recognize that and specified movd for 32- and 64-bit operations.
The x86 assembler still takes Reg64 with movd. I am checking in this
patch to change disassembler to display movq for 64bit register.
I also fixed a disassembler for movq in Intel mode. We should display
"QWORD PTR" instead of "XMMWORD PTR".
H.J.
---
gas/testsuite/
2007-07-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-opcode.d: Updated.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
* gas/i386/x86-64-simd.s: Add movq.
opcodes/
2007-07-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Change "movd" to "movK".
(prefix_user_table): Likewise. Use EXq instead of EXx on
"movq".
--- binutils/gas/testsuite/gas/i386/x86-64-opcode.d.mode 2007-03-23 09:19:39.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-opcode.d 2007-07-28 08:04:34.000000000 -0700
@@ -190,12 +190,12 @@ Disassembly of section .text:
[ ]*[0-9a-f]+:[ ]+66 44 0f 7e f8[ ]+movd[ ]+%xmm15,%eax[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+66 44 0f 7e c0[ ]+movd[ ]+%xmm8,%eax[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+66 0f 7e f8[ ]+movd[ ]+%xmm7,%eax[ ]*(#.*)*
-[ ]*[0-9a-f]+:[ ]+66 48 0f 6e c0[ ]+movd[ ]+%rax,%xmm0[ ]*(#.*)*
-[ ]*[0-9a-f]+:[ ]+66 49 0f 6e c0[ ]+movd[ ]+%r8,%xmm0[ ]*(#.*)*
-[ ]*[0-9a-f]+:[ ]+66 4d 0f 6e f8[ ]+movd[ ]+%r8,%xmm15[ ]*(#.*)*
-[ ]*[0-9a-f]+:[ ]+66 48 0f 7e c0[ ]+movd[ ]+%xmm0,%rax[ ]*(#.*)*
-[ ]*[0-9a-f]+:[ ]+66 49 0f 7e c0[ ]+movd[ ]+%xmm0,%r8[ ]*(#.*)*
-[ ]*[0-9a-f]+:[ ]+66 49 0f 7e f8[ ]+movd[ ]+%xmm7,%r8[ ]*(#.*)*
+[ ]*[0-9a-f]+:[ ]+66 48 0f 6e c0[ ]+movq[ ]+%rax,%xmm0[ ]*(#.*)*
+[ ]*[0-9a-f]+:[ ]+66 49 0f 6e c0[ ]+movq[ ]+%r8,%xmm0[ ]*(#.*)*
+[ ]*[0-9a-f]+:[ ]+66 4d 0f 6e f8[ ]+movq[ ]+%r8,%xmm15[ ]*(#.*)*
+[ ]*[0-9a-f]+:[ ]+66 48 0f 7e c0[ ]+movq[ ]+%xmm0,%rax[ ]*(#.*)*
+[ ]*[0-9a-f]+:[ ]+66 49 0f 7e c0[ ]+movq[ ]+%xmm0,%r8[ ]*(#.*)*
+[ ]*[0-9a-f]+:[ ]+66 49 0f 7e f8[ ]+movq[ ]+%xmm7,%r8[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+f3 41 0f 7e 00[ ]+movq[ ]+\(%r8\),%xmm0[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+f3 0f 7e 00[ ]+movq[ ]+\(%rax\),%xmm0[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+f3 45 0f 7e 38[ ]+movq[ ]+\(%r8\),%xmm15[ ]*(#.*)*
--- binutils/gas/testsuite/gas/i386/x86-64-simd-intel.d.mode 2007-07-16 19:38:10.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-simd-intel.d 2007-07-28 09:14:55.000000000 -0700
@@ -26,6 +26,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f 12 0d 78 56 34 12 movlpd xmm1,QWORD PTR \[rip\+0x12345678\][ ]*(#.*)?
[ ]*[a-f0-9]+: 0f 13 0d 78 56 34 12 movlps QWORD PTR \[rip\+0x12345678\],xmm1[ ]*(#.*)?
[ ]*[a-f0-9]+: 0f 12 0d 78 56 34 12 movlps xmm1,QWORD PTR \[rip\+0x12345678\][ ]*(#.*)?
+[ ]*[a-f0-9]+: 66 0f d6 0d 78 56 34 12 movq QWORD PTR \[rip\+0x12345678\],xmm1[ ]*(#.*)?
+[ ]*[a-f0-9]+: f3 0f 7e 0d 78 56 34 12 movq xmm1,QWORD PTR \[rip\+0x12345678\][ ]*(#.*)?
[ ]*[a-f0-9]+: f3 0f 16 0d 78 56 34 12 movshdup xmm1,XMMWORD PTR \[rip\+0x12345678\][ ]*(#.*)?
[ ]*[a-f0-9]+: f3 0f 12 0d 78 56 34 12 movsldup xmm1,XMMWORD PTR \[rip\+0x12345678\][ ]*(#.*)?
[ ]*[a-f0-9]+: f3 0f 70 0d 78 56 34 12 90 pshufhw xmm1,XMMWORD PTR \[rip\+0x12345678\],0x90[ ]*(#.*)?
--- binutils/gas/testsuite/gas/i386/x86-64-simd.d.mode 2007-07-16 19:38:10.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-simd.d 2007-07-28 09:14:36.000000000 -0700
@@ -25,6 +25,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f 12 0d 78 56 34 12 movlpd 0x12345678\(%rip\),%xmm1[ ]*(#.*)?
[ ]*[a-f0-9]+: 0f 13 0d 78 56 34 12 movlps %xmm1,0x12345678\(%rip\)[ ]*(#.*)?
[ ]*[a-f0-9]+: 0f 12 0d 78 56 34 12 movlps 0x12345678\(%rip\),%xmm1[ ]*(#.*)?
+[ ]*[a-f0-9]+: 66 0f d6 0d 78 56 34 12 movq %xmm1,0x12345678\(%rip\)[ ]*(#.*)?
+[ ]*[a-f0-9]+: f3 0f 7e 0d 78 56 34 12 movq 0x12345678\(%rip\),%xmm1[ ]*(#.*)?
[ ]*[a-f0-9]+: f3 0f 16 0d 78 56 34 12 movshdup 0x12345678\(%rip\),%xmm1[ ]*(#.*)?
[ ]*[a-f0-9]+: f3 0f 12 0d 78 56 34 12 movsldup 0x12345678\(%rip\),%xmm1[ ]*(#.*)?
[ ]*[a-f0-9]+: f3 0f 70 0d 78 56 34 12 90 pshufhw \$0x90,0x12345678\(%rip\),%xmm1[ ]*(#.*)?
--- binutils/gas/testsuite/gas/i386/x86-64-simd.s.mode 2007-07-16 19:38:10.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-simd.s 2007-07-28 09:12:54.000000000 -0700
@@ -18,6 +18,8 @@ _start:
movlpd 0x12345678(%rip),%xmm1
movlps %xmm1,0x12345678(%rip)
movlps 0x12345678(%rip),%xmm1
+ movq %xmm1,0x12345678(%rip)
+ movq 0x12345678(%rip),%xmm1
movshdup 0x12345678(%rip),%xmm1
movsldup 0x12345678(%rip),%xmm1
pshufhw $0x90,0x12345678(%rip),%xmm1
--- binutils/opcodes/i386-dis.c.mode 2007-07-16 19:38:09.000000000 -0700
+++ binutils/opcodes/i386-dis.c 2007-07-28 09:10:05.000000000 -0700
@@ -1019,7 +1019,7 @@ static const struct dis386 dis386_twobyt
{ "packssdw", { MX, EM } },
{ PREGRP26 },
{ PREGRP24 },
- { "movd", { MX, Edq } },
+ { "movK", { MX, Edq } },
{ PREGRP19 },
/* 70 */
{ PREGRP22 },
@@ -1988,7 +1988,7 @@ static const struct dis386 prefix_user_t
{
{ "(bad)", { EXx, XM } },
{ "movq2dq",{ XM, MS } },
- { "movq", { EXx, XM } },
+ { "movq", { EXq, XM } },
{ "movdq2q",{ MX, XS } },
},
/* PREGRP22 */
@@ -2000,9 +2000,9 @@ static const struct dis386 prefix_user_t
},
/* PREGRP23 */
{
- { "movd", { Edq, MX } },
- { "movq", { XM, EXx } },
- { "movd", { Edq, XM } },
+ { "movK", { Edq, MX } },
+ { "movq", { XM, EXq } },
+ { "movK", { Edq, XM } },
{ "(bad)", { Ed, XM } },
},
/* PREGRP24 */