Re: [PATCH, MIPS] Add support for CPUs with no FPU

[Richard Sandiford <rsandifo at nildram dot co dot uk>]

Thanks for the patch.  It's certainly a lot cleaner than all those
4650 checks ;)  I just wanted to raise the question of whether...

Adam Nemet <anemet@caviumnetworks.com> writes:
> CPU targets can now be marked as single-float or soft-float.  These are used
> by default and can be overridden with command-line options or asm directives.
> So that we don't have to remember another set of options I used the GCC names:
> -msoft-float/-mhard-float -msingle-float/-mdouble-float.

...making the -mhard-float/-msoft-float default depend on the CPU is
really a good idea.  The tools already support many FPUless processors,
such as the VR41xx series, and various MTI processors, but we have
traditionally treated -mhard-float and -msoft-float as ABI properties
rather than CPU properties.

For example, mips*-linux-gnu targets are hard-float by default.
The vanilla versions (mips{,64}{,el}-) are also meant to support all
architectures, allowing you to assemble or compile code with any -march
or -mips option that is compatible with the register size of the ABI.
It is a little confusing if users have to remember that certain
architectures are FPUless, and that when using something like
-march=vr4130 on mips64-linux-gnu, you also need to specify
-mhard-float in order to keep the same ABI.  (FWIW, I have used
VR4133s with a hard-float GNU/Linux sysroot, relying on the kernel's
FPU emulation.)

If you have a toolchain that has both -mhard-float and -msoft-float
libraries, I agree it does make sense for "target-gcc -march=foo"
to select the right mode (for all of: compiling, assembling and
multilib selection).  GCC 4.3 has a MIPS_ARCH_FLOAT_SPEC that
configurations can use for this purpose.

But the assembler doesn't have much information.  I think it should
continue to accept FPU insns unless the user explicitly says otherwise.

To be clear, the default is the only thing I'm concerned about.
The patch looks good to me otherwise.

Richard