Harvard architecture with 24 bit data bytes and 32 bit code bytes

[Ned <Thomas dot Gill at csr dot com>]

Hi there,

I'm beginning to hack a binutils port for our in-house DSP core. It's a  
Harvard architecture, with different sized bytes in instruction and data  
memory. Instruction memory has a smallest addressable unit of 32 bits,  
while data memory has a smallest addressable unit of 24 bits.

Does anyone on the list know whether this is going to cause me a lot of  
pain? Has anyone had to deal with this problem before?

I'm guessing my first problem will be that there's only one  
OCTETS_PER_BYTE. I'll presumably have to look at the places where that's  
used and add code to guess whether it should be using 3 or 4. Is there  
likely to be anything else that trips me up? Any corner cases I should  
watch out for?


Thanks,
Ned.