This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
[PATCH] x86: add retf
- From: "Jan Beulich" <jbeulich at novell dot com>
- To: <binutils at sourceware dot org>
- Date: Thu, 28 Aug 2008 11:30:45 +0100
- Subject: [PATCH] x86: add retf
... as this is the official mnemonic for far returns.
Built and tested on i686-pc-linux-gnu.
gas/testsuite/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Replace lret by retf.
* gas/i386/opcode-intel.d: Likewise.
opcodes/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (dis386): Adjust far return mnemonics.
* i386-opc.tbl: Add retf.
* i386-tbl.h: Re-generate.
--- 2008-08-27/gas/testsuite/gas/i386/intel.s 2008-02-11 08:33:05.000000000 +0100
+++ 2008-08-27/gas/testsuite/gas/i386/intel.s 2008-08-28 12:12:12.000000000 +0200
@@ -193,8 +193,8 @@ foo:
mov dword ptr 0x90909090[eax], 0x90909090
enter 0x9090, 0x90
leave
- lret 0x9090
- lret
+ retf 0x9090
+ retf
int3
int 0x90
into
@@ -513,8 +513,8 @@ foo:
mov word ptr 0x90909090[eax], 0x9090
enterw 0x9090, 0x90
leavew
- lretw 0x9090
- lretw
+ retfw 0x9090
+ retfw
iretw
rcl word ptr 0x90909090[eax]
rcl word ptr 0x90909090[eax], cl
--- 2008-08-27/gas/testsuite/gas/i386/opcode-intel.d 2008-02-13 13:16:43.000000000 +0100
+++ 2008-08-27/gas/testsuite/gas/i386/opcode-intel.d 2008-08-28 12:12:12.000000000 +0200
@@ -200,8 +200,8 @@ Disassembly of section .text:
*[0-9a-f]+: c7 80 90 90 90 90 90 90 90 90[ ]+mov[ ]+DWORD PTR \[eax-0x6f6f6f70\],0x90909090
*[0-9a-f]+: c8 90 90 90[ ]+enter[ ]+0x9090,0x90
*[0-9a-f]+: c9[ ]+leave[ ]*
- *[0-9a-f]+: ca 90 90[ ]+lret[ ]+0x9090
- *[0-9a-f]+: cb[ ]+lret[ ]*
+ *[0-9a-f]+: ca 90 90[ ]+retf[ ]+0x9090
+ *[0-9a-f]+: cb[ ]+retf[ ]*
*[0-9a-f]+: cc[ ]+int3[ ]*
*[0-9a-f]+: cd 90[ ]+int[ ]+0x90
*[0-9a-f]+: ce[ ]+into[ ]*
@@ -537,9 +537,9 @@ Disassembly of section .text:
*[0-9a-f]+: 66[ ]+data16
*[0-9a-f]+: c9[ ]+leave[ ]*
*[0-9a-f]+: 66[ ]+data16
- *[0-9a-f]+: ca 90 90[ ]+lret[ ]+0x9090
+ *[0-9a-f]+: ca 90 90[ ]+retf[ ]+0x9090
*[0-9a-f]+: 66[ ]+data16
- *[0-9a-f]+: cb[ ]+lret[ ]*
+ *[0-9a-f]+: cb[ ]+retf[ ]*
*[0-9a-f]+: 66[ ]+data16
*[0-9a-f]+: cf[ ]+iret[ ]*
*[0-9a-f]+: 66 d1 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],1
--- 2008-08-27/opcodes/i386-dis.c 2008-08-27 15:34:09.000000000 +0200
+++ 2008-08-27/opcodes/i386-dis.c 2008-08-28 12:14:45.000000000 +0200
@@ -1530,8 +1530,8 @@ static const struct dis386 dis386[] = {
/* c8 */
{ "enterT", { Iw, Ib } },
{ "leaveT", { XX } },
- { "lretP", { Iw } },
- { "lretP", { XX } },
+ { "Jret{|f}P", { Iw } },
+ { "Jret{|f}P", { XX } },
{ "int3", { XX } },
{ "int", { Ib } },
{ X86_64_TABLE (X86_64_CE) },
--- 2008-08-27/opcodes/i386-opc.tbl 2008-08-27 15:34:09.000000000 +0200
+++ 2008-08-27/opcodes/i386-opc.tbl 2008-08-28 12:15:43.000000000 +0200
@@ -346,6 +346,10 @@ ret, 0, 0xc3, None, 1, Cpu64, DefaultSiz
ret, 1, 0xc2, None, 1, Cpu64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Imm16 }
lret, 0, 0xcb, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { 0 }
lret, 1, 0xca, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { Imm16 }
+// Intel Syntax.
+retf, 0, 0xcb, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { 0 }
+retf, 1, 0xca, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { Imm16 }
+
enter, 2, 0xc8, None, 1, Cpu186|CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm16, Imm8 }
enter, 2, 0xc8, None, 1, Cpu64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|No_ldSuf|NoRex64, { Imm16, Imm8 }
leave, 0, 0xc9, None, 1, Cpu186|CpuNo64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }