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Re: [PATCH] Update mtfsf and mtfsfi instructions to support new optional operands.
- From: Ryan Arnold <rsa at us dot ibm dot com>
- To: Peter Bergner <bergner at vnet dot ibm dot com>
- Cc: Andreas Schwab <schwab at suse dot de>, Alan Modra <amodra at bigpond dot net dot au>, binutils at sourceware dot org, Segher Boessenkool <segher at kernel dot crashing dot org>, Steve Munroe <sjmunroe at us dot ibm dot com>
- Date: Wed, 21 Jan 2009 17:19:02 -0600
- Subject: Re: [PATCH] Update mtfsf and mtfsfi instructions to support new optional operands.
- References: <20070515213441.GA4052@vervain.rchland.ibm.com> <e80a11b08fce3da1e15053808c88130f@kernel.crashing.org> <1231970875.7969.3.camel@otta> <jewsco5o5b.fsf@sykes.suse.de> <1232575122.6740.32.camel@otta>
- Reply-to: rsa at us dot ibm dot com
On Wed, 2009-01-21 at 15:58 -0600, Peter Bergner wrote:
> On Wed, 2009-01-21 at 22:45 +0100, Andreas Schwab wrote:
> > Peter Bergner <bergner@vnet.ibm.com> writes:
> >
> > > @@ -4937,8 +4939,10 @@ const struct powerpc_opcode powerpc_opco
> > >
> > > {"dtstsfq", X(63,674), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}},
> > >
> > > -{"mtfsf", XFL(63,711,0), XFL_MASK, COM, PPCNONE, {FLM, FRB, XFL_L, W}},
> > > -{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, PPCNONE, {FLM, FRB, XFL_L, W}},
> > > +{"mtfsf", XFL(63,711,0), XFL_MASK, COM, POWER6, {FLM, FRB}},
> > > +{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6, {FLM, FRB}},
> > > +{"mtfsf", XFL(63,711,0), XFL_MASK, POWER6, PPCNONE, {FLM, FRB, XFL_L, W}},
> > > +{"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6, PPCNONE, {FLM, FRB, XFL_L, W}},
> >
> > This breaks building glibc.
> >
> > ../sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S: Assembler messages:
> > ../sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S:381: Error: junk at end of line: `1,0'
>
> This is probably a bug in glibc, using the new form of the instruction
> when they shouldn't be (ie, didn't configure with --with-cpu=power6).
>
> Ryan / Steve,
>
> Didn't one of you just add some code to guard the new mtfsf form?
> If so, has that gone upstream yet?
>
> Peter
This is an interesting problem.
I needed to enable the new four operand mtfsf insn in GLIBC. Drepper
said he wanted to see it implemented as a dynamic hw cap check for DFP
support (which is when this insn would be needed).
So the assembler needs to be able to understand the four operand version
even if we aren't compiling _explicitly_ for power6 because the code
needs to dynamically select the correct form of the insn.
Perhaps I can put .machine power6 in the asm file where this is used.
Ryan S. Arnold
IBM Linux Technology Center
Linux Toolchain Development