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[PATCH, M68K] Add support for MCF5441x family
- From: Maxim Kuvyrkov <maxim at codesourcery dot com>
- To: binutils <binutils at sourceware dot org>
- Cc: Nick Clifton <nickc at redhat dot com>
- Date: Sun, 01 Nov 2009 23:30:53 +0300
- Subject: [PATCH, M68K] Add support for MCF5441x family
Hi,
The following patch adds support for MCF5441x family of ColdFire CPUs;
basically, it only adds new registers: ACR[4-7] and RGPIOBAR.
The patch also fixes several small issues along the way.
OK to check in?
--
Maxim Kuvyrkov
CodeSourcery
maxim@codesourcery.com
(650) 331-3385 x724
2010-11-01 Maxim Kuvyrkov <maxim@codesourcery.com>
* config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace.
(mcf52223_ctrl): Remove non-existent registers.
(mcf54418): Define.
(mcf54455): Remove MBAR.
(m68k_cpus): Add lines for MCF5441x family.
(m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7].
2010-11-01 Maxim Kuvyrkov <maxim@codesourcery.com>
* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
Index: gas/config/m68k-parse.h
===================================================================
--- gas/config/m68k-parse.h (revision 267216)
+++ gas/config/m68k-parse.h (working copy)
@@ -127,9 +127,11 @@ enum m68k_register
PCR3U0, PCR3L0, PCR3U1, PCR3L1,/* mcfv4e added these. */
MBAR0, MBAR1, /* mcfv4e added these. */
ACR0, ACR1, ACR2, ACR3, /* mcf5200 added these. */
+ ACR4, ACR5, ACR6, ACR7, /* mcf54418 added these. */
FLASHBAR, RAMBAR, /* mcf528x added these. */
MBAR2, /* mcf5249 added this. */
MBAR,
+ RGPIOBAR, /* mcf54418 added this. */
ASID, /* m5475. */
CAC, /* fido added this. */
MBO,
Index: gas/config/tc-m68k.c
===================================================================
--- gas/config/tc-m68k.c (revision 267216)
+++ gas/config/tc-m68k.c (working copy)
@@ -186,7 +186,7 @@ static const enum m68k_register mcf51_ct
0
};
static const enum m68k_register mcf5206_ctrl[] = {
- CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR_ALT, MBAR,
+ CACR, ACR0, ACR1, VBR, RAMBAR0, RAMBAR_ALT, MBAR,
0
};
static const enum m68k_register mcf5208_ctrl[] = {
@@ -210,7 +210,7 @@ static const enum m68k_register mcf5221x
0
};
static const enum m68k_register mcf52223_ctrl[] = {
- VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1,
+ VBR, FLASHBAR, RAMBAR, RAMBAR1,
0
};
static const enum m68k_register mcf52235_ctrl[] = {
@@ -302,13 +302,22 @@ static const enum m68k_register mcf5407_
MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */,
0
};
+static const enum m68k_register mcf54418_ctrl[] = {
+ CACR, ASID, ACR0, ACR1, ACR2, ACR3, ACR4, ACR5, ACR6, ACR7, MMUBAR, RGPIOBAR,
+ VBR, PC, RAMBAR1,
+ /* Legacy names */
+ TC /* ASID */, BUSCR /* MMUBAR */,
+ ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
+ RAMBAR /* RAMBAR1 */,
+ 0
+};
static const enum m68k_register mcf54455_ctrl[] = {
CACR, ASID, ACR0, ACR1, ACR2, ACR3, MMUBAR,
- VBR, PC, RAMBAR1, MBAR,
+ VBR, PC, RAMBAR1,
/* Legacy names */
TC /* ASID */, BUSCR /* MMUBAR */,
ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */,
- MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */,
+ RAMBAR /* RAMBAR1 */,
0
};
static const enum m68k_register mcf5475_ctrl[] = {
@@ -693,6 +702,12 @@ static const struct m68k_cpu m68k_cpus[]
{mcfisa_a|mcfisa_b|mcfhwdiv|mcfmac, mcf5407_ctrl, "5407",0},
+ {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54410", -1},
+ {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54415", -1},
+ {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54416", -1},
+ {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54417", -1},
+ {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54418_ctrl, "54418", 0},
+
{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54450", -1},
{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54451", -1},
{mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54452", -1},
@@ -3330,6 +3345,15 @@ m68k_ip (char *instring)
case MMUBAR:
tmpreg = 0x008;
break;
+ case RGPIOBAR:
+ tmpreg = 0x009;
+ break;
+ case ACR4:
+ case ACR5:
+ case ACR6:
+ case ACR7:
+ tmpreg = 0x00c + (opP->reg - ACR4);
+ break;
case USP:
tmpreg = 0x800;
@@ -4125,6 +4149,10 @@ static const struct init_entry init_tabl
{ "acr1", ACR1 }, /* Access Control Unit 1. */
{ "acr2", ACR2 }, /* Access Control Unit 2. */
{ "acr3", ACR3 }, /* Access Control Unit 3. */
+ { "acr4", ACR4 }, /* Access Control Unit 4. */
+ { "acr5", ACR5 }, /* Access Control Unit 5. */
+ { "acr6", ACR6 }, /* Access Control Unit 6. */
+ { "acr7", ACR7 }, /* Access Control Unit 7. */
{ "tc", TC }, /* MMU Translation Control Register. */
{ "tcr", TC },
@@ -4170,6 +4198,8 @@ static const struct init_entry init_tabl
{ "mbar2", MBAR2 }, /* mcf5249 registers. */
+ { "rgpiobar", RGPIOBAR }, /* mcf54418 registers. */
+
{ "cac", CAC }, /* fido registers. */
{ "mbb", MBO }, /* fido registers (obsolete). */
{ "mbo", MBO }, /* fido registers. */
Index: opcodes/m68k-dis.c
===================================================================
--- opcodes/m68k-dis.c (revision 267216)
+++ opcodes/m68k-dis.c (working copy)
@@ -707,14 +707,18 @@ print_insn_arg (const char *d,
{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
{"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
+ {"%rgpiobar", 0x009}, {"%acr4",0x00c},
+ {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
{"%msp", 0x803}, {"%isp", 0x804},
{"%pc", 0x80f},
/* Reg c04 is sometimes called flashbar or rambar.
- Rec c05 is also sometimes called rambar. */
+ Reg c05 is also sometimes called rambar. */
{"%rambar0", 0xc04}, {"%rambar1", 0xc05},
- {"%mbar", 0xc0f},
+ /* reg c0e is sometimes called mbar2 or secmbar.
+ reg c0f is sometimes called mbar. */
+ {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
/* Should we be calling this psr like we do in case 'Y'? */
{"%mmusr",0x805},