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PATCH: Add ud1 to x86
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: binutils at sourceware dot org
- Date: Thu, 5 Aug 2010 17:56:32 -0700
- Subject: PATCH: Add ud1 to x86
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Hi,
There are no ud2a/ud2b. There is ud1:
http://www.maartensz.org/computing/Assembly/RosaHelps/Mnemonics_Reference/UD1.htm
ud1/ud2 are for invalid opcode. They can be used for all processors.
This is the patch I checked in.
H.J.
---
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 684a002..221938f 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,15 @@
+2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run arch-4.
+
+ * gas/i386/arch-4.d: New.
+ * gas/i386/arch-4.s: Likewise.
+
+ * gas/i386/intel.d: Replace ud2a/ud2b with ud2/ud1.
+ * gas/i386/opcode-intel.d: Likewise.
+ * gas/i386/opcode-suffix.d: Likewise.
+ * gas/i386/opcode.d: Likewise.
+
2010-08-03 Alan Modra <amodra@gmail.com>
* gas/all/octa.s, * gas/all/octa.d: New test.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 8b36d9d..7eedfb7 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -112,6 +112,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "arch-1"
run_dump_test "arch-2"
run_dump_test "arch-3"
+ run_dump_test "arch-4"
run_dump_test "arch-5"
run_dump_test "arch-6"
run_dump_test "arch-7"
diff --git a/gas/testsuite/gas/i386/intel.d b/gas/testsuite/gas/i386/intel.d
index 08b48f6..8e7578c 100644
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -257,7 +257,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 06 [ ]*clts
[ ]*[a-f0-9]+: 0f 08 [ ]*invd
[ ]*[a-f0-9]+: 0f 09 [ ]*wbinvd
-[ ]*[a-f0-9]+: 0f 0b [ ]*ud2a
+[ ]*[a-f0-9]+: 0f 0b [ ]*ud2
[ ]*[a-f0-9]+: 0f 20 d0 [ ]*mov %cr2,%eax
[ ]*[a-f0-9]+: 0f 21 d0 [ ]*mov %db2,%eax
[ ]*[a-f0-9]+: 0f 22 d0 [ ]*mov %eax,%cr2
@@ -360,7 +360,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f b5 90 90 90 90 90 [ ]*lgs -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f b6 90 90 90 90 90 [ ]*movzbl -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f b7 90 90 90 90 90 [ ]*movzwl -0x6f6f6f70\(%eax\),%edx
-[ ]*[a-f0-9]+: 0f b9 [ ]*ud2b
+[ ]*[a-f0-9]+: 0f b9 [ ]*ud1
[ ]*[a-f0-9]+: 0f bb 90 90 90 90 90 [ ]*btc %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f bc 90 90 90 90 90 [ ]*bsf -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f bd 90 90 90 90 90 [ ]*bsr -0x6f6f6f70\(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
index dab99b0..9c866d8 100644
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -255,7 +255,7 @@ Disassembly of section .text:
*[0-9a-f]+: 0f 06[ ]+clts[ ]*
*[0-9a-f]+: 0f 08[ ]+invd[ ]*
*[0-9a-f]+: 0f 09[ ]+wbinvd[ ]*
- *[0-9a-f]+: 0f 0b[ ]+ud2a[ ]*
+ *[0-9a-f]+: 0f 0b[ ]+ud2[ ]*
*[0-9a-f]+: 0f 20 d0[ ]+mov[ ]+eax,cr2
*[0-9a-f]+: 0f 21 d0[ ]+mov[ ]+eax,db2
*[0-9a-f]+: 0f 22 d0[ ]+mov[ ]+cr2,eax
@@ -358,7 +358,7 @@ Disassembly of section .text:
*[0-9a-f]+: 0f b5 90 90 90 90 90[ ]+lgs[ ]+edx,(FWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f b6 90 90 90 90 90[ ]+movzx[ ]+edx,BYTE PTR \[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f b7 90 90 90 90 90[ ]+movzx[ ]+edx,WORD PTR \[eax-0x6f6f6f70\]
- *[0-9a-f]+: 0f b9[ ]+ud2b[ ]*
+ *[0-9a-f]+: 0f b9[ ]+ud1[ ]*
*[0-9a-f]+: 0f bb 90 90 90 90 90[ ]+btc[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 0f bc 90 90 90 90 90[ ]+bsf[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f bd 90 90 90 90 90[ ]+bsr[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d
index 4be35a4..9741944 100644
--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -255,7 +255,7 @@ Disassembly of section .text:
*[0-9a-f]+: 0f 06[ ]+clts[ ]+
*[0-9a-f]+: 0f 08[ ]+invd[ ]+
*[0-9a-f]+: 0f 09[ ]+wbinvd
- *[0-9a-f]+: 0f 0b[ ]+ud2a[ ]+
+ *[0-9a-f]+: 0f 0b[ ]+ud2[ ]+
*[0-9a-f]+: 0f 20 d0[ ]+movl[ ]+%cr2,%eax
*[0-9a-f]+: 0f 21 d0[ ]+movl[ ]+%db2,%eax
*[0-9a-f]+: 0f 22 d0[ ]+movl[ ]+%eax,%cr2
@@ -358,7 +358,7 @@ Disassembly of section .text:
*[0-9a-f]+: 0f b5 90 90 90 90 90[ ]+lgsl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f b6 90 90 90 90 90[ ]+movzbl -0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f b7 90 90 90 90 90[ ]+movzwl -0x6f6f6f70\(%eax\),%edx
- *[0-9a-f]+: 0f b9[ ]+ud2b[ ]+
+ *[0-9a-f]+: 0f b9[ ]+ud1[ ]+
*[0-9a-f]+: 0f bb 90 90 90 90 90[ ]+btcl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f bc 90 90 90 90 90[ ]+bsfl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f bd 90 90 90 90 90[ ]+bsrl[ ]+-0x6f6f6f70\(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d
index 9a41291..8236650 100644
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -254,7 +254,7 @@ Disassembly of section .text:
327: 0f 06 [ ]*clts
329: 0f 08 [ ]*invd
32b: 0f 09 [ ]*wbinvd
- 32d: 0f 0b [ ]*ud2a
+ 32d: 0f 0b [ ]*ud2
32f: 0f 20 d0 [ ]*mov %cr2,%eax
332: 0f 21 d0 [ ]*mov %db2,%eax
335: 0f 22 d0 [ ]*mov %eax,%cr2
@@ -357,7 +357,7 @@ Disassembly of section .text:
57e: 0f b5 90 90 90 90 90 [ ]*lgs -0x6f6f6f70\(%eax\),%edx
585: 0f b6 90 90 90 90 90 [ ]*movzbl -0x6f6f6f70\(%eax\),%edx
58c: 0f b7 90 90 90 90 90 [ ]*movzwl -0x6f6f6f70\(%eax\),%edx
- 593: 0f b9 [ ]*ud2b
+ 593: 0f b9 [ ]*ud1
595: 0f bb 90 90 90 90 90 [ ]*btc %edx,-0x6f6f6f70\(%eax\)
59c: 0f bc 90 90 90 90 90 [ ]*bsf -0x6f6f6f70\(%eax\),%edx
5a3: 0f bd 90 90 90 90 90 [ ]*bsr -0x6f6f6f70\(%eax\),%edx
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7abd573..342b541 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
+
+ * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
+ * i386-tbl.h: Regenerated.
+
2010-07-29 DJ Delorie <dj@redhat.com>
* rx-decode.opc (SRR): New.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index c925b52..5b0cb74 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1959,7 +1959,7 @@ static const struct dis386 dis386_twobyte[] = {
{ "invd", { XX } },
{ "wbinvd", { XX } },
{ Bad_Opcode },
- { "ud2a", { XX } },
+ { "ud2", { XX } },
{ Bad_Opcode },
{ REG_TABLE (REG_0F0D) },
{ "femms", { XX } },
@@ -2155,7 +2155,7 @@ static const struct dis386 dis386_twobyte[] = {
{ "movz{wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
/* b8 */
{ PREFIX_TABLE (PREFIX_0FB8) },
- { "ud2b", { XX } },
+ { "ud1", { XX } },
{ REG_TABLE (REG_0FBA) },
{ "btcS", { Ev, Gv } },
{ "bsfS", { Gv, Ev } },
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 010a632..4ebd2b1 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -853,11 +853,13 @@ fxrstor, 1, 0xfae, 0x1, 2, Cpu686, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSu
fxrstor64, 1, 0xfae, 0x1, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|Rex64, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
rdpmc, 0, 0xf33, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
// official undefined instr.
-ud2, 0, 0xf0b, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+ud2, 0, 0xf0b, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
// alias for ud2
-ud2a, 0, 0xf0b, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+ud2a, 0, 0xf0b, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
// 2nd. official undefined instr.
-ud2b, 0, 0xfb9, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+ud1, 0, 0xfb9, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+// alias for ud1
+ud2b, 0, 0xfb9, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
cmovo, 2, 0xf40, None, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
cmovno, 2, 0xf41, None, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 806ad6e..a5a9b64 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -6943,7 +6943,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "ud2", 0, 0xf0b, None, 2,
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
@@ -6953,7 +6953,17 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "ud2a", 0, 0xf0b, None, 2,
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
+ 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } } } },
+ { "ud1", 0, 0xfb9, None, 2,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
@@ -6963,7 +6973,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "ud2b", 0, 0xfb9, None, 2,
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
--- /dev/null 2010-07-23 13:04:30.193381062 -0700
+++ binutils/gas/testsuite/gas/i386/arch-4.d 2010-08-05 17:45:16.567357579 -0700
@@ -0,0 +1,14 @@
+#as: -march=generic32
+#objdump: -dw
+#name: i386 arch 4
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f b9 ud1
+[ ]*[a-f0-9]+: 0f 0b ud2
+[ ]*[a-f0-9]+: 0f 0b ud2
+[ ]*[a-f0-9]+: 0f b9 ud1
+#pass
--- /dev/null 2010-07-23 13:04:30.193381062 -0700
+++ binutils/gas/testsuite/gas/i386/arch-4.s 2010-08-05 17:44:42.823607502 -0700
@@ -0,0 +1,5 @@
+ .text
+ ud1
+ ud2
+ ud2a
+ ud2b