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[PATCH] gas: blackfin: gas: blackfin: reject invalid BYTEOP16M insns


The destination registers must be different with BYTEOP16M insns,
otherwise the hardware throws up an exception.  So reject them.

Committed.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

gas/:
2011-03-29  Mike Frysinger  <vapier@gentoo.org>

	* config/bfin-parse.y (BYTEOP16M): Return yyerror when dest
	reg $2 is the same as dest reg $4.

gas/testsuite/:
2011-03-29  Mike Frysinger  <vapier@gentoo.org>

	* gas/bfin/expected_errors.s: Add invalid BYTEOP16M insn tests.
	* gas/bfin/expected_errors.l: Add new error messages.
---
 gas/config/bfin-parse.y                  |    2 ++
 gas/testsuite/gas/bfin/expected_errors.l |    2 ++
 gas/testsuite/gas/bfin/expected_errors.s |    2 ++
 3 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index 12e7525..7961e2e 100644
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -849,6 +849,8 @@ asm_1:
 	{
 	  if (!IS_DREG ($2) || !IS_DREG ($4))
 	    return yyerror ("Dregs expected");
+	  else if (REG_SAME ($2, $4))
+	    return yyerror ("Illegal dest register combination");
 	  else if (!valid_dreg_pair (&$9, $11))
 	    return yyerror ("Bad dreg pair");
 	  else if (!valid_dreg_pair (&$13, $15))
diff --git a/gas/testsuite/gas/bfin/expected_errors.l b/gas/testsuite/gas/bfin/expected_errors.l
index 216c8e1..1c12e65 100644
--- a/gas/testsuite/gas/bfin/expected_errors.l
+++ b/gas/testsuite/gas/bfin/expected_errors.l
@@ -103,3 +103,5 @@
 .*:131: Error: Illegal dest register combination. Input text was A0.H.
 .*:133: Error: Illegal dest register combination.
 .*:134: Error: Illegal dest register combination.
+.*:135: Error: Illegal dest register combination.
+.*:136: Error: Illegal dest register combination.
diff --git a/gas/testsuite/gas/bfin/expected_errors.s b/gas/testsuite/gas/bfin/expected_errors.s
index 677103c..a671a2c 100644
--- a/gas/testsuite/gas/bfin/expected_errors.s
+++ b/gas/testsuite/gas/bfin/expected_errors.s
@@ -132,3 +132,5 @@
 
 	(R0, R0) = BYTEOP16P (R1:0, R3:2);
 	(R7, R7) = BYTEOP16P (R1:0, R3:2);
+	(R1, R1) = BYTEOP16M (R1:0, R3:2);
+	(R4, R4) = BYTEOP16M (R1:0, R3:2);
-- 
1.7.4.1


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