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[PATCH] Add CpuF16C to CPU_BDVER2_FLAGS.
- From: Quentin Neill <quentin dot neill dot gnu at gmail dot com>
- To: binutils at sourceware dot org
- Date: Thu, 2 Jun 2011 16:32:04 -0500
- Subject: [PATCH] Add CpuF16C to CPU_BDVER2_FLAGS.
Hi,
This patch adds the CpuF16C bit to CPU_BDVER2_FLAGS with associated test cases.
It passes make check tests on x86_64. Okay to commit?
--
Quentin
opcodes/
2011-06-02 Quentin Neill <quentin.neill@amd.com>
* i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
* i386-init.h: Regenerated.
gas/testsuite/
2011-06-02 Quentin Neill <quentin.neill@amd.com>
* gas/i386/arch-10.d: Add f16c flag and F16C instruction pattern.
* gas/i386/arch-10.s: Add F16C instruction.
* gas/i386/arch-10-1.l: Add F16C instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Add f16c flag and F16C instruction pattern.
* gas/i386/x86-64-arch-2.s: Add F16C instruction.
---
gas/testsuite/ChangeLog | 11 +++++++++++
gas/testsuite/gas/i386/arch-10-1.l | 3 +++
gas/testsuite/gas/i386/arch-10-2.l | 3 +++
gas/testsuite/gas/i386/arch-10-3.l | 3 +++
gas/testsuite/gas/i386/arch-10-4.l | 3 +++
gas/testsuite/gas/i386/arch-10.d | 3 ++-
gas/testsuite/gas/i386/arch-10.s | 2 ++
gas/testsuite/gas/i386/x86-64-arch-2.d | 3 ++-
gas/testsuite/gas/i386/x86-64-arch-2.s | 2 ++
opcodes/ChangeLog | 5 +++++
opcodes/i386-gen.c | 2 +-
opcodes/i386-init.h | 2 +-
12 files changed, 38 insertions(+), 4 deletions(-)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index f7a7079..5739aeb 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2011-06-02 Quentin Neill <quentin.neill@amd.com>
+
+ * gas/i386/arch-10.d: Add f16c flag and F16C instruction pattern.
+ * gas/i386/arch-10.s: Add F16C instruction.
+ * gas/i386/arch-10-1.l: Add F16C instruction pattern.
+ * gas/i386/arch-10-2.l: Likewise.
+ * gas/i386/arch-10-3.l: Likewise.
+ * gas/i386/arch-10-4.l: Likewise.
+ * gas/i386/x86-64-arch-2.d: Add f16c flag and F16C instruction pattern.
+ * gas/i386/x86-64-arch-2.s: Add F16C instruction.
+
2011-06-02 Jie Zhang <jie@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
diff --git a/gas/testsuite/gas/i386/arch-10-1.l
b/gas/testsuite/gas/i386/arch-10-1.l
index 578252d..9a83bc3 100644
--- a/gas/testsuite/gas/i386/arch-10-1.l
+++ b/gas/testsuite/gas/i386/arch-10-1.l
@@ -31,6 +31,7 @@
.*:62: Error: .*
.*:64: Error: .*
.*:66: Error: .*
+.*:68: Error: .*
GAS LISTING .*
@@ -104,3 +105,5 @@ GAS LISTING .*
[ ]*64[ ]+blsr %ecx,%ebx
[ ]*65[ ]+\# TBM
[ ]*66[ ]+blcfill %ecx,%ebx
+[ ]*67[ ]+\# F16C
+[ ]*68[ ]+vcvtph2ps %xmm2,%xmm4
diff --git a/gas/testsuite/gas/i386/arch-10-2.l
b/gas/testsuite/gas/i386/arch-10-2.l
index ae91ef1..98de9ba 100644
--- a/gas/testsuite/gas/i386/arch-10-2.l
+++ b/gas/testsuite/gas/i386/arch-10-2.l
@@ -30,6 +30,7 @@
.*:62: Error: .*
.*:64: Error: .*
.*:66: Error: .*
+.*:68: Error: .*
GAS LISTING .*
@@ -103,3 +104,5 @@ GAS LISTING .*
[ ]*64[ ]+blsr %ecx,%ebx
[ ]*65[ ]+\# TBM
[ ]*66[ ]+blcfill %ecx,%ebx
+[ ]*67[ ]+\# F16C
+[ ]*68[ ]+vcvtph2ps %xmm2,%xmm4
diff --git a/gas/testsuite/gas/i386/arch-10-3.l
b/gas/testsuite/gas/i386/arch-10-3.l
index b15788e..a877729 100644
--- a/gas/testsuite/gas/i386/arch-10-3.l
+++ b/gas/testsuite/gas/i386/arch-10-3.l
@@ -23,6 +23,7 @@
.*:62: Error: .*
.*:64: Error: .*
.*:66: Error: .*
+.*:68: Error: .*
GAS LISTING .*
@@ -99,3 +100,5 @@ GAS LISTING .*
[ ]*64[ ]+blsr %ecx,%ebx
[ ]*65[ ]+\# TBM
[ ]*66[ ]+blcfill %ecx,%ebx
+[ ]*67[ ]+\# F16C
+[ ]*68[ ]+vcvtph2ps %xmm2,%xmm4
diff --git a/gas/testsuite/gas/i386/arch-10-4.l
b/gas/testsuite/gas/i386/arch-10-4.l
index f59185d..8e2143d 100644
--- a/gas/testsuite/gas/i386/arch-10-4.l
+++ b/gas/testsuite/gas/i386/arch-10-4.l
@@ -21,6 +21,7 @@
.*:62: Error: .*
.*:64: Error: .*
.*:66: Error: .*
+.*:68: Error: .*
GAS LISTING .*
@@ -97,3 +98,5 @@ GAS LISTING .*
[ ]*64[ ]+blsr %ecx,%ebx
[ ]*65[ ]+\# TBM
[ ]*66[ ]+blcfill %ecx,%ebx
+[ ]*67[ ]+\# F16C
+[ ]*68[ ]+vcvtph2ps %xmm2,%xmm4
diff --git a/gas/testsuite/gas/i386/arch-10.d b/gas/testsuite/gas/i386/arch-10.d
index 65a58c5..8d8949e 100644
--- a/gas/testsuite/gas/i386/arch-10.d
+++ b/gas/testsuite/gas/i386/arch-10.d
@@ -1,4 +1,4 @@
-#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
+#as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm+f16c
#objdump: -dw
#name: i386 arch 10
@@ -39,4 +39,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+[ ]*[a-f0-9]+: c4 e2 79 13 e2 vcvtph2ps %xmm2,%xmm4
#pass
diff --git a/gas/testsuite/gas/i386/arch-10.s b/gas/testsuite/gas/i386/arch-10.s
index 0e72a76..b92e558 100644
--- a/gas/testsuite/gas/i386/arch-10.s
+++ b/gas/testsuite/gas/i386/arch-10.s
@@ -64,3 +64,5 @@ nopl (%eax)
blsr %ecx,%ebx
# TBM
blcfill %ecx,%ebx
+# F16C
+vcvtph2ps %xmm2,%xmm4
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.d
b/gas/testsuite/gas/i386/x86-64-arch-2.d
index 824badd..211cd45 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.d
@@ -1,4 +1,4 @@
-#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
+#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm+f16c
#objdump: -dw
#name: x86-64 arch 2
@@ -38,4 +38,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
+[ ]*[a-f0-9]+: c4 e2 79 13 e2 vcvtph2ps %xmm2,%xmm4
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.s
b/gas/testsuite/gas/i386/x86-64-arch-2.s
index 5da17f6..7fe4c71 100644
--- a/gas/testsuite/gas/i386/x86-64-arch-2.s
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.s
@@ -62,3 +62,5 @@ xstorerng
blsr %ecx,%ebx
# TBM
blcfill %ecx,%ebx
+# F16C
+vcvtph2ps %xmm2,%xmm4
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index e4a41e7..7436d8b 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2011-06-02 Quentin Neill <quentin.neill@amd.com>
+
+ * i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
+ * i386-init.h: Regenerated.
+
2011-06-02 Jie Zhang <jie@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
Maciej Rozycki <macro@codesourcery.com>
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 3d7de38..fc34292 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -91,7 +91,7 @@ static initializer cpu_flag_init[] =
{ "CPU_BDVER1_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP"
},
{ "CPU_BDVER2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM"
},
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C"
},
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 6433596..6c8f0f5 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -142,7 +142,7 @@
#define CPU_BDVER2_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
- 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }
+ 1, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0 } }
#define CPU_8087_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
--
1.7.1