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[PATCH] Fix new pdistn instruction.
- From: David Miller <davem at davemloft dot net>
- To: binutils at sourceware dot org
- Date: Sat, 03 Sep 2011 23:19:38 -0400 (EDT)
- Subject: [PATCH] Fix new pdistn instruction.
The destination register should be an integer instead of a float
reg.
Ok to commit?
opcodes/
2011-09-03 David S. Miller <davem@davemloft.net>
* sparc-opc.c (pdistn): Destination is integer not float register.
gas/testsuite/
2011-09-03 David S. Miller <davem@davemloft.net>
* gas/sparc/hpcvis3.s: Correct pdistn test.
* gas/sparc/hpcvis3.d: Likewise.
diff --git a/gas/testsuite/gas/sparc/hpcvis3.d b/gas/testsuite/gas/sparc/hpcvis3.d
index 8c49f01..cc99fc5 100644
--- a/gas/testsuite/gas/sparc/hpcvis3.d
+++ b/gas/testsuite/gas/sparc/hpcvis3.d
@@ -55,7 +55,7 @@ Disassembly of section .text:
b4: 9f b2 c5 6d fsra16 %f42, %f44, %f46
b8: a3 b3 45 af fslas32 %f44, %f46, %f48
bc: a7 b3 c5 f1 fsra32 %f46, %f48, %f50
- c0: ab b4 47 f3 pdistn %f48, %f50, %f52
+ c0: 83 b4 47 f3 pdistn %f48, %f50, %g1
c4: af b4 c8 15 fmean16 %f50, %f52, %f54
c8: b3 b5 48 57 fpadd64 %f52, %f54, %f56
cc: b7 b5 c8 99 fchksum16 %f54, %f56, %f58
diff --git a/gas/testsuite/gas/sparc/hpcvis3.s b/gas/testsuite/gas/sparc/hpcvis3.s
index e262169..da09ffd 100644
--- a/gas/testsuite/gas/sparc/hpcvis3.s
+++ b/gas/testsuite/gas/sparc/hpcvis3.s
@@ -48,7 +48,7 @@
fsra16 %f42, %f44, %f46
fslas32 %f44, %f46, %f48
fsra32 %f46, %f48, %f50
- pdistn %f48, %f50, %f52
+ pdistn %f48, %f50, %g1
fmean16 %f50, %f52, %f54
fpadd64 %f52, %f54, %f56
fchksum16 %f54, %f56, %f58
diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index e44d321..c4a5f71 100644
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -1864,7 +1864,7 @@ SLCBCC("cbnefr", 15),
{ "fsra16", F3F(2, 0x36, 0x02b), F3F(~2, ~0x36, ~0x02b), "v,B,H", 0, v9b },
{ "fslas32", F3F(2, 0x36, 0x02d), F3F(~2, ~0x36, ~0x02d), "v,B,H", 0, v9b },
{ "fsra32", F3F(2, 0x36, 0x02f), F3F(~2, ~0x36, ~0x02f), "v,B,H", 0, v9b },
-{ "pdistn", F3F(2, 0x36, 0x03f), F3F(~2, ~0x36, ~0x03f), "v,B,H", 0, v9b },
+{ "pdistn", F3F(2, 0x36, 0x03f), F3F(~2, ~0x36, ~0x03f), "v,B,d", 0, v9b },
{ "fmean16", F3F(2, 0x36, 0x040), F3F(~2, ~0x36, ~0x040), "v,B,H", 0, v9b },
{ "fpadd64", F3F(2, 0x36, 0x042), F3F(~2, ~0x36, ~0x042), "v,B,H", 0, v9b },
{ "fchksum16", F3F(2, 0x36, 0x044), F3F(~2, ~0x36, ~0x044), "v,B,H", 0, v9b },