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* It might be useful to mention in the documentation why this feature is needed.
Oh, in the documentation? I was all set to explain it to you here.
The short version is, "For some targets, it's an ABI requirement that no instruction may span a certain aligned boundary." Is that what you had in mind?
* What about instructions with delay slots ?
That's a good question. I hadn't thought about it, since so far I've only considered CPUs that don't have delay slots. The only machine with delay slots that I know anything about is sparc, so if my logic doesn't hold for some other machine you know about, you'll have to educate me.
On machines like sparc, where all instructions are the same size, I don't think there is any problem.
[snip]+@section @code{.bundle_lock} and @code{.bundle_unlock}
* Can these directives be nested ?
As I've specified it, no.
For now, I've added a couple of sentences to the documentation to make it explicit that nesting is not allowed.
* Presumably once a bundle has been created by the assembler, it needs to be preserved by the linker. Thus it seems to me that you are going to need a reloc or two to tell the linker about the bundle.
I don't think there's any need for this, but perhaps you have something in mind that I don't know about.
Cheers Nick
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