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[PATCH, PPC] Committed obvious patch to fix stq/lq operand handling
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: binutils at sourceware dot org
- Cc: Alan Modra <amodra at gmail dot com>
- Date: Wed, 15 Aug 2012 16:29:17 -0500
- Subject: [PATCH, PPC] Committed obvious patch to fix stq/lq operand handling
Without the typo fix below, objdump incorrectly outputs the RS and RT registers
of the stq and lq instructions like it does for the RA register (ie, r0 is
printed as "0") like so:
0: e0 01 00 10 lq 0,16(r4)
4: f8 01 00 12 stq 0,16(r4)
rather than the correct:
0: e0 01 00 10 lq r0,16(r4)
4: f8 01 00 12 stq r0,16(r4)
I've committed this patch as obvious and will add it to the branch when I
commit the yield/mdoio/mdoom patch in a couple of days.
Peter
opcodes/
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
gas/testsuite/
* gas/ppc/power4.s <lq, stq>: Add more tests.
* gas/ppc/power4.d: Likewise.
Index: opcodes/ppc-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
retrieving revision 1.148
diff -u -p -r1.148 ppc-opc.c
--- opcodes/ppc-opc.c 15 Aug 2012 15:33:24 -0000 1.148
+++ opcodes/ppc-opc.c 15 Aug 2012 21:04:59 -0000
@@ -512,11 +512,11 @@ const struct powerpc_operand powerpc_ope
#define RD RS
{ 0x1f, 21, NULL, NULL, PPC_OPERAND_GPR },
- /* The RS and RT fields of the DS form stq instruction, which have
- special value restrictions. */
+ /* The RS and RT fields of the DS form stq and DQ form lq instructions,
+ which have special value restrictions. */
#define RSQ RS + 1
#define RTQ RSQ
- { 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR_0 },
+ { 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR },
/* The RS field of the tlbwe instruction, which is optional. */
#define RSO RSQ + 1
Index: gas/testsuite/gas/ppc/power4.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/power4.d,v
retrieving revision 1.7
diff -u -p -r1.7 power4.d
--- gas/testsuite/gas/ppc/power4.d 2 Aug 2010 08:22:53 -0000 1.7
+++ gas/testsuite/gas/ppc/power4.d 15 Aug 2012 21:04:59 -0000
@@ -10,7 +10,7 @@ start address 0x0+
Sections:
Idx Name +Size +VMA +LMA +File off +Algn
- +0 \.text +0+c4 +0+ +0+ +.*
+ +0 \.text +0+dc +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+1 \.data +0+10 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, DATA
@@ -102,3 +102,9 @@ Disassembly of section \.text:
+b8: 7c 01 17 ec dcbz r1,r2
+bc: 7c 23 27 ec dcbzl r3,r4
+c0: 7c 05 37 ec dcbz r5,r6
+ +c4: e0 40 00 10 lq r2,16\(0\)
+ +c8: e0 05 00 10 lq r0,16\(r5\)
+ +cc: e0 45 00 10 lq r2,16\(r5\)
+ +d0: f8 40 00 12 stq r2,16\(0\)
+ +d4: f8 05 00 12 stq r0,16\(r5\)
+ +d8: f8 45 00 12 stq r2,16\(r5\)
Index: gas/testsuite/gas/ppc/power4.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ppc/power4.s,v
retrieving revision 1.2
diff -u -p -r1.2 power4.s
--- gas/testsuite/gas/ppc/power4.s 30 Apr 2004 06:46:53 -0000 1.2
+++ gas/testsuite/gas/ppc/power4.s 15 Aug 2012 21:04:59 -0000
@@ -72,6 +72,13 @@ dsym1:
dcbzl 3, 4
dcbz 5, 6
+ lq 2,16(0)
+ lq 0,16(5)
+ lq 2,16(5)
+ stq 2,16(0)
+ stq 0,16(5)
+ stq 2,16(5)
+
.section ".data"
usym0: .llong 0xcafebabe
usym1: