[PATCH, v3]: AMD btver1 and btver2 enablement

["Eggone, NagaJyothi" <NagaJyothi dot Eggone at amd dot com>]

Hello H.J.,

> -----Original Message-----
> From: H.J. Lu [mailto:hjl.tools@gmail.com]
> Sent: Thursday, August 16, 2012 11:31 PM
> To: Eggone, NagaJyothi
> Cc: binutils@sourceware.org
> Subject: Re: [PATCH, v2]: AMD btver1 and btver2 enablement
> 
> >>
> >> Do you really need Cpu3dnowPrfch? Where will it be used?
> >
> > The 3dnow 'prefetch' and 'prefetchw' instructions are available both
> on the btver1 and btver2 cores. I could not have enabled both these
> instructions for these cores without adding a cpu flag bit (this
> corresponds to the cpuid ECX bit 8 on AMD processors).
> 
> Please drop Cpu3dnowPrfch and add CpuPRFCHW to
> prefetch.
> 
> gas/testsuite changes should be in gas/testsuite/ChangeLog.
> 
> --
> H.J.

I have changed the patch as per suggestions above. This patch also includes the diffs of files opcodes/i386-init.h and opcodes/i386-tbl.h.
Please review and if OK, commit to trunk.

Thanks,
Nagajyothi

Attachment: btver.patch
Description: btver.patch

Attachment: btver_gastest.patch
Description: btver_gastest.patch

Attachment: gas-changelog.txt
Description: gas-changelog.txt

Attachment: gastest-changelog.txt
Description: gastest-changelog.txt

Attachment: opcodes-changelog.txt
Description: opcodes-changelog.txt