Commit: V850: Fix disassembly of the clr1, not1, set1 and tst1 instructions

[Nick Clifton <nickc at redhat dot com>]

Hi Guys,

  I am checking in the patch below to fix the disassembly of the second
  form of the clr1, not1, set1 and tst1 instructions supported by the
  V850 architecture (v850e1 and up).  Currently they are disassembled
  without the square parentheses around the second register argument,
  but this patch fixes that.  It also fixes a minor snafu in the
  assembler where a local buffer was being used to hold a non-local
  error message.

Cheers
  Nick

opcodes/ChangeLog
2012-10-04  Nick Clifton  <nickc@redhat.com>

	* v850-dis.c (disassemble): Place square parentheses around second
	register operand of clr1, not1, set1 and tst1 instructions.
  
gas/ChangeLog
2012-10-04  Nick Clifton  <nickc@redhat.com>

	* config/tc-v850.c (v850_insert_operand): Use a static buffer for
	the error message.

gas/testsuite/ChangeLog
2012-10-04  Nick Clifton  <nickc@redhat.com>

	* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1
	and tst1 insns.


Index: gas/config/tc-v850.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-v850.c,v
retrieving revision 1.58
diff -u -3 -p -r1.58 tc-v850.c
--- gas/config/tc-v850.c	12 May 2011 23:50:23 -0000	1.58
+++ gas/config/tc-v850.c	4 Oct 2012 10:23:42 -0000
@@ -1955,7 +1955,7 @@ v850_insert_operand (unsigned long insn,
 
 	  else if (val < (offsetT) min || val > (offsetT) max)
 	    {
-	      char buf [128];
+	      static char buf [128];
 
 	      /* Restore min and mix to expected values for decimal ranges.  */
 	      if ((operand->flags & V850_OPERAND_SIGNED)
Index: gas/testsuite/gas/v850/v850e1.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/v850/v850e1.d,v
retrieving revision 1.5
diff -u -3 -p -r1.5 v850e1.d
--- gas/testsuite/gas/v850/v850e1.d	13 Apr 2011 13:20:24 -0000	1.5
+++ gas/testsuite/gas/v850/v850e1.d	4 Oct 2012 10:23:43 -0000
@@ -10,7 +10,7 @@ Disassembly of section .text:
 0x0+00 e0 0f 42 13 [ 	]*bsh	r1, r2
 0x0+04 e0 1f 40 23 [ 	]*bsw	sp, gp
 0x0+08 05 02  [ 	]*callt	5
-0x0+0a e8 3f e4 00 [ 	]*clr1	r7, r8
+0x0+0a e8 3f e4 00 [ 	]*clr1	r7, \[r8\]
 0x0+0e f6 17 14 1b [ 	]*cmov	nz, -10, r2, sp
 0x0+12 e1 17 34 1b [ 	]*cmov	nz, r1, r2, sp
 0x0+16 e0 07 44 01 [ 	]*ctret	
@@ -30,16 +30,16 @@ Disassembly of section .text:
 0x0+4e e1 17 20 1a [ 	]*mul	r1, r2, sp
 0x0+52 e4 2f 22 32 [ 	]*mulu	gp, r5, r6
 0x0+56 e3 2f 46 32 [ 	]*mulu	35, r5, r6
-0x0+5a ea 4f e2 00 [ 	]*not1	r9, r10
+0x0+5a ea 4f e2 00 [ 	]*not1	r9, \[r10\]
 0x0+5e a8 07 01 80 [ 	]*prepare	{r24}, 20
 0x0+62 a8 07 03 70 [ 	]*prepare	{r25 - r27}, 20, sp
-0x0+66 e1 4f e0 00 [ 	]*set1	r9, r1
+0x0+66 e1 4f e0 00 [ 	]*set1	r9, \[r1\]
 0x0+6a ea 47 00 02 [ 	]*sasf	nz, r8
 0x0+6e 60 20  [ 	]*sld.bu	0\[ep\], gp
 0x0+70 77 28  [ 	]*sld.hu	14\[ep\], r5
 0x0+72 a1 00  [ 	]*sxb	r1
 0x0+74 e2 00  [ 	]*sxh	r2
-0x0+76 ff 07 e6 00 [ 	]*tst1	r0, lp
+0x0+76 ff 07 e6 00 [ 	]*tst1	r0, \[lp\]
 0x0+7a 83 00  [ 	]*zxb	sp
 0x0+7c c4 00  [ 	]*zxh	gp
 0x0+7e 63 ff 9d 00[ 	]*st.w	lp, 156\[sp\]
Index: opcodes/v850-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/v850-dis.c,v
retrieving revision 1.15
diff -u -3 -p -r1.15 v850-dis.c
--- opcodes/v850-dis.c	1 Aug 2012 00:41:35 -0000	1.15
+++ opcodes/v850-dis.c	4 Oct 2012 10:23:45 -0000
@@ -309,9 +309,11 @@ disassemble (bfd_vma memaddr, struct dis
 		   We may need to output a trailing ']' if the last operand
 		   in an instruction is the register for a memory address.
 
-		   The exception (and there's always an exception) is the
+		   The exception (and there's always an exception) are the
 		   "jmp" insn which needs square brackets around it's only
-		   register argument.  */
+		   register argument, and the clr1/not1/set1/tst1 insns
+		   which [...] around their second register argument.  */
+
 	      prefix = "";
 	      if (operand->flags & V850_OPERAND_BANG)
 		{
@@ -334,6 +336,16 @@ disassemble (bfd_vma memaddr, struct dis
 		  info->fprintf_func (info->stream, "%s[", prefix);
 		  square = TRUE;
 		}
+	      else if (opnum == 2
+		       && (   op->opcode == 0x00e407e0 /* clr1 */
+			   || op->opcode == 0x00e207e0 /* not1 */
+			   || op->opcode == 0x00e007e0 /* set1 */
+			   || op->opcode == 0x00e607e0 /* tst1 */
+			   ))
+		{
+		  info->fprintf_func (info->stream, ", %s[", prefix);
+		  square = TRUE;
+		}		
 	      else if (opnum > 1)
 		info->fprintf_func (info->stream, ", %s", prefix);