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[rl78] fix reloc assumption in rl78 relaxing


Applied.  Fixes the case where you have a skip-type opcode that isn't
followed by a branch.

	* elf32-rl78.c (GET_RELOC): Assert that there are relocs to get.
	(rl78_elf_relax_section): Only fetch the next reloc if there is
	one expected.

Index: bfd/elf32-rl78.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-rl78.c,v
retrieving revision 1.13
diff -p -U 5 -r1.13  bfd/elf32-rl78.c
--- bfd/elf32-rl78.c	30 Mar 2013 10:14:15 -0000	1.13
+++ bfd/elf32-rl78.c	2 Apr 2013 23:28:40 -0000
@@ -2191,10 +2191,11 @@ rl78_elf_relax_section
 
       pc = sec->output_section->vma + sec->output_offset
 	+ srel->r_offset;
 
 #define GET_RELOC \
+      BFD_ASSERT (nrelocs > 0);			       \
       symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
       pcrel = symval - pc + srel->r_addend; \
       nrelocs --;
 
 #define SNIPNR(offset, nbytes) \
@@ -2231,11 +2232,17 @@ rl78_elf_relax_section
 	 61 F3 EF ad	SKNH ; BR $rel8
        */
 
       if (irel->r_addend & RL78_RELAXA_BRA)
 	{
-	  GET_RELOC;
+	  /* SKIP opcodes that skip non-branches will have a relax tag
+	     but no corresponding symbol to relax against; we just
+	     skip those.  */
+	  if (irel->r_addend & RL78_RELAXA_RNUM)
+	    {
+	      GET_RELOC;
+	    }
 
 	  switch (insn[0])
 	    {
 	    case 0xec: /* BR !!abs20 */
 
@@ -2300,10 +2307,13 @@ rl78_elf_relax_section
 
 	    case 0x61: /* PREFIX */
 	      /* For SKIP/BR, we change the BR opcode and delete the
 		 SKIP.  That way, we don't have to find and change the
 		 relocation for the BR.  */
+	      /* Note that, for the case where we're skipping some
+		 other insn, we have no "other" reloc but that's safe
+		 here anyway. */
 	      switch (insn[1])
 		{
 		case 0xc8: /* SKC */
 		  if (insn[2] == 0xef)
 		    {


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