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[PATCH] GAS: Remove relaxation for MIPS-3D branches, add documentation
- From: "Maciej W. Rozycki" <macro at codesourcery dot com>
- To: Richard Sandiford <rdsandiford at googlemail dot com>
- Cc: <binutils at sourceware dot org>
- Date: Mon, 10 Jun 2013 18:27:40 +0100
- Subject: [PATCH] GAS: Remove relaxation for MIPS-3D branches, add documentation
Hi,
I have noticed there is no documentation for the GAS --relax-branch
option, neither in the --help output nor in the manual. In preparing that
I have realised we can't actually do branch relaxation for the MIPS-3D
branches in the way we currently do it, because BC1ANY2F is not a logical
negation of BC1ANY2T nor likewise BC1ANY4F of BC1ANY4T (for that we'd need
BC1ALL4F, etc.).
Let's therefore call this change a MIPS-3D branch relaxation fix with an
associated documentation update. Like the DSP branches the MIPS-3D ones
are rare, so I have simply decided to disallow relaxation for them. One
day I may decide to implement proper relaxation for them with a longer
sequence, or someone else may. For now the change brings correctness to
code produced (or refused). Note that I've added an explicit reference to
the TF instruction bit (bit #16) in md_convert_frag.
No regressions across the usual targets. A new test case is included.
I have verified that updated info and PDF manuals look good. OK to apply?
2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
gas/
* config/tc-mips.c (append_insn): Don't do branch relaxation for
MIPS-3D instructions either.
(md_convert_frag): Update the COPx branch mask accordingly.
* config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
option.
* doc/as.texinfo (Overview): Add --relax-branch and
--no-relax-branch.
* doc/c-mips.texi (MIPS Opts): Document --relax-branch and
--no-relax-branch.
gas/testsuite/
* gas/mips/relax-bc1any.l: New test.
* gas/mips/relax-bc1any.s: New test source.
* gas/mips/mips.exp: Run the new test case.
Maciej
binutils-mips-gas-relax-branch.patch
Index: binutils-fsf-trunk-quilt/gas/config/tc-mips.c
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/config/tc-mips.c 2013-06-10 15:53:05.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/config/tc-mips.c 2013-06-10 15:55:35.011199752 +0100
@@ -4394,9 +4394,9 @@ append_insn (struct mips_cl_insn *ip, ex
out that the branch was out-of-range, we'll get an error. */
&& !mips_opts.warn_about_macros
&& (mips_opts.at || mips_pic == NO_PIC)
- /* Don't relax BPOSGE32/64 as they have no complementing
- branches. */
- && !(ip->insn_mo->ase & (ASE_DSP64 | ASE_DSP)));
+ /* Don't relax BPOSGE32/64 or BC1ANY2T/F and BC1ANY4T/F
+ as they have no complementing branches. */
+ && !(ip->insn_mo->ase & (ASE_MIPS3D | ASE_DSP64 | ASE_DSP)));
if (!HAVE_CODE_COMPRESSION
&& address_expr
@@ -18177,10 +18177,10 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNU
switch ((insn >> 28) & 0xf)
{
case 4:
- /* bc[0-3][tf]l? and bc1any[24][ft] instructions can
- have the condition reversed by tweaking a single
- bit, and their opcodes all have 0x4???????. */
- gas_assert ((insn & 0xf1000000) == 0x41000000);
+ /* bc[0-3][tf]l? instructions can have the condition
+ reversed by tweaking a single TF bit, and their
+ opcodes all have 0x4???????. */
+ gas_assert ((insn & 0xf3e00000) == 0x41000000);
insn ^= 0x00010000;
break;
@@ -19725,7 +19725,8 @@ MIPS options:\n\
-msoft-float do not allow floating-point instructions\n\
-msingle-float only allow 32-bit floating-point operations\n\
-mdouble-float allow 32-bit and 64-bit floating-point operations\n\
---[no-]construct-floats [dis]allow floating point values to be constructed\n"
+--[no-]construct-floats [dis]allow floating point values to be constructed\n\
+--[no-]relax-branch [dis]allow out-of-range branches to be relaxed\n"
));
#ifdef OBJ_ELF
fprintf (stream, _("\
Index: binutils-fsf-trunk-quilt/gas/doc/as.texinfo
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/doc/as.texinfo 2013-05-02 14:16:47.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/doc/as.texinfo 2013-06-10 15:55:35.011199752 +0100
@@ -1349,6 +1349,12 @@ value into the two single width floating
the double width register. By default @samp{--construct-floats} is
selected, allowing construction of these floating point constants.
+@item --relax-branch
+@itemx --no-relax-branch
+The @samp{--relax-branch} option enables the relaxation of out-of-range
+branches. By default @samp{--no-relax-branch} is selected, causing any
+out-of-range branches to produce an error.
+
@cindex emulation
@item --emulation=@var{name}
This option causes @command{@value{AS}} to emulate @command{@value{AS}} configured
Index: binutils-fsf-trunk-quilt/gas/doc/c-mips.texi
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/doc/c-mips.texi 2013-05-10 22:30:22.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/doc/c-mips.texi 2013-06-10 15:55:35.011199752 +0100
@@ -388,6 +388,27 @@ width register by the single width regis
By default @code{--construct-floats} is selected, allowing construction
of these floating point constants.
+@item --relax-branch
+@itemx --no-relax-branch
+The @samp{--relax-branch} option enables the relaxation of out-of-range
+branches. Any branches whose target cannot be reached directly are
+converted to a small instruction sequence including an inverse-condition
+branch to the physically next instruction, and a jump to the original
+target is inserted between the two instructions. In PIC code the jump
+will involve further instructions for address calculation.
+
+The @code{BC1ANY2F}, @code{BC1ANY2T}, @code{BC1ANY4F}, @code{BC1ANY4T},
+@code{BPOSGE32} and @code{BPOSGE64} instructions are excluded from
+relaxation, because they have no complementing counterparts. They could
+be relaxed with the use of a longer sequence involving another branch,
+however this has not been implemented and if their target turns out of
+reach, they produce an error even if branch relaxation is enabled.
+
+Also no @sc{mips16} branches are ever relaxed.
+
+By default @samp{--no-relax-branch} is selected, causing any out-of-range
+branches to produce an error.
+
@item --trap
@itemx --no-break
@c FIXME! (1) reflect these options (next item too) in option summaries;
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips.exp
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/testsuite/gas/mips/mips.exp 2013-06-06 17:18:55.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/mips.exp 2013-06-10 15:55:35.011199752 +0100
@@ -842,6 +842,9 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "relax-swap1-mips2"
run_dump_test "relax-swap2"
run_dump_test_arches "relax-swap3" [mips_arch_list_all]
+ run_list_test_arches "relax-bc1any" "-mips3d -relax-branch" \
+ [mips_arch_list_matching mips64 \
+ !micromips]
run_list_test_arches "relax-bposge" "-mdsp -relax-branch" \
[mips_arch_list_matching mips64r2 \
!micromips]
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax-bc1any.l
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax-bc1any.l 2013-06-10 15:55:35.011199752 +0100
@@ -0,0 +1,7 @@
+.*: Assembler messages:
+.*:6: Warning: Relaxed out-of-range branch into a jump
+.*:11: Warning: Relaxed out-of-range branch into a jump
+.*:7: Error: Branch out of range
+.*:8: Error: Branch out of range
+.*:9: Error: Branch out of range
+.*:10: Error: Branch out of range
Index: binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax-bc1any.s
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-fsf-trunk-quilt/gas/testsuite/gas/mips/relax-bc1any.s 2013-06-10 15:55:35.011199752 +0100
@@ -0,0 +1,14 @@
+# Source file to test branch relaxation with the BC1ANY2F, BC1ANY2T,
+# BC1ANY4F and BC1ANY4T instructions.
+
+ .text
+foo:
+ b bar
+ bc1any2f $cc0, bar
+ bc1any2t $cc0, bar
+ bc1any4f $cc0, bar
+ bc1any4t $cc0, bar
+ bal bar
+
+ .space 0x20000
+bar: