Re: Minor tweaks to the MIPS documentation

["Maciej W. Rozycki" <macro at codesourcery dot com>]

On Sat, 22 Jun 2013, Richard Sandiford wrote:

> Several small and unexciting changes:
> 
> - Consistently use "MIPS" rather than "@sc{mips}".  "@sc{mips}" looks strange
>   in the PDF output and "MIPS" was already the prevalent form.  Also,
>   "@sc{mips}" doesn't really look right alongside "microMIPS".

 Thanks, I think you missed a couple that are not strictly "MIPS" though, 
a patch follows.  And I think @sc{isa} might fall into the same category 
(but I haven't touched these).  I also changed one "MIPS3" to "MIPS III" 
for consistency with "MIPS V" used elsewhere, and replaced some other @sc 
commands with @samp for consistency with the corresponding part of 
as.texinfo.  Also I think we should standardise on "MIPS16" rather than 
"MIPS 16" used in some places, the latter has never been proper usage.

 Overall perhaps using @acronym{MIPS}, @acronym{microMIPS}, @acronym{ISA}, 
etc. like the GDB manual does for these names would be a good idea?  I 
remember Eli (cc-ed), the GDB manual reviewer, being quite keen on using 
this command for this purpose.  Plus keeping the manuals at least remotely 
consistent in style across toolchain pieces seems reasonable to me.

 As to this change -- checked html, info and pdf output.  OK to apply?

2013-06-25  Maciej W. Rozycki  <macro@codesourcery.com>

	gas/
	* doc/c-mips.texi (MIPS Options): Use @samp rather than @sc
	for MIPS ISA names.  Replace @sc{mips16} with literal `MIPS16'.
	(MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.

  Maciej

binutils-mips-gas-doc-sc.diff
Index: binutils-fsf-trunk-quilt/gas/doc/c-mips.texi
===================================================================
--- binutils-fsf-trunk-quilt.orig/gas/doc/c-mips.texi	2013-06-25 01:09:04.000000000 +0100
+++ binutils-fsf-trunk-quilt/gas/doc/c-mips.texi	2013-06-25 20:08:03.371225443 +0100
@@ -91,8 +91,8 @@ R4000 processor, and @samp{-mips4} to th
 R10000 processors.  @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2},
 @samp{-mips64}, and @samp{-mips64r2}
 correspond to generic
-@sc{MIPS V}, @sc{MIPS32}, @sc{MIPS32 Release 2}, @sc{MIPS64},
-and @sc{MIPS64 Release 2}
+@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, @samp{MIPS64},
+and @samp{MIPS64 Release 2}
 ISA processors, respectively.  You can also switch
 instruction sets during the assembly; see @ref{MIPS ISA, Directives to
 override the ISA level}.
@@ -414,7 +414,7 @@ be relaxed with the use of a longer sequ
 however this has not been implemented and if their target turns out of
 reach, they produce an error even if branch relaxation is enabled.
 
-Also no @sc{mips16} branches are ever relaxed.
+Also no MIPS16 branches are ever relaxed.
 
 By default @samp{--no-relax-branch} is selected, causing any out-of-range
 branches to produce an error.
@@ -636,7 +636,7 @@ assembly.  @code{.set mips@var{n}} affec
 are permitted, but also how certain macros are expanded.  @code{.set
 mips0} restores the @sc{isa} level to its original level: either the
 level you selected with command line options, or the default for your
-configuration.  You can use this feature to permit specific @sc{mips3}
+configuration.  You can use this feature to permit specific MIPS III
 instructions while assembling in 32 bit mode.  Use this directive with
 care!