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Re: [PATCH 5/6] x86/MPX: fix operand size handling


>>> On 08.10.13 at 17:45, "H.J. Lu" <hjl.tools@gmail.com> wrote:
> On Tue, Oct 8, 2013 at 7:43 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> All MPX instructions in 64-bit mode ignore REX.W, which means we neither
>> need to encode this bit nor should disassemble with 32-bit register
>> operands.
>>
>> No MPX instructions would ever take a 16-bit register operand.
>>
>> gas/
>> 2013-10-08  Jan Beulich <jbeulich@suse.com>
>>
>>         * tc-i386.c (process_suffix): Warn about 32-bit register operands
>>         to MPX instructions in 64-bit mode.
> 
> I think it should be an error.

I can certainly change that - a warning just seemed a better match
to hardware ignoring operand size here.

>> opcodes/
>> 2013-10-08  Jan Beulich <jbeulich@suse.com>
>>
>>         * i386-dis.c (intel_operand_size): Move v_bnd_mode alongside the
>>         default case.
>>         (OP_E_register): Move v_bnd_mode alongside m_mode.
>>         * i386-opc.h (REGNAM_RAX): New.
>>         * i386-opc.tbl (bndcl, bndcu, bndcn): Drop Reg16. Add NoRex64.
>>         * i386-tbl.h: Re-generate.
>>
> 
> Should we also remove Disp16?

Yes, we certainly could, but then also from the other MPX
instructions. Logically this would belong into the address size fix
patch though.

Jan


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