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[Sim] Large patch to sim/common/genmloop.sh


The following patch permits a new -prefix option to override the
prefix prepended to various symbol names generated by genmloop.sh.  If
it is omitted, the default action is to use $cpu (as before).  @cpu@
is still used where it makes sense to do so.

Okay to commit?


2000-12-04  Ben Elliston  <bje@redhat.com>

	* genmloop.sh: Add a -prefix command line option. Use @prefix@
	throughout, not @cpu@.

diff -u -r1.31 genmloop.sh
--- genmloop.sh	2000/03/02 09:09:17	1.31
+++ genmloop.sh	2000/12/04 03:07:16
@@ -1,5 +1,5 @@
 # Generate the main loop of the simulator.
-# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
 # Contributed by Cygnus Support.
 #
 # This file is part of the GNU simulators.
@@ -100,6 +100,10 @@
 #	Things can be sped up by generating both serial and parallel versions
 #	and is better suited to mixed parallel architectures like the m32r.
 #
+# -prefix: string to prepend to function names in mloop.c/eng.h.
+#
+#       If no prefix is specified, the cpu type is used.
+#
 # -switch file: specify file containing semantics implemented as a switch()
 #
 # -cpu <cpu-family>
@@ -128,6 +132,7 @@
 switch=
 cpu="unknown"
 infile=""
+prefix="unknown"
 
 while test $# -gt 0
 do
@@ -145,6 +150,7 @@
 	-parallel-write) parallel=write ;;
 	-parallel-generic-write) parallel=genwrite ;;
 	-parallel-only) parallel_only=yes ;;
+	-prefix) shift ; prefix=$1 ;;
 	-switch) shift ; switch=$1 ;;
 	-cpu) shift ; cpu=$1 ;;
 	-infile) shift ; infile=$1 ;;
@@ -170,9 +176,14 @@
     exit 1
 fi
 
+if [ "x$prefix" = xunknown ] ; then
+    prefix=$cpu
+fi
+
 lowercase='abcdefghijklmnopqrstuvwxyz'
 uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
 CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"`
+PREFIX=`echo ${prefix} | tr "${lowercase}" "${uppercase}"`
 
 ##########################################################################
 
@@ -191,11 +202,11 @@
 fi
 
 echo ""
-echo "/* WITH_SCACHE_PBB_${CPU}: non-zero if the pbb engine was selected.  */"
+echo "/* WITH_SCACHE_PBB_${PREFIX}: non-zero if the pbb engine was selected.  */"
 if [ x$pbb = xyes ] ; then
-	echo "#define WITH_SCACHE_PBB_${CPU} 1"
+	echo "#define WITH_SCACHE_PBB_${PREFIX} 1"
 else
-	echo "#define WITH_SCACHE_PBB_${CPU} 0"
+	echo "#define WITH_SCACHE_PBB_${PREFIX} 0"
 fi
 
 echo ""
@@ -256,16 +267,16 @@
 echo "/* Functions defined in the generated mainloop.c file"
 echo "   (which doesn't necessarily have that file name).  */"
 echo ""
-echo "extern ENGINE_FN ${cpu}_engine_run_full;"
-echo "extern ENGINE_FN ${cpu}_engine_run_fast;"
+echo "extern ENGINE_FN ${prefix}_engine_run_full;"
+echo "extern ENGINE_FN ${prefix}_engine_run_fast;"
 
 if [ x$pbb = xyes ] ; then
 	echo ""
-	echo "extern SEM_PC ${cpu}_pbb_begin (SIM_CPU *, int);"
-	echo "extern SEM_PC ${cpu}_pbb_chain (SIM_CPU *, SEM_ARG);"
-	echo "extern SEM_PC ${cpu}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
-	echo "extern void ${cpu}_pbb_before (SIM_CPU *, SCACHE *);"
-	echo "extern void ${cpu}_pbb_after (SIM_CPU *, SCACHE *);"
+	echo "extern SEM_PC ${prefix}_pbb_begin (SIM_CPU *, int);"
+	echo "extern SEM_PC ${prefix}_pbb_chain (SIM_CPU *, SEM_ARG);"
+	echo "extern SEM_PC ${prefix}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
+	echo "extern void ${prefix}_pbb_before (SIM_CPU *, SCACHE *);"
+	echo "extern void ${prefix}_pbb_after (SIM_CPU *, SCACHE *);"
 fi
 
 ##########################################################################
@@ -296,7 +307,7 @@
    virtual and real.  */
 
 static INLINE void
-@cpu@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
+@prefix@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
 		    PCADDR pc, int fast_p)
 {
 #if WITH_SCACHE
@@ -309,7 +320,7 @@
 /* Fill in tracing/profiling fields of an ARGBUF.  */
 
 static INLINE void
-@cpu@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
+@prefix@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
 		       int trace_p, int profile_p)
 {
   ARGBUF_TRACE_P (abuf) = trace_p;
@@ -324,13 +335,13 @@
    of parallel insns.  */
 
 static INLINE void
-@cpu@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
+@prefix@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
 {
   ARGBUF *abuf = &sc[0].argbuf;
-  const IDESC *id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEFORE];
+  const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEFORE];
 
   abuf->fields.before.first_p = first_p;
-  @cpu@_fill_argbuf (current_cpu, abuf, id, pc, 0);
+  @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
   /* no need to set trace_p,profile_p */
 }
 
@@ -339,12 +350,12 @@
    parallel insns.  */
 
 static INLINE void
-@cpu@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
+@prefix@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
 {
   ARGBUF *abuf = &sc[0].argbuf;
-  const IDESC *id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_AFTER];
+  const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_AFTER];
 
-  @cpu@_fill_argbuf (current_cpu, abuf, id, pc, 0);
+  @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
   /* no need to set trace_p,profile_p */
 }
 
@@ -373,7 +384,7 @@
 #define FAST_P 0
 
 void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
 {
 #define FAST_P 0
   SIM_DESC current_state = CPU_STATE (current_cpu);
@@ -428,7 +439,7 @@
 #include "$switch"
 #endif
 #else
-      @cpu@_sem_init_idesc_table (current_cpu);
+      @prefix@_sem_init_idesc_table (current_cpu);
 #endif
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -483,7 +494,7 @@
     cat << EOF
 
 static INLINE SCACHE *
-@cpu@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
+@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
                      unsigned int hash_mask, int FAST_P)
 {
   /* First step: look up current insn in hash table.  */
@@ -518,7 +529,7 @@
 #define FAST_P 0
 
 void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
 {
   SIM_DESC current_state = CPU_STATE (current_cpu);
   SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -536,7 +547,7 @@
   if (! CPU_IDESC_SEM_INIT_P (current_cpu))
     {
 #if ! WITH_SEM_SWITCH_FULL
-      @cpu@_sem_init_idesc_table (current_cpu);
+      @prefix@_sem_init_idesc_table (current_cpu);
 #endif
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -547,7 +558,7 @@
     {
       SCACHE *sc;
 
-      sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
+      sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
 
 /* begin full-exec-scache */
 EOF
@@ -579,7 +590,7 @@
 #define FAST_P 1
 
 void
-@cpu@_engine_run_fast (SIM_CPU *current_cpu)
+@prefix@_engine_run_fast (SIM_CPU *current_cpu)
 {
   SIM_DESC current_state = CPU_STATE (current_cpu);
   SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -603,7 +614,7 @@
 #include "$switch"
 #endif
 #else
-      @cpu@_semf_init_idesc_table (current_cpu);
+      @prefix@_semf_init_idesc_table (current_cpu);
 #endif
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -614,7 +625,7 @@
     {
       SCACHE *sc;
 
-      sc = @cpu@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
+      sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
 
 /* begin fast-exec-scache */
 EOF
@@ -650,7 +661,7 @@
     cat << EOF
 
 static INLINE SCACHE *
-@cpu@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
+@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
                      unsigned int hash_mask, int FAST_P)
 {
   /* First step: look up current insn in hash table.  */
@@ -687,7 +698,7 @@
 #define FAST_P 0
 
 void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
 {
   SIM_DESC current_state = CPU_STATE (current_cpu);
   SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -722,7 +733,7 @@
   if (! CPU_IDESC_SEM_INIT_P (current_cpu))
     {
 #if ! WITH_SEM_SWITCH_FULL
-      @cpu@_sem_init_idesc_table (current_cpu);
+      @prefix@_sem_init_idesc_table (current_cpu);
 #endif
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -757,7 +768,7 @@
 #define FAST_P 1
 
 void
-@cpu@_engine_run_fast (SIM_CPU *current_cpu)
+@prefix@_engine_run_fast (SIM_CPU *current_cpu)
 {
   SIM_DESC current_state = CPU_STATE (current_cpu);
   SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -801,7 +812,7 @@
 #include "$switch"
 #endif
 #else
-      @cpu@_semf_init_idesc_table (current_cpu);
+      @prefix@_semf_init_idesc_table (current_cpu);
 #endif
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -850,7 +861,7 @@
    FAST_P is non-zero if no tracing/profiling/etc. is wanted.  */
 
 INLINE SEM_PC
-@cpu@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
+@prefix@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
 {
   SEM_PC new_vpc;
   PCADDR pc;
@@ -933,11 +944,11 @@
 	/* Was pbb terminated by a cti?  */
 	if (_cti_sc)
 	  {
-	    id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_CTI_CHAIN];
+	    id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CTI_CHAIN];
 	  }
 	else
 	  {
-	    id = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_CHAIN];
+	    id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CHAIN];
 	  }
 	SEM_SET_CODE (&sc->argbuf, id, FAST_P);
 	sc->argbuf.idesc = id;
@@ -964,7 +975,7 @@
 /* Chain to the next block from a non-cti terminated previous block.  */
 
 INLINE SEM_PC
-@cpu@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
+@prefix@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 
@@ -1002,7 +1013,7 @@
    BR_TYPE != SEM_BRANCH_UNTAKEN.  */
 
 INLINE SEM_PC
-@cpu@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
+@prefix@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
 		     SEM_BRANCH_TYPE br_type, PCADDR new_pc)
 {
   SEM_PC *new_vpc_ptr;
@@ -1060,7 +1071,7 @@
    This is called before each insn.  */
 
 void
-@cpu@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
+@prefix@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
 {
   SEM_ARG sem_arg = sc;
   const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
@@ -1108,7 +1119,7 @@
    insns.  */
 
 void
-@cpu@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
+@prefix@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
 {
   SEM_ARG sem_arg = sc;
   const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
@@ -1131,7 +1142,7 @@
 #define FAST_P 0
 
 void
-@cpu@_engine_run_full (SIM_CPU *current_cpu)
+@prefix@_engine_run_full (SIM_CPU *current_cpu)
 {
   SIM_DESC current_state = CPU_STATE (current_cpu);
   SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -1176,14 +1187,14 @@
 #include "$switch"
 #endif
 #else
-      @cpu@_sem_init_idesc_table (current_cpu);
+      @prefix@_sem_init_idesc_table (current_cpu);
 #endif
 
       /* Initialize the "begin (compile) a pbb" virtual insn.  */
       vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
       SEM_SET_FULL_CODE (SEM_ARGBUF (vpc),
-			 & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN]);
-      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN];
+			 & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
+      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
 
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -1193,7 +1204,7 @@
      pbb we don't want to call pbb_begin each time (which hashes on the pc
      and does a table lookup).  A way to speed this up is to save vpc
      between calls.  */
-  vpc = @cpu@_pbb_begin (current_cpu, FAST_P);
+  vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
 
   do
     {
@@ -1223,7 +1234,7 @@
 #define FAST_P 1
 
 void
-@cpu@_engine_run_fast (SIM_CPU *current_cpu)
+@prefix@_engine_run_fast (SIM_CPU *current_cpu)
 {
   SIM_DESC current_state = CPU_STATE (current_cpu);
   SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
@@ -1268,14 +1279,14 @@
 #include "$switch"
 #endif
 #else
-      @cpu@_semf_init_idesc_table (current_cpu);
+      @prefix@_semf_init_idesc_table (current_cpu);
 #endif
 
       /* Initialize the "begin (compile) a pbb" virtual insn.  */
       vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
       SEM_SET_FAST_CODE (SEM_ARGBUF (vpc),
-			 & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN]);
-      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@CPU@_INSN_X_BEGIN];
+			 & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
+      vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
 
       CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
     }
@@ -1285,7 +1296,7 @@
      pbb we don't want to call pbb_begin each time (which hashes on the pc
      and does a table lookup).  A way to speed this up is to save vpc
      between calls.  */
-  vpc = @cpu@_pbb_begin (current_cpu, FAST_P);
+  vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
 
   do
     {
@@ -1307,8 +1318,10 @@
 
 fi # -pbb
 
-# Process @cpu@,@CPU@ appearing in mainloop.in.
-sed -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" < tmp-mloop.cin > mloop.cin
+# Expand @..@ macros appearing in tmp-mloop.cin.
+sed \
+  -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" \
+  -e "s/@prefix@/$prefix/g" -e "s/@PREFIX@/$PREFIX/g" < tmp-mloop.cin > mloop.cin
 rc=$?
 rm -f tmp-mloop.cin
 

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