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[RFA:] Simplification transformations in semantics.scm
- From: Doug Evans <dje at transmeta dot com>
- To: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>
- Cc: cgen at sources dot redhat dot com
- Date: Fri, 6 Dec 2002 21:26:31 -0800 (PST)
- Subject: [RFA:] Simplification transformations in semantics.scm
- References: <200212070354.gB73s0b2019391@ignucius.axis.se>
I'd like to have the .cpu file that this is necessary for
so that I can play with it a bit first. Possible?
IIRC, I decided (either explicitly or otherwise) to not allow
conditionals in the left hand side of an assignment.
It complicates things a lot.
I believe gcc doesn't support them (does it?)
and in general I'm always leary of introducing radical
departures from gcc rtl without a lot of thought and compelling
arguments that it is warranted.
Hans-Peter Nilsson writes:
> These simplifications make the CGEN semantic compilation see
> somewhat-trivial sets of registers such that the "profile"
> support (actually: model unit machinery) marks the right operand
> for input and output. In a .cpu file I have, I use (through
> some levels of pmacros) (set (reg h-hw (index-of (operand op))) src)
> and the other forms below, which confuse CGEN.
>
> Another way (independently correct AFAICT) to make model support
> work for me would be to make the model machinery just ignore the
> semantics of the insn and use the operands I *tell it* to use in
> the model description, as long as it can find them in the format
> description. Right now inputs and outputs of units are filtered
> through whatever is collected from the semantic compilation, so
> "op" in (set (reg h-hw (index-of (operand op))) src) is *not*
> marked as an output operand. Subsequently, with (op INT -1) in
> a unit output list, the model function for that unit always get
> -1 for that operand; op is listed as an input but not as an
> output. Gah! That's a bug, I think; the unit input and output
> should override what the semantic compiler thinks.
I don't understand. There's some missing info here.
At face value `op' is not an output operand.
Maybe if I saw the entire define-insn it would be more clear.
Howzaboutit?
> In summary, this patch simplifies (as the comments say):
>
> (reg XMODE h-hw (index-of YMODE (operand XMODE op)))
> into
> (operand XMODE op)))
>
> (SET (if IFMODE COND ltrue lfalse) src)
> into (for SET = {set, set-quiet}):
> (if COND (SET ltrue dst) (SET lfalse dst))
>
> (reg h-hw RMODE (if COND ntrue nfalse))
> into
> (if RMODE COND (reg h-hw RMODE ntrue)
> (reg h-hw RMODE nfalse))
> but only if simplification makes that latter expression
> not take that form, i.e. (if COND (reg...) (reg...))
>
> If you accept this change but consider it so large that
> copyright is an issue, we have to work something out, since
> there's no copyright agreement between Axis Communications and
> Red Hat. Suggestions welcome. FWIW, I can only think of this
> way to accomplish what I describe above, so I hope to get away
> with it as obvious enough. (I wish, I wish, that Red Hat would
> find a way to assign copyright for CGEN to the FSF. Oh yes, and
> peace of earth.)
>
> * semantics.scm (-simplify-expr-fn) <set, set-quiet, reg>: New
> simplifications.
>
> Index: semantics.scm
> ===================================================================
> RCS file: /cvs/src/src/cgen/semantics.scm,v
> retrieving revision 1.1.1.1
> diff -c -p -r1.1.1.1 semantics.scm
> *** semantics.scm 28 Jul 2000 04:11:52 -0000 1.1.1.1
> --- semantics.scm 7 Dec 2002 02:48:45 -0000
> ***************
> *** 256,261 ****
> --- 256,392 ----
> known-val ; (rtx-make 'const 'INT known-val)
> #f)))
>
> + ((set set-quiet)
> + ; Transform: (set (if IFMODE COND ltrue lfalse) src)
> + ; into: (if COND (set ltrue dst) (set lfalse dst))
> + ; hoping for further simplification through the
> + ; regno-operand-to-operand simplification below.
> + ; This conditional-lvalue destination is expected from the
> + ; if-transformations below rather than from user input.
> + ; FIXME: Other conditionals than "if" may be useful
> + ; too. Add them as the need arises. Maybe check src for 'if too.
> + (let ((ifexpr (-rtx-traverse (rtx-set-dest expr)
> + 'RTX 'DFLT expr 2 tstate appstuff))
> + (src (-rtx-traverse (rtx-set-src expr)
> + 'RTX 'DFLT expr 3 tstate appstuff)))
> + (if (rtx-kind? 'if ifexpr)
> + (let* ((name (rtx-name expr))
> + (simplified-result
> + (rtx-make
> + 'if 'DFLT (rtx-if-test ifexpr)
> + (rtx-make name
> + (rtx-if-then ifexpr) src)
> + (rtx-make name
> + (rtx-if-else ifexpr) src))))
> + (logit 4
> + "SET -: " (rtx-dump expr) "\n"
> + "SET +: " (rtx-dump simplified-result) "\n")
> + simplified-result)
> + #f)))
> +
> + ((reg)
> + (if (rtx-reg-number expr)
> + (let* ((regname (rtx-reg-name expr))
> + (regmode (rtx-mode expr))
> + (regno (-rtx-traverse (rtx-reg-number expr)
> + 'RTX 'DFLT expr 3 tstate appstuff)))
> + (case (rtx-name regno)
> + ((index-of)
> +
> + ; When op is a h-hw, simplify
> + ; (reg XMODE h-hw (index-of YMODE (operand XMODE op)))
> + ; into (operand XMODE op). For example, (reg h-gr
> + ; (regno Rd)) into Rd, when Rd is a h-gr and likewise
> + ; (reg SI h-gr (regno Rd)) provided that h-gr holds
> + ; registers in SImode.
> + (if (and
> + (rtx-operand? (rtx-index-of-value regno))
> + (equal?
> + (op:hw-name (rtx-operand-obj (rtx-index-of-value regno)))
> + regname)
> +
> + ; For the modes specified on reg and the operand,
> + ; only do the simplification when both have the
> + ; same mode, or if either is DFLT, the other one
> + ; having the "natural" mode of the register.
> + ; We can only check modes of the hardware,
> + ; i.e. (op:mode ), when keeping just one mach, so
> + ; we'll assume we can't make the simplification at
> + ; other times. One occasion we will be called with
> + ; multiple machs active is when generating
> + ; ARCH-desc.h for the simulator.
> + (not (keep-multiple?))
> + (let ((xmode (rtx-mode (rtx-index-of-value regno)))
> + (natmode (op:mode (rtx-operand-obj
> + (rtx-index-of-value regno)))))
> + (or (mode:eq? regmode xmode)
> + (and (mode:eq? 'DFLT regmode)
> + (mode:eq? natmode xmode))
> + (and (mode:eq? 'DFLT xmode)
> + (mode:eq? natmode regmode)))))
> + (begin
> + (logit 4
> + "REG INDEX-OF: -" (rtx-dump expr) "\n"
> + "REG INDEX-OF: +" (rtx-dump
> + (rtx-index-of-value regno))
> + "\n")
> +
> + (-rtx-traverse
> + (rtx-index-of-value regno)
> + 'RTX 'DFLT expr op-pos tstate appstuff))
> + #f))
> +
> + ((if)
> +
> + ; Transform (reg h-hw RMODE (if COND ntrue nfalse)) into
> + ; (if RMODE COND (reg h-hw RMODE ntrue)
> + ; (reg h-hw RMODE nfalse))
> + ; if further simplifications eliminate terms in ntrue
> + ; and nfalse, as with the index-of case above.
> + ; RMODE has to be collected from the natural mode of
> + ; the register, if it's DFLT in the original
> + ; expression. Again, we can only check modes of the
> + ; hardware, i.e. (op:mode ), when keeping just one
> + ; mach, so we'll assume we can't make the
> + ; simplification at other times.
> + (if (keep-multiple?)
> + #f
> + (let*
> + ((regmode (rtx-mode expr))
> + (rmode
> + (if (mode:eq? regmode 'DFLT)
> + (obj:name (hw-mode (current-hw-sem-lookup-1
> + regname)))
> + regmode))
> + (simplified-result
> + (-rtx-traverse
> + (rtx-make
> + 'if
> + rmode
> + (rtx-if-test regno)
> + (rtx-make 'reg regmode
> + regname (rtx-if-then regno))
> + (rtx-make 'reg regmode
> + regname (rtx-if-else regno)))
> + 'RTX rmode expr op-pos tstate appstuff)))
> +
> + ; Only pass on the simplification if (at least) the
> + ; reg parts were simplified away.
> + (if (or (not (rtx-kind? 'if simplified-result))
> + (and (not (rtx-kind? 'reg (rtx-if-then
> + simplified-result)))
> + (not (rtx-kind? 'reg (rtx-if-then
> + simplified-result)))))
> + (begin
> + (logit 4
> + "REG-IF -: " (rtx-dump expr) "\n"
> + "REG-IF +: " (rtx-dump simplified-result)
> + "\n")
> + simplified-result)
> + #f))))
> + (else #f)))
> + #f))
> +
> ; Leave EXPR unchanged and continue.
> (else #f))
> )
>
> brgds, H-P
>