This is the mail archive of the cgen@sources.redhat.com mailing list for the CGEN project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[patch][rfa] -opcode-slots: Handling of short insns


Hi,

This patch fixes a problem I ran across while working on an internal port. Incorrect opcodes and masks were sometimes being generated for the short insns of variable length ISAs because of two problems in -opcode-slots:

1) The test of bit positions against the insn-length was off by one. Thjs could lead to incorrect opcode bits being generated.

2) While the 'compute' function correctly generated zeroes for the extra bits when computing 'opcode', it was also generating zeroes for these bits when computing 'opcode-mask', thus rendering these bits irrelevent. This could lead to the generation of numerous unreachable cases in the generated decoder switch.

The patch corrects the comparison of bit position against the insn-length and also allows the caller of 'compute' to specify the default bit value which should be generated bits beyond the length of a short insn. This allows 0 to be specified when computing 'opcode' and 1 to be specified when computing opcode-mask. The patch also changes some of the logit calls to print values in hex which is more appropriate when examining bitmasks

This patch corrects the problem encountered with my internal port. I know of no other port which is affected by this bug. I have tested it against frv and xstormy16 and verified no changes to the generated decoders.

OK to commit?

Dave
2004-01-28  Dave Brolley  <brolley@redhat.com>

	* decode.scm (-opcode-slots): For short insns, generate 'opcode' with
	zeroes in the extra bit positions and generate 'opcode-mask' with ones
	in the extra bit positions.

cgen/ChangeLog:
2004-01-26  Dave Brolley  <brolley@redhat.com>

	* decode.scm (-opcode-slots): For short insns, generate 'opcode' with
	zeroes in the extra bit positions and generate 'opcode-mask' with ones
	in the extra bit positions.

cgen/cpu/ChangeLog.RedHat:
2004-01-26  Dave Brolley  <brolley@redhat.com>

	* mep.opc (OPTION_MASK): Remove dangerous whitspace following a
	backslash intended as a line continuation.

sid/main/dynamic/ChangeLog.RedHat:
2004-01-26  Dave Brolley  <brolley@redhat.com>

	* mepCfg.h (allocate_timer, configure_timer): New methods of MepBoardCfg.
	(set_opt_timer_channel_bitw): New method of MepBoardCfg.
	(timer_channel_bitw): New member of MepBoardCfg.
	* mepCfg.cxx (MepBoardCfg): Initialize timer_channel_bitw.
	(set_dmem_bank_num): Allow dmem_bank_num to be set to zero.
	(map_imem_dmem): Correct fmem_base_address for case of no dmem.
	Initialize dmem_base[0].
	(MepBoardCfg::write_config): Call configure_timer. Move setup of timer
	interrupt pins to configure_timer. Handle case where dmem_bank_num is
	zero.
	(add_timer): Move allocation, scheduling and connection of timer to
	allocate_timer and configure_timer.
	(allocate_timer, configure_timer): New methods of MepBoardCfg.
	(configure_dmac): Use timer_channel_bitw.
	(set_opt_timer_channel_bitw): New method of MepBoardCfg.
	* mainDynamic.cxx (usage): Document --timer-channel-bitw.
	(option_num): Add opt_timer_channel_bitw.
	(long_options): Add timer-channel-bitw.
	(main): Handle opt_timer_channel_bitw.
	* commonCfg.h (set_opt_timer_channel_bitw): New prototype.

utils/mep/ChangeLog:
2004-01-26  Dave Brolley  <brolley@redhat.com>

	* mepcfgtool.c (generate_simulator_script): Generate
	--timer-channel-bitw


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]