Re: Simulator and 24 Bit instructions

[Ronald Hecht <ronald dot hecht at uni-rostock dot de>]

Attached you will find my current cpu-file.

I'm having trouble to define the (add with carry)-instruction. If an 
carry occurs, the accu becomes zero. Would you please have a look?

Thanks
Ronald

Ronald Hecht wrote:

> Hello,
>
> I'm having now problems with 24 Bit instructions in the simulator. I 
> tracked down the issue to common/sim-trace.c. In 
> sim_cgen_disassemble_insn() I found
>
>  if (insn_bit_length <= 32)
>    base_length = insn_bit_length;
>  else
>    base_length = min (cd->base_insn_bitsize, insn_bit_length);
>  switch (base_length)
>    {
>    case 0 : return; /* fake insn, typically "compile" (aka "invalid") */
>    case 8 : insn_value = insn_buf.bytes[0]; break;
>    case 16 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
>    case 32 : insn_value = T2H_4 (insn_buf.words[0]); break;
>    default: abort ();
>    }
>
> So 24 Bit instructions are a problem. I hacked
>
>    case 24 : insn_value = (T2H_4 (insn_buf.words[0]) / 256) & 
> 0x00ffffff; break;
>
> and it works for me. But I think this might be a problem on big endian 
> machines or is this hack ok?
>
> Thanks in advance
> Ronald

; Simple 8 Bit FPGA Processor -*- Scheme -*-

(include "simplify.inc")

; FIXME: Delete sign extension of accumulator results.
; Sign extension is done when accumulator is read.

; define-arch must appear first

(define-arch
  (name proc8) ; name of cpu family
  (comment "8 Bit Processor")
  (insn-lsb0? #f)
  (machs proc8)
  (isas proc8)
)

(define-isa
  (name proc8)
  (default-insn-bitsize 8)
  (base-insn-bitsize 8)
  (default-insn-word-bitsize 8)
)

(define-cpu
  (name proc8bf)
  (comment "8 Bit Processor Family")
  (endian big)
  (word-bitsize 8)
)

(define-mach
  (name proc8)
  (comment "8 Bit Processor Machine")
  (cpu proc8bf)
)

(define-model
  (name proc8)
  (comment "8 Bit Processor Model")
  (attrs)
  (mach proc8)
  (unit u-exec "Execution Unit" () 1 1
	() () () ())
)

(dnf f-op        "op"                        ()   0  8)
(dnf f-uimm8     "unsigned 8 bit immediate"  ()   8  8)
(dnf f-uimm16    "unsigned 16 bit immediate" ()   8 16)

(define-normal-insn-enum
  insn-op "insn format enums" () OP_ f-op
  (.map .str (.iota 256))
)

(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())

(dsh h-accu "Accumulator"    (PROFILE) (register WI ))
(dsh h-xreg "Index Register" (PROFILE) (register WI ))
(dsh h-zflag "Zero flag"     () (register BI))
(dsh h-cflag "Carry flag"    () (register BI))

(dnop accu     "accumulator"               () h-accu   f-nil)
(dnop xreg     "Index register"            () h-xreg   f-nil)
(dnop uimm8    "unsigned 8 bit immediate"  () h-uint   f-uimm8)
(dnop uimm16   "unsigned 16 bit immediate" () h-uint   f-uimm16)
(dnop zflag    "Zero flag"                 () h-zflag  f-nil)
(dnop cflag    "Carry flag"                () h-cflag  f-nil)


(dni nop "nop"
     ()
     "nop"
     (+ OP_0)
     (nop)
     ()
)

(dni lda "lda"
     ()
     "lda $uimm16"
     (+ OP_1 uimm16)
     (set accu (mem WI uimm16))
     ()
)

(dni ldc "ldc"
     ()
     "ldc $uimm8"
     (+ OP_2 uimm8)
     (set accu uimm8)
     ()
)

(dni sta "sta"
     ()
     "sta $uimm16"
     (+ OP_3 uimm16)
     (set (mem WI uimm16) accu)
     ()
)

(dni ldx "ldx"
     ()
     "ldx $uimm8"
     (+ OP_8 uimm8)
     (set xreg uimm8)
     ()
)

(dni incx "incx"
     ()
     "incx"
     (+ OP_9)
     (parallel ()
	       (set xreg (add xreg (const 1)))
	       (set zflag (eq (add xreg (const 1)) (const 0))))
     ()
)

(dni decx "decx"
     ()
     "decx"
     (+ OP_10)
     (parallel ()
	       (set xreg (sub xreg (const 1)))
	       (set zflag (eq (sub xreg (const 1)) (const 0))))
     ()
)

(dni add "add"
     ()
     "add $uimm16"
     (+ OP_16 uimm16)
     (sequence ()
	       (set accu (addc accu (mem WI uimm16) cflag))
	       (set cflag (add-cflag accu (mem WI uimm16) cflag)))
     ()
)

(dni ror "ror"
     ()
     "ror"
     (+ OP_27)
     (sequence ((WI tmp))
	       (if cflag 
		   (set tmp (or (srl accu #x1) #x80))
		   (set tmp (srl accu #x1)))
	       (set cflag (and accu #x1))
	       (set accu tmp))
     ()
)

					;		  (set accu (or (srl accu #x1) #x80))
;;		   (nop)
					;		  (set accu (srl accu #x1)))
;;		   (nop))
;	       (set cflag #x1))

(dni jmp "jmp"
     ()
     "jmp $uimm16"
     (+ OP_32 uimm16)
     (set pc uimm16)
     ()
)

(dni jnc "jnc"
     ()
     "jnc $uimm16"
     (+ OP_34 uimm16)
     (if (not cflag) (set pc uimm16))
     ()
)

(dni jnz "jnz"
     ()
     "jnz $uimm16"
     (+ OP_36 uimm16)
     (if (not zflag) (set pc uimm16))
     ()
)