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Implementation of Register Indirect Addressing with scaled Displacement
- From: Christian Walter <wolti at sil dot at>
- To: cgen at sourceware dot org
- Date: Sat, 21 Oct 2006 01:12:39 +0200
- Subject: Implementation of Register Indirect Addressing with scaled Displacement
Hello,
I would like to ask a question about implementing a load instruction
with displacement using the GNU binutils/CGEN. I have spent the last
days working with CGEN, BFD and the other stuff and have at least a
basic knowledge about the topics (And already got a basic assembler
working for our target). I know most of you are doing an advanced degree
and might be bored about the questions but I have not figured out how to
do it so I try to ask:
I would like to implement a instruction for our 16bit processor
(university project) to support a instruction of the form 'ld rX,
#3(rY)' where the displacement is scaled by the factor 8. rY can be any
register and specially the program counter. Therefore the following code
should be possible:
constant:
.byte 0x33
label0:
ld r0, #constant[pc]
ld pc, #label1[pc]
...
label1:
ld pc, lr
Using a displacement would require the labels to be aligned for 3 bit
(factor of eight). We have chosen this instruction set because of a
16bit processor and to save space in our opcodes. I have not found an
elegant way to this except adding an alignment information into the
assembler code. Is there any other way to do this?
How did all of you learn working with binutils/...? Studying source code
and reading the BFD/binutils documentation? I found starting somewhat
difficult to be honest - Specially BFD and the ELF backend.
Kind Regards,
Christian Walter
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