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>These instructions are usually atomic and aren't nice when you want >to minimize system interrupt latency. An alternative I have seen is >to replace the multiple instruction with many moves. This tends to >explode the code. If you read the PPC manual, you'll find that lswi/stwsi can not move an arbitray set of registers from/to memory, but start with a register and then move all the registers of higher numbers up to gpr31. You can't use two lswi/stwsi instructions to split the action of a single lswi/stwsi instruction. Your choices would be to use lswx/stswx(but that requires two more registers), or a lwz/stw and a string of lwzu/stwu which causes an instruction per register. -- Peter Barada pbarada@wavemark.com Wizard 781-852-2768 (direct) WaveMark Technologies, Inc. 781-270-0193 (fax) "Real men know that you should never attempt to accomplish with words what you can do with a flame thrower" --Bruce Ferstein _______________________________________________ New CrossGCC FAQ: http://www.objsw.com/CrossGCC _______________________________________________ To remove yourself from the crossgcc list, send mail to crossgcc-request@cygnus.com with the text 'unsubscribe' (without the quotes) in the body of the message.