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Jens-Christian Lache wrote: > > If I compile the following lines > > for (i=0;i<10;i++) { > asm volatile ("mla %0,%3,%2,%1":"=r" (sum):"r" (coeff), "r" (sample), "r" (sum)); > } > I get the assembler output > .L3: > ldr r3, [fp, #-28] > cmp r3, #9 > ble .L6 > b .L4 > .L6: > ldr r3, [fp, #-16] > ldr r2, [fp, #-20] > ldr r1, [fp, #-24] > ldr ip, [fp, #-16] > mla r3,r1,r2,r3 > mov r2, r3 > str r2, [fp, #-16] > .L5: > ldr r3, [fp, #-28] > add r2, r3, #1 > str r2, [fp, #-28] > b .L3 > > (explanation: [fp, #-16]: sum; [fp, #-20]:coeff; [fp, #-24]:sample) > > I can life with the fact that gcc doesn´t recognize the > special MAC instruction from the ARM, but the line > after it is stupid, > str r3, [fp, #-16] > would work fine too, and is one ins. shorter. > And the line above it is not nessesary, too. > 1.) Why does the gcc produce such output? > 2.) How can I avoid this? Are you invoking any optimization when you run GCC? I see this kind of code generation when I don't specify any optimization. Do you get the same result with -O2 ? In general, it best to specify what version of GCC you are using and the options used when running it when asking this type of question. At ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
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