This is the mail archive of the crossgcc@sourceware.cygnus.com mailing list for the crossgcc project.
See the CrossGCC FAQ for lots more infromation.
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |
Bill Pringlemeir wrote: > > More picking on Nicole... > > The line "*temp = *((unsigned long *)DATA_PORT;" should have an extra > paren, right? Just a typo. Also, you have cast the DATA_PORT to an > 'unsigned long' and the buffer is 'unsigned short'. This can do weird > things on the ARM depending on the model you have compiled with at the > command line. Ie, some ARM processors don't support LDRH, STRH and > two LDRB or STRB instructions are generated. Can you use an > objdump --disassemble or generate assembler instead of an object to > see what the code differences are? > Yeah - that's a typo. It is intentionally putting a long into a short so that it uses half-word mode, from what I understand. > Calling the compiler with different arguements (or if defaults changed) > could affect the generated code. If volatile didn't solve the problem, > then it is hard to guess what is causing the problem. Seeing the generated > code (for just this function) would help a lot. Below is the generated code, which looks like it should be doing the correct thing to me.
0000d204 <readSectorBuffer_short>: d204: e1a0c00d mov r12, sp d208: e92dd800 stmdb sp!, {r11, r12, lr, pc} d20c: e24cb004 sub r11, r12, #4 ; 0x4 d210: e24dd00c sub sp, sp, #12 ; 0xc d214: e50b0010 str r0, [r11, -#16] d218: e51b3010 ldr r3, [r11, -#16] d21c: e50b3014 str r3, [r11, -#20] d220: e3a03000 mov r3, #0 ; 0x0 d224: e50b3018 str r3, [r11, -#24] d228: e51b3018 ldr r3, [r11, -#24] d22c: e35300ff cmp r3, #255 ; 0xff d230: da000000 ble d238 <readSectorBuffer_short+0x34> d234: ea00000a b d264 <readSectorBuffer_short+0x60> d238: e51b3014 ldr r3, [r11, -#20] d23c: e3a02302 mov r2, #134217728 ; 0x8000000 d240: e1d210b0 ldrh r1, [r2] d244: e1c310b0 strh r1, [r3] d248: e51b3014 ldr r3, [r11, -#20] d24c: e2832002 add r2, r3, #2 ; 0x2 d250: e50b2014 str r2, [r11, -#20] d254: e51b3018 ldr r3, [r11, -#24] d258: e2832001 add r2, r3, #1 ; 0x1 d25c: e50b2018 str r2, [r11, -#24] d260: eafffff0 b d228 <readSectorBuffer_short+0x24> d264: e91ba800 ldmdb r11, {r11, sp, pc}
------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |