This is the mail archive of the crossgcc@sources.redhat.com mailing list for the crossgcc project.
See the CrossGCC FAQ for lots more information.
| Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
|---|---|---|
| Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |
| Other format: | [Raw text] | |
I needed to build glibc-2.2.2 using gcc-3.x to support
some of our older redhat machines.
This file patches glibc-2.2.2.
When using crosstool, I placed it in:
patches/glibc-2.2.2/glibc-gcc3.patch
-vince
diff -u glibc-2.2.2/configure.ORIG glibc-2.2.2/configure
--- glibc-2.2.2/configure.ORIG 2001-02-09 10:36:24.000000000 -0800
+++ glibc-2.2.2/configure 2005-01-27 10:01:14.000000000 -0800
@@ -1437,7 +1437,7 @@
ac_prog_version=`$CC -v 2>&1 | sed -n 's/^.*version \([egcygnustpi-]*[0-9.]*\).*$/\1/p'`
case $ac_prog_version in
'') ac_prog_version="v. ?.??, bad"; ac_verc_fail=yes;;
- *gcc-2.9[5-9].*|*2.8.[1-9]*|*2.9|*2.9.[0-9]*|2.9[5-9]*|cygnus-2.9[1-9]*|gcc-2.9[5-9]|gcc-2.1[0-9][0-9]|sgicc-*)
+ *gcc-2.9[5-9].*|*2.8.[1-9]*|*2.9|*2.9.[0-9]*|2.9[5-9]*|3.[0-9]*|cygnus-2.9[1-9]*|gcc-2.9[5-9]|gcc-2.1[0-9][0-9]|sgicc-*)
ac_prog_version="$ac_prog_version, ok"; ac_verc_fail=no;;
*) ac_prog_version="$ac_prog_version, bad"; ac_verc_fail=yes;;
diff -u glibc-2.2.2/csu/Makefile.ORIG glibc-2.2.2/csu/Makefile
--- glibc-2.2.2/csu/Makefile.ORIG 2001-01-06 20:35:11.000000000 -0800
+++ glibc-2.2.2/csu/Makefile 2005-01-27 11:27:05.000000000 -0800
@@ -204,8 +204,8 @@
esac; \
files="$(all-Banner-files)"; \
if test -n "$$files"; then \
- echo "\"Available extensions:"; \
- sed -e '/^#/d' -e 's/^[[:space:]]*/ /' $$files; \
- echo "\""; \
+ echo "\"Available extensions:\\n\""; \
+ sed -e '/^#/d' -e 's/^[[:space:]]*/ /' \
+ -e 's/\(^.*$$\)/\"\1\\n\"/' $$files; \
fi) > $@T
mv -f $@T $@
--- glibc-2.2.2/stdlib/longlong.h.orig 2000-02-11 15:48:58.000000000 -0800
+++ glibc-2.2.2/stdlib/longlong.h 2005-01-27 14:52:00.000000000 -0800
@@ -1,20 +1,21 @@
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
- Copyright (C) 1991,92,94,95,96,97,98,99,2000 Free Software Foundation, Inc.
+ Copyright (C) 1991,92,94,95,96,97,98,99,2000,2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
- This definition file is free software; you can redistribute it
- and/or modify it under the terms of the GNU General Public
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
- version 2, or (at your option) any later version.
+ version 2.1 of the License, or (at your option) any later version.
- This definition file is distributed in the hope that it will be
- useful, but WITHOUT ANY WARRANTY; without even the implied
- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- See the GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
/* You have to define the following before including this file:
@@ -108,8 +109,8 @@
#if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("add %1,%4,%5
- addc %0,%2,%3" \
+ __asm__ ("add %1,%4,%5\n" \
+ "addc %0,%2,%3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%r" ((USItype) (ah)), \
@@ -117,8 +118,8 @@
"%r" ((USItype) (al)), \
"rI" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("sub %1,%4,%5
- subc %0,%2,%3" \
+ __asm__ ("sub %1,%4,%5\n" \
+ "subc %0,%2,%3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "r" ((USItype) (ah)), \
@@ -175,8 +176,8 @@
#if defined (__arc__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("add.f %1, %4, %5
- adc %0, %2, %3" \
+ __asm__ ("add.f %1, %4, %5\n" \
+ "adc %0, %2, %3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%r" ((USItype) (ah)), \
@@ -184,8 +185,8 @@
"%r" ((USItype) (al)), \
"rIJ" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("sub.f %1, %4, %5
- sbc %0, %2, %3" \
+ __asm__ ("sub.f %1, %4, %5\n" \
+ "sbc %0, %2, %3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "r" ((USItype) (ah)), \
@@ -206,8 +207,8 @@
#if defined (__arm__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("adds %1, %4, %5
- adc %0, %2, %3" \
+ __asm__ ("adds %1, %4, %5\n" \
+ "adc %0, %2, %3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%r" ((USItype) (ah)), \
@@ -215,8 +216,8 @@
"%r" ((USItype) (al)), \
"rI" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subs %1, %4, %5
- sbc %0, %2, %3" \
+ __asm__ ("subs %1, %4, %5\n" \
+ "sbc %0, %2, %3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "r" ((USItype) (ah)), \
@@ -225,19 +226,19 @@
"rI" ((USItype) (bl)))
#define umul_ppmm(xh, xl, a, b) \
{register USItype __t0, __t1, __t2; \
- __asm__ ("%@ Inlined umul_ppmm
- mov %2, %5, lsr #16
- mov %0, %6, lsr #16
- bic %3, %5, %2, lsl #16
- bic %4, %6, %0, lsl #16
- mul %1, %3, %4
- mul %4, %2, %4
- mul %3, %0, %3
- mul %0, %2, %0
- adds %3, %4, %3
- addcs %0, %0, #65536
- adds %1, %1, %3, lsl #16
- adc %0, %0, %3, lsr #16" \
+ __asm__ ("%@ Inlined umul_ppmm\n" \
+ "mov %2, %5, lsr #16\n" \
+ "mov %0, %6, lsr #16\n" \
+ "bic %3, %5, %2, lsl #16\n" \
+ "bic %4, %6, %0, lsl #16\n" \
+ "mul %1, %3, %4\n" \
+ "mul %4, %2, %4\n" \
+ "mul %3, %0, %3\n" \
+ "mul %0, %2, %0\n" \
+ "adds %3, %4, %3\n" \
+ "addcs %0, %0, #65536\n" \
+ "adds %1, %1, %3, lsl #16\n" \
+ "adc %0, %0, %3, lsr #16" \
: "=&r" ((USItype) (xh)), \
"=r" ((USItype) (xl)), \
"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
@@ -277,8 +278,8 @@
#if defined (__gmicro__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("add.w %5,%1
- addx %3,%0" \
+ __asm__ ("add.w %5,%1\n" \
+ "addx %3,%0" \
: "=g" ((USItype) (sh)), \
"=&g" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -286,8 +287,8 @@
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("sub.w %5,%1
- subx %3,%0" \
+ __asm__ ("sub.w %5,%1\n" \
+ "subx %3,%0" \
: "=g" ((USItype) (sh)), \
"=&g" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
@@ -316,8 +317,8 @@
#if defined (__hppa) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("add %4,%5,%1
- addc %2,%3,%0" \
+ __asm__ ("add %4,%5,%1\n" \
+ "addc %2,%3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%rM" ((USItype) (ah)), \
@@ -325,8 +326,8 @@
"%rM" ((USItype) (al)), \
"rM" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("sub %4,%5,%1
- subb %2,%3,%0" \
+ __asm__ ("sub %4,%5,%1\n" \
+ "subb %2,%3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "rM" ((USItype) (ah)), \
@@ -354,25 +355,25 @@
#endif
#define UDIV_TIME 40
#define count_leading_zeros(count, x) \
- do { \
- USItype __tmp; \
- __asm__ ( \
- "ldi 1,%0
- extru,= %1,15,16,%%r0 ; Bits 31..16 zero?
- extru,tr %1,15,16,%1 ; No. Shift down, skip add.
- ldo 16(%0),%0 ; Yes. Perform add.
- extru,= %1,23,8,%%r0 ; Bits 15..8 zero?
- extru,tr %1,23,8,%1 ; No. Shift down, skip add.
- ldo 8(%0),%0 ; Yes. Perform add.
- extru,= %1,27,4,%%r0 ; Bits 7..4 zero?
- extru,tr %1,27,4,%1 ; No. Shift down, skip add.
- ldo 4(%0),%0 ; Yes. Perform add.
- extru,= %1,29,2,%%r0 ; Bits 3..2 zero?
- extru,tr %1,29,2,%1 ; No. Shift down, skip add.
- ldo 2(%0),%0 ; Yes. Perform add.
- extru %1,30,1,%1 ; Extract bit 1.
- sub %0,%1,%0 ; Subtract it.
- " : "=r" (count), "=r" (__tmp) : "1" (x)); \
+ do { \
+ USItype __tmp; \
+ __asm__ ( \
+ "ldi 1,%0\n" \
+ "extru,= %1,15,16,%%r0 ; Bits 31..16 zero?\n" \
+ "extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n" \
+ "ldo 16(%0),%0 ; Yes. Perform add.\n" \
+ "extru,= %1,23,8,%%r0 ; Bits 15..8 zero?\n" \
+ "extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n" \
+ "ldo 8(%0),%0 ; Yes. Perform add.\n" \
+ "extru,= %1,27,4,%%r0 ; Bits 7..4 zero?\n" \
+ "extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n" \
+ "ldo 4(%0),%0 ; Yes. Perform add.\n" \
+ "extru,= %1,29,2,%%r0 ; Bits 3..2 zero?\n" \
+ "extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n" \
+ "ldo 2(%0),%0 ; Yes. Perform add.\n" \
+ "extru %1,30,1,%1 ; Extract bit 1.\n" \
+ "sub %0,%1,%0 ; Subtract it." \
+ : "=r" (count), "=r" (__tmp) : "1" (x)); \
} while (0)
#endif
@@ -419,8 +420,8 @@
#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("addl %5,%1
- adcl %3,%0" \
+ __asm__ ("addl %5,%1\n" \
+ "adcl %3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -428,8 +429,8 @@
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subl %5,%1
- sbbl %3,%0" \
+ __asm__ ("subl %5,%1\n" \
+ "sbbl %3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
@@ -525,9 +526,9 @@
#if defined (__M32R__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
- __asm__ ("cmp %0,%0
- addx %%5,%1
- addx %%3,%0" \
+ __asm__ ("cmp %0,%0\n" \
+ "addx %%5,%1\n" \
+ "addx %%3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -537,9 +538,9 @@
: "cbit")
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
- __asm__ ("cmp %0,%0
- subx %5,%1
- subx %3,%0" \
+ __asm__ ("cmp %0,%0\n" \
+ "subx %5,%1\n" \
+ "subx %3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
@@ -551,8 +552,8 @@
#if defined (__mc68000__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("add%.l %5,%1
- addx%.l %3,%0" \
+ __asm__ ("add%.l %5,%1\n" \
+ "addx%.l %3,%0" \
: "=d" ((USItype) (sh)), \
"=&d" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -560,8 +561,8 @@
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("sub%.l %5,%1
- subx%.l %3,%0" \
+ __asm__ ("sub%.l %5,%1\n" \
+ "subx%.l %3,%0" \
: "=d" ((USItype) (sh)), \
"=&d" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
@@ -602,32 +603,32 @@
#if !defined(__mcf5200__)
/* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX. */
#define umul_ppmm(xh, xl, a, b) \
- __asm__ ("| Inlined umul_ppmm
- move%.l %2,%/d0
- move%.l %3,%/d1
- move%.l %/d0,%/d2
- swap %/d0
- move%.l %/d1,%/d3
- swap %/d1
- move%.w %/d2,%/d4
- mulu %/d3,%/d4
- mulu %/d1,%/d2
- mulu %/d0,%/d3
- mulu %/d0,%/d1
- move%.l %/d4,%/d0
- eor%.w %/d0,%/d0
- swap %/d0
- add%.l %/d0,%/d2
- add%.l %/d3,%/d2
- jcc 1f
- add%.l %#65536,%/d1
-1: swap %/d2
- moveq %#0,%/d0
- move%.w %/d2,%/d0
- move%.w %/d4,%/d2
- move%.l %/d2,%1
- add%.l %/d1,%/d0
- move%.l %/d0,%0" \
+ __asm__ ("| Inlined umul_ppmm\n" \
+" move%.l %2,%/d0\n" \
+" move%.l %3,%/d1\n" \
+" move%.l %/d0,%/d2\n" \
+" swap %/d0\n" \
+" move%.l %/d1,%/d3\n" \
+" swap %/d1\n" \
+" move%.w %/d2,%/d4\n" \
+" mulu %/d3,%/d4\n" \
+" mulu %/d1,%/d2\n" \
+" mulu %/d0,%/d3\n" \
+" mulu %/d0,%/d1\n" \
+" move%.l %/d4,%/d0\n" \
+" eor%.w %/d0,%/d0\n" \
+" swap %/d0\n" \
+" add%.l %/d0,%/d2\n" \
+" add%.l %/d3,%/d2\n" \
+" jcc 1f\n" \
+" add%.l %#65536,%/d1\n" \
+"1: swap %/d2\n" \
+" moveq %#0,%/d0\n" \
+" move%.w %/d2,%/d0\n" \
+" move%.w %/d4,%/d2\n" \
+" move%.l %/d2,%1\n" \
+" add%.l %/d1,%/d0\n" \
+" move%.l %/d0,%0" \
: "=g" ((USItype) (xh)), \
"=g" ((USItype) (xl)) \
: "g" ((USItype) (a)), \
@@ -653,8 +654,8 @@
#if defined (__m88000__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("addu.co %1,%r4,%r5
- addu.ci %0,%r2,%r3" \
+ __asm__ ("addu.co %1,%r4,%r5\n" \
+ "addu.ci %0,%r2,%r3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%rJ" ((USItype) (ah)), \
@@ -662,8 +663,8 @@
"%rJ" ((USItype) (al)), \
"rJ" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subu.co %1,%r4,%r5
- subu.ci %0,%r2,%r3" \
+ __asm__ ("subu.co %1,%r4,%r5\n" \
+ "subu.ci %0,%r2,%r3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "rJ" ((USItype) (ah)), \
@@ -880,8 +881,8 @@
#if defined (__pyr__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("addw %5,%1
- addwc %3,%0" \
+ __asm__ ("addw %5,%1\n" \
+ "addwc %3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -889,8 +890,8 @@
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subw %5,%1
- subwb %3,%0" \
+ __asm__ ("subw %5,%1\n" \
+ "subwb %3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
@@ -902,8 +903,8 @@
({union {UDItype __ll; \
struct {USItype __h, __l;} __i; \
} __xx; \
- __asm__ ("movw %1,%R0
- uemul %2,%0" \
+ __asm__ ("movw %1,%R0\n" \
+ "uemul %2,%0" \
: "=&r" (__xx.__ll) \
: "g" ((USItype) (u)), \
"g" ((USItype) (v))); \
@@ -912,8 +913,8 @@
#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("a %1,%5
- ae %0,%3" \
+ __asm__ ("a %1,%5\n" \
+ "ae %0,%3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -921,8 +922,8 @@
"%1" ((USItype) (al)), \
"r" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("s %1,%5
- se %0,%3" \
+ __asm__ ("s %1,%5\n" \
+ "se %0,%3" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
@@ -933,26 +934,26 @@
do { \
USItype __m0 = (m0), __m1 = (m1); \
__asm__ ( \
- "s r2,r2
- mts r10,%2
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- m r2,%3
- cas %0,r2,r0
- mfs r10,%1" \
+ "s r2,r2\n" \
+ "mts r10,%2\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "m r2,%3\n" \
+ "cas %0,r2,r0\n" \
+ "mfs r10,%1" \
: "=r" ((USItype) (ph)), \
"=r" ((USItype) (pl)) \
: "%r" (__m0), \
@@ -982,9 +983,9 @@
#if defined (__sh2__) && W_TYPE_SIZE == 32
#define umul_ppmm(w1, w0, u, v) \
__asm__ ( \
- "dmulu.l %2,%3
- sts macl,%1
- sts mach,%0" \
+ "dmulu.l %2,%3\n" \
+ "sts macl,%1\n" \
+ "sts mach,%0" \
: "=r" ((USItype)(w1)), \
"=r" ((USItype)(w0)) \
: "r" ((USItype)(u)), \
@@ -996,8 +997,8 @@
#if defined (__sparc__) && !defined(__arch64__) \
&& !defined(__sparcv9) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("addcc %r4,%5,%1
- addx %r2,%3,%0" \
+ __asm__ ("addcc %r4,%5,%1\n" \
+ "addx %r2,%3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "%rJ" ((USItype) (ah)), \
@@ -1006,8 +1007,8 @@
"rI" ((USItype) (bl)) \
__CLOBBER_CC)
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subcc %r4,%5,%1
- subx %r2,%3,%0" \
+ __asm__ ("subcc %r4,%5,%1\n" \
+ "subx %r2,%3,%0" \
: "=r" ((USItype) (sh)), \
"=&r" ((USItype) (sl)) \
: "rJ" ((USItype) (ah)), \
@@ -1040,45 +1041,45 @@
: "r" ((USItype) (u)), \
"r" ((USItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, d) \
- __asm__ ("! Inlined udiv_qrnnd
- wr %%g0,%2,%%y ! Not a delayed write for sparclite
- tst %%g0
- divscc %3,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%%g1
- divscc %%g1,%4,%0
- rd %%y,%1
- bl,a 1f
- add %1,%4,%1
-1: ! End of inline udiv_qrnnd" \
+ __asm__ ("! Inlined udiv_qrnnd\n" \
+" wr %%g0,%2,%%y ! Not a delayed write for sparclite\n" \
+" tst %%g0\n" \
+" divscc %3,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%%g1\n" \
+" divscc %%g1,%4,%0\n" \
+" rd %%y,%1\n" \
+" bl,a 1f\n" \
+" add %1,%4,%1\n" \
+"1: ! End of inline udiv_qrnnd" \
: "=r" ((USItype) (q)), \
"=r" ((USItype) (r)) \
: "r" ((USItype) (n1)), \
@@ -1099,46 +1100,46 @@
/* SPARC without integer multiplication and divide instructions.
(i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
#define umul_ppmm(w1, w0, u, v) \
- __asm__ ("! Inlined umul_ppmm
- wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr
- sra %3,31,%%o5 ! Don't move this insn
- and %2,%%o5,%%o5 ! Don't move this insn
- andcc %%g0,0,%%g1 ! Don't move this insn
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,%3,%%g1
- mulscc %%g1,0,%%g1
- add %%g1,%%o5,%0
- rd %%y,%1" \
+ __asm__ ("! Inlined umul_ppmm\n" \
+" wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n"\
+" sra %3,31,%%o5 ! Don't move this insn\n" \
+" and %2,%%o5,%%o5 ! Don't move this insn\n" \
+" andcc %%g0,0,%%g1 ! Don't move this insn\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,%3,%%g1\n" \
+" mulscc %%g1,0,%%g1\n" \
+" add %%g1,%%o5,%0\n" \
+" rd %%y,%1" \
: "=r" ((USItype) (w1)), \
"=r" ((USItype) (w0)) \
: "%rI" ((USItype) (u)), \
@@ -1148,30 +1149,30 @@
/* It's quite necessary to add this much assembler for the sparc.
The default udiv_qrnnd (in C) is more than 10 times slower! */
#define udiv_qrnnd(q, r, n1, n0, d) \
- __asm__ ("! Inlined udiv_qrnnd
- mov 32,%%g1
- subcc %1,%2,%%g0
-1: bcs 5f
- addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb
- sub %1,%2,%1 ! this kills msb of n
- addx %1,%1,%1 ! so this can't give carry
- subcc %%g1,1,%%g1
-2: bne 1b
- subcc %1,%2,%%g0
- bcs 3f
- addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb
- b 3f
- sub %1,%2,%1 ! this kills msb of n
-4: sub %1,%2,%1
-5: addxcc %1,%1,%1
- bcc 2b
- subcc %%g1,1,%%g1
-! Got carry from n. Subtract next step to cancel this carry.
- bne 4b
- addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb
- sub %1,%2,%1
-3: xnor %0,0,%0
- ! End of inline udiv_qrnnd" \
+ __asm__ ("! Inlined udiv_qrnnd\n" \
+" mov 32,%%g1\n" \
+" subcc %1,%2,%%g0\n" \
+"1: bcs 5f\n" \
+" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \
+" sub %1,%2,%1 ! this kills msb of n\n" \
+" addx %1,%1,%1 ! so this can't give carry\n" \
+" subcc %%g1,1,%%g1\n" \
+"2: bne 1b\n" \
+" subcc %1,%2,%%g0\n" \
+" bcs 3f\n" \
+" addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n" \
+" b 3f\n" \
+" sub %1,%2,%1 ! this kills msb of n\n" \
+"4: sub %1,%2,%1\n" \
+"5: addxcc %1,%1,%1\n" \
+" bcc 2b\n" \
+" subcc %%g1,1,%%g1\n" \
+"! Got carry from n. Subtract next step to cancel this carry.\n" \
+" bne 4b\n" \
+" addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n" \
+" sub %1,%2,%1\n" \
+"3: xnor %0,0,%0\n" \
+" ! End of inline udiv_qrnnd" \
: "=&r" ((USItype) (q)), \
"=&r" ((USItype) (r)) \
: "r" ((USItype) (d)), \
@@ -1185,58 +1186,58 @@
#if ((defined (__sparc__) && defined (__arch64__)) \
|| defined (__sparcv9)) && W_TYPE_SIZE == 64
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("addcc %r4,%5,%1
- add %r2,%3,%0
- bcs,a,pn %%xcc, 1f
- add %0, 1, %0
- 1:" \
- : "=r" ((UDItype)(sh)), \
- "=&r" ((UDItype)(sl)) \
- : "%rJ" ((UDItype)(ah)), \
- "rI" ((UDItype)(bh)), \
- "%rJ" ((UDItype)(al)), \
- "rI" ((UDItype)(bl)) \
+ __asm__ ("addcc %r4,%5,%1\n" \
+ "add %r2,%3,%0\n" \
+ "bcs,a,pn %%xcc, 1f\n" \
+ "add %0, 1, %0\n" \
+ "1:" \
+ : "=r" ((UDItype)(sh)), \
+ "=&r" ((UDItype)(sl)) \
+ : "%rJ" ((UDItype)(ah)), \
+ "rI" ((UDItype)(bh)), \
+ "%rJ" ((UDItype)(al)), \
+ "rI" ((UDItype)(bl)) \
__CLOBBER_CC)
-#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subcc %r4,%5,%1
- sub %r2,%3,%0
- bcs,a,pn %%xcc, 1f
- sub %0, 1, %0
- 1:" \
- : "=r" ((UDItype)(sh)), \
- "=&r" ((UDItype)(sl)) \
- : "rJ" ((UDItype)(ah)), \
- "rI" ((UDItype)(bh)), \
- "rJ" ((UDItype)(al)), \
- "rI" ((UDItype)(bl)) \
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+ __asm__ ("subcc %r4,%5,%1\n" \
+ "sub %r2,%3,%0\n" \
+ "bcs,a,pn %%xcc, 1f\n" \
+ "sub %0, 1, %0\n" \
+ "1:" \
+ : "=r" ((UDItype)(sh)), \
+ "=&r" ((UDItype)(sl)) \
+ : "rJ" ((UDItype)(ah)), \
+ "rI" ((UDItype)(bh)), \
+ "rJ" ((UDItype)(al)), \
+ "rI" ((UDItype)(bl)) \
__CLOBBER_CC)
#define umul_ppmm(wh, wl, u, v) \
do { \
UDItype tmp1, tmp2, tmp3, tmp4; \
__asm__ __volatile__ ( \
- "srl %7,0,%3
- mulx %3,%6,%1
- srlx %6,32,%2
- mulx %2,%3,%4
- sllx %4,32,%5
- srl %6,0,%3
- sub %1,%5,%5
- srlx %5,32,%5
- addcc %4,%5,%4
- srlx %7,32,%5
- mulx %3,%5,%3
- mulx %2,%5,%5
- sethi %%hi(0x80000000),%2
- addcc %4,%3,%4
- srlx %4,32,%4
- add %2,%2,%2
- movcc %%xcc,%%g0,%2
- addcc %5,%4,%5
- sllx %3,32,%3
- add %1,%3,%1
- add %5,%2,%0" \
+ "srl %7,0,%3\n" \
+ "mulx %3,%6,%1\n" \
+ "srlx %6,32,%2\n" \
+ "mulx %2,%3,%4\n" \
+ "sllx %4,32,%5\n" \
+ "srl %6,0,%3\n" \
+ "sub %1,%5,%5\n" \
+ "srlx %5,32,%5\n" \
+ "addcc %4,%5,%4\n" \
+ "srlx %7,32,%5\n" \
+ "mulx %3,%5,%3\n" \
+ "mulx %2,%5,%5\n" \
+ "sethi %%hi(0x80000000),%2\n" \
+ "addcc %4,%3,%4\n" \
+ "srlx %4,32,%4\n" \
+ "add %2,%2,%2\n" \
+ "movcc %%xcc,%%g0,%2\n" \
+ "addcc %5,%4,%5\n" \
+ "sllx %3,32,%3\n" \
+ "add %1,%3,%1\n" \
+ "add %5,%2,%0" \
: "=r" ((UDItype)(wh)), \
"=&r" ((UDItype)(wl)), \
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
@@ -1250,8 +1251,8 @@
#if defined (__vax__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
- __asm__ ("addl2 %5,%1
- adwc %3,%0" \
+ __asm__ ("addl2 %5,%1\n" \
+ "adwc %3,%0" \
: "=g" ((USItype) (sh)), \
"=&g" ((USItype) (sl)) \
: "%0" ((USItype) (ah)), \
@@ -1259,8 +1260,8 @@
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- __asm__ ("subl2 %5,%1
- sbwc %3,%0" \
+ __asm__ ("subl2 %5,%1\n" \
+ "sbwc %3,%0" \
: "=g" ((USItype) (sh)), \
"=&g" ((USItype) (sl)) \
: "0" ((USItype) (ah)), \
--- glibc-2.2.2/stdio-common/sprintf.c.orig 1998-07-16 12:31:31.000000000 -0700
+++ glibc-2.2.2/stdio-common/sprintf.c 2005-01-27 15:07:34.000000000 -0800
@@ -27,9 +27,7 @@
/* Write formatted output into S, according to the format string FORMAT. */
/* VARARGS2 */
int
-sprintf (s, format)
- char *s;
- const char *format;
+sprintf (char *s, const char *format, ...)
{
va_list arg;
int done;
--- glibc-2.2.2/stdio-common/sscanf.c.orig 1998-07-16 12:31:05.000000000 -0700
+++ glibc-2.2.2/stdio-common/sscanf.c 2005-01-27 15:20:24.000000000 -0800
@@ -27,9 +27,7 @@
/* Read formatted input from S, according to the format string FORMAT. */
/* VARARGS2 */
int
-sscanf (s, format)
- const char *s;
- const char *format;
+sscanf (const char *s, const char *format, ...)
{
va_list arg;
int done;
--- glibc-2.2.2/sysdeps/unix/sysv/linux/errlist.c.orig 2000-10-17 14:54:20.000000000 -0700
+++ glibc-2.2.2/sysdeps/unix/sysv/linux/errlist.c 2005-01-27 15:37:12.000000000 -0800
@@ -38,10 +38,9 @@
const int __old_sys_nerr = OLD_ERRLIST_SIZE;
strong_alias (__old_sys_nerr, _old_sys_nerr);
-weak_alias (__old_sys_nerr, _old_sys_nerr)
compat_symbol (libc, __old_sys_nerr, _sys_nerr, GLIBC_2_0);
compat_symbol (libc, _old_sys_nerr, sys_nerr, GLIBC_2_0);
-weak_alias (__old_sys_errlist, _old_sys_errlist);
+strong_alias (__old_sys_errlist, _old_sys_errlist);
compat_symbol (libc, __old_sys_errlist, _sys_errlist, GLIBC_2_0);
compat_symbol (libc, _old_sys_errlist, sys_errlist, GLIBC_2_0);
#endif
--- glibc-2.2.2/grp/initgroups.c.orig 2000-08-31 14:44:58.000000000 -0700
+++ glibc-2.2.2/grp/initgroups.c 2005-01-27 16:00:27.000000000 -0800
@@ -208,7 +208,7 @@
/* This is really only for debugging. */
if (NSS_STATUS_TRYAGAIN > status || status > NSS_STATUS_RETURN)
- __libc_fatal ("illegal status in " __FUNCTION__);
+ __libc_fatal ("illegal status in internal_getgrouplist");
if (status != NSS_STATUS_SUCCESS
&& nss_next_action (nip, status) == NSS_ACTION_RETURN)
--- glibc-2.2.2/nss/nsswitch.c.orig 2001-01-06 20:35:27.000000000 -0800
+++ glibc-2.2.2/nss/nsswitch.c 2005-01-27 16:26:04.000000000 -0800
@@ -177,7 +177,7 @@
{
/* This is really only for debugging. */
if (NSS_STATUS_TRYAGAIN > status || status > NSS_STATUS_RETURN)
- __libc_fatal ("illegal status in " __FUNCTION__);
+ __libc_fatal ("illegal status in __nss_next");
if (nss_next_action (*ni, status) == NSS_ACTION_RETURN)
return 1;
--- glibc-2.2.2/sysdeps/i386/dl-machine.h.orig 2001-02-09 10:04:25.000000000 -0800
+++ glibc-2.2.2/sysdeps/i386/dl-machine.h 2005-01-27 17:59:49.000000000 -0800
@@ -63,11 +63,12 @@
destroys the passed register information. */
/* GKM FIXME: Fix trampoline to pass bounds so we can do
without the `__unbounded' qualifier. */
+#define ARCH_FIXUP_ATTRIBUTE __attribute__ ((unused))
static ElfW(Addr) fixup (struct link_map *__unbounded l, ElfW(Word) reloc_offset)
- __attribute__ ((regparm (2), unused));
+ ARCH_FIXUP_ATTRIBUTE;
static ElfW(Addr) profile_fixup (struct link_map *l, ElfW(Word) reloc_offset,
ElfW(Addr) retaddr)
- __attribute__ ((regparm (3), unused));
+ ARCH_FIXUP_ATTRIBUTE;
#endif
/* Set up the loaded object described by L so its unrelocated PLT
@@ -117,68 +118,68 @@
and then redirect to the address it returns. */
#if !defined PROF && !__BOUNDED_POINTERS__
# define ELF_MACHINE_RUNTIME_TRAMPOLINE asm ("\
- .text
- .globl _dl_runtime_resolve
- .type _dl_runtime_resolve, @function
- .align 16
-_dl_runtime_resolve:
- pushl %eax # Preserve registers otherwise clobbered.
- pushl %ecx
- pushl %edx
- movl 16(%esp), %edx # Copy args pushed by PLT in register. Note
- movl 12(%esp), %eax # that `fixup' takes its parameters in regs.
- call fixup # Call resolver.
- popl %edx # Get register content back.
- popl %ecx
- xchgl %eax, (%esp) # Get %eax contents end store function address.
- ret $8 # Jump to function address.
- .size _dl_runtime_resolve, .-_dl_runtime_resolve
-
- .globl _dl_runtime_profile
- .type _dl_runtime_profile, @function
- .align 16
-_dl_runtime_profile:
- pushl %eax # Preserve registers otherwise clobbered.
- pushl %ecx
- pushl %edx
- movl 20(%esp), %ecx # Load return address
- movl 16(%esp), %edx # Copy args pushed by PLT in register. Note
- movl 12(%esp), %eax # that `fixup' takes its parameters in regs.
- call profile_fixup # Call resolver.
- popl %edx # Get register content back.
- popl %ecx
- xchgl %eax, (%esp) # Get %eax contents end store function address.
- ret $8 # Jump to function address.
- .size _dl_runtime_profile, .-_dl_runtime_profile
- .previous
+ .text\n\
+ .globl _dl_runtime_resolve\n\
+ .type _dl_runtime_resolve, @function\n\
+ .align 16\n\
+_dl_runtime_resolve:\n\
+ pushl %eax # Preserve registers otherwise clobbered.\n\
+ pushl %ecx\n\
+ pushl %edx\n\
+ movl 16(%esp), %edx # Copy args pushed by PLT in register. Note\n\
+ movl 12(%esp), %eax # that `fixup' takes its parameters in regs.\n\
+ call fixup # Call resolver.\n\
+ popl %edx # Get register content back.\n\
+ popl %ecx\n\
+ xchgl %eax, (%esp) # Get %eax contents end store function address.\n\
+ ret $8 # Jump to function address.\n\
+ .size _dl_runtime_resolve, .-_dl_runtime_resolve\n\
+\n\
+ .globl _dl_runtime_profile\n\
+ .type _dl_runtime_profile, @function\n\
+ .align 16\n\
+_dl_runtime_profile:\n\
+ pushl %eax # Preserve registers otherwise clobbered.\n\
+ pushl %ecx\n\
+ pushl %edx\n\
+ movl 20(%esp), %ecx # Load return address\n\
+ movl 16(%esp), %edx # Copy args pushed by PLT in register. Note\n\
+ movl 12(%esp), %eax # that `fixup' takes its parameters in regs.\n\
+ call profile_fixup # Call resolver.\n\
+ popl %edx # Get register content back.\n\
+ popl %ecx\n\
+ xchgl %eax, (%esp) # Get %eax contents end store function address.\n\
+ ret $8 # Jump to function address.\n\
+ .size _dl_runtime_profile, .-_dl_runtime_profile\n\
+ .previous\n\
");
#else
-# define ELF_MACHINE_RUNTIME_TRAMPOLINE asm ("\
- .text
- .globl _dl_runtime_resolve
- .globl _dl_runtime_profile
- .type _dl_runtime_resolve, @function
- .type _dl_runtime_profile, @function
- .align 16
-_dl_runtime_resolve:
-_dl_runtime_profile:
- pushl %eax # Preserve registers otherwise clobbered.
- pushl %ecx
- pushl %edx
- movl 16(%esp), %edx # Push the arguments for `fixup'
- movl 12(%esp), %eax
- pushl %edx
- pushl %eax
- call fixup # Call resolver.
- popl %edx # Pop the parameters
- popl %ecx
- popl %edx # Get register content back.
- popl %ecx
- xchgl %eax, (%esp) # Get %eax contents end store function address.
- ret $8 # Jump to function address.
- .size _dl_runtime_resolve, .-_dl_runtime_resolve
- .size _dl_runtime_profile, .-_dl_runtime_profile
- .previous
+# define ELF_MACHINE_RUNTIME_TRAMPOLINE asm ("\n\
+ .text\n\
+ .globl _dl_runtime_resolve\n\
+ .globl _dl_runtime_profile\n\
+ .type _dl_runtime_resolve, @function\n\
+ .type _dl_runtime_profile, @function\n\
+ .align 16\n\
+_dl_runtime_resolve:\n\
+_dl_runtime_profile:\n\
+ pushl %eax # Preserve registers otherwise clobbered.\n\
+ pushl %ecx\n\
+ pushl %edx\n\
+ movl 16(%esp), %edx # Push the arguments for `fixup'\n\
+ movl 12(%esp), %eax\n\
+ pushl %edx\n\
+ pushl %eax\n\
+ call fixup # Call resolver.\n\
+ popl %edx # Pop the parameters\n\
+ popl %ecx\n\
+ popl %edx # Get register content back.\n\
+ popl %ecx\n\
+ xchgl %eax, (%esp) # Get %eax contents end store function address.\n\
+ ret $8 # Jump to function address.\n\
+ .size _dl_runtime_resolve, .-_dl_runtime_resolve\n\
+ .size _dl_runtime_profile, .-_dl_runtime_profile\n\
+ .previous\n\
");
#endif
@@ -190,8 +191,8 @@
The C function `_dl_start' is the real entry point;
its return value is the user program's entry point. */
-#define RTLD_START asm ("\
-.text\n\
+#define RTLD_START asm ("\n\
+ .text\n\
.align 16\n\
0: movl (%esp), %ebx\n\
ret\n\
@@ -205,7 +206,7 @@
_dl_start_user:\n\
# Save the user entry point address in %edi.\n\
movl %eax, %edi\n\
- # Point %ebx at the GOT.
+ # Point %ebx at the GOT.\n\
call 0b\n\
addl $_GLOBAL_OFFSET_TABLE_, %ebx\n\
# Store the highest stack address\n\
@@ -240,7 +241,7 @@
movl _dl_fini@GOT(%ebx), %edx\n\
# Jump to the user's entry point.\n\
jmp *%edi\n\
-.previous\n\
+ .previous\n\
");
#ifndef RTLD_START_SPECIAL_INIT
------
Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com
| Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
|---|---|---|
| Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |