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IRQ-Enable in ARM-Target (cpsr)
- From: "Martin Laabs" <martin dot laabs at mailbox dot tu-dresden dot de>
- To: "ecos-devel at ecos dot sourceware dot org" <ecos-devel at ecos dot sourceware dot org>
- Date: Fri, 05 Dec 2008 23:30:23 +0100
- Subject: IRQ-Enable in ARM-Target (cpsr)
Hi,
I'm currently searching the bug that prevents the STRG-C break of
the GDB stub. (LPC2294) I discovered that the (global) IRQ-Disable
bit in the cpsr register is set. Because of that the STRG-C interrupt
of the debug channel is unable to occure.
I searched in the whole code but did not found the part where this
IRQ-Disable bit (bit 7) is cleared.
Maybe you have a hint for me? Where should I add the patch for that?
In the cyg_hal_plf_serial_init() function? (The HAL_INTERRUPT_(U)MASK
functions work only with the interrupt controller)
Whats about the other packages that uses the interrupts? (I currently
use the minimal config to search the bug.) Where and when do they disable
the global interrupt-disable flag?
Thank you,
Martin L.