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Re: Separate interrupt stack


>>>>> "Boris" == Boris V Guzhov <borg@int.spb.ru> writes:

    Boris> There are some questions.

    Boris> Is supported in eCos the separate interrupt stack for the
    Boris> i386 platform?

Looking at hal/i386/pc/current/src/hal_intr.c, there is some support
for a separate interrupt stack.

However, there may be problems. Looking at the configuration data I
see:

    cdl_option CYGSEM_HAL_I386_PC_STARTUP_RAM {
        ...
	requires !CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
        ...
    }

which suggests that the separate interrupt stack is only usable when
performing a floppy bootstrap, not a RAM bootstrap. I do not know 
why using a separate interrupt stack would conflict with a RAM
bootstrap, you would have to investigate further.

    Boris> Can I use the cyg_scheduler_(un)lock() calls in DSRs?

I am not sure what you are trying to achieve here. DSRs implicitly run
with the scheduler locked, i.e. the current and any pending DSRs have
to run to completion before control returns to any threads, although
interrupts are enabled during this time.

A DSR can increment the scheduler lock further and then decrement it
again later. This happens implicitly when performing certain kernel
calls from inside a DSR, e.g. a semaphore post.

If a DSR were to perform a scheduler unlock before having done a
corresponding lock, I imagine the system would get very confused. On
the one hand there is a DSR still running and other DSR's may be
pending, on the other hand the scheduler is unlocked so application
threads are runnable. Hopefully there would be an assertion failure,
but I have not checked the code.

Bart Veer // eCos net maintainer

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