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Re: Re: eCos PCI problem and NEC vrc4373 build option.


Thanks, Jifl, the patch works well in PCI1. The left things puzzled me,

<1>. It didn't detect out the another PCI Network card on PCI slot 1, how
you every try to plug one card on the board to test?

<2>. The "-O2" option, I haven't try it yet after apply the patch, I will
let you now after I got any result.

Regards,
-Ling

> Ling Su wrote:
> >
> > Last time, I talked with NEC, they said they pay a lot to Cygnus for the
> > toolchain on NEC MIPS, I don't know why I can not get a proper toolchain
> > works properly. I really follow the instruction on the eCos website
> > carefully.
>
> Well, I think I've found your problem, and it wasn't the toolchain after
> all! So much for laying the blame there :-). Although the confusion was
> because our tools are of a different vintage. Can you try the attached
> patch and rebuild your pci1 please?
>
> The problem was that without the ".set noreorder" the assembler was free
to
> put the jr before the lw. This caused a check (as described in the
comment)
> in hal_bus_error_vsr to fail.
>
> Let me know if this works and I'll check it in here.
>
> Jifl
>
> Index: platform.S
> ===================================================================
> RCS file: /cvs/ecc/ecc/hal/mips/vrc4373/current/src/platform.S,v
> retrieving revision 1.9
> diff -u -5 -p -r1.9 platform.S
> --- platform.S  2000/02/02 19:10:27     1.9
> +++ platform.S  2000/08/31 00:56:39
> @@ -187,10 +187,11 @@ hal_bus_error_vsr:
>  ## above to work around any bus errors provoked by the VRC4373.
>
>  FUNC_START(hal_pci_config_read)
>
>  hal_pci_config_read_load:
> +       .set noreorder
>         lw      v0,0(a0)        # Read the value. If this bus-errors the
>                                 # handler will skip this instruction and
>                                 # put 0xFFFFFFFF into v0.
>         jr      ra              # And return
>
> nop
>
> --
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> "Plan to be spontaneous tomorrow."  ||  These opinions are all my own
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