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RE: Enable EDB7xxx interrupts
- To: "'Lewin A.R.W. Edwards'" <larwe at larwe dot com>,"'eCos discussion'" <ecos-discuss at sources dot redhat dot com>
- Subject: RE: [ECOS] Enable EDB7xxx interrupts
- From: "Trenton D. Adams" <tadams at extremeeng dot com>
- Date: Mon, 25 Jun 2001 11:26:46 -0600
- Organization: Extreme Engineering
Would eCos be hooking those interrupts for some weird reason? In fact,
doesn't eCos hook them every time? After all, from what I understand,
EINT1 and EXTFIQ are the only two interrupts for the EP7211 CPU. So,
when an interrupt occurs, doesn't the system clear those lines?
> -----Original Message-----
> From: Lewin A.R.W. Edwards [mailto:larwe@larwe.com]
> Sent: Monday, June 25, 2001 10:45 AM
> To: Trenton D. Adams; 'eCos discussion'
> Subject: RE: [ECOS] Enable EDB7xxx interrupts
>
>
>
> >Oops, I forgot to mention that I've set bit 5 in the INTMR1.
>
> Do you get an IRQ or FIQ when you force the 6700 to issue an
> interrupt? If
> you do, but it just doesn't have the right INTSR bits, then
> maybe someone
> else is servicing that interrupt and clearing the bit before
> you're looking
> at it.
>
>
> -- Lewin A.R.W. Edwards
> Embedded Engineer, Digi-Frame Inc.
> Work: http://www.digi-frame.com/
> Tel (914) 937-4090 9am-6:30pm M-F ET
> Personal: http://www.larwe.com/ http://www.zws.com/
>
> "Far better it is to dare mighty things, to win glorious
> triumphs, even
> though checkered by failure, than to rank with those poor spirits who
> neither enjoy much nor suffer much, because they live in the
> gray twilight
> that knows not victory nor defeat."
> (Theodore Roosevelt)
>
>